arch/arm/dts/r8a7793.dtsi

   1 /*
   2  * Device Tree Source for the r8a7793 SoC
   3  *
   4  * Copyright (C) 2014-2015 Renesas Electronics Corporation
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0
   7  */
   8
   9 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/power/r8a7793-sysc.h>
  13
  14 / {
  15         compatible = "renesas,r8a7793";
  16         interrupt-parent = <&gic>;
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c7;
  29                 i2c8 = &i2c8;
  30                 spi0 = &qspi;
  31         };
  32
  33         cpus {
  34                 #address-cells = <1>;
  35                 #size-cells = <0>;
  36                 enable-method = "renesas,apmu";
  37
  38                 cpu0: cpu@0 {
  39                         device_type = "cpu";
  40                         compatible = "arm,cortex-a15";
  41                         reg = <0>;
  42                         clock-frequency = <1500000000>;
  43                         voltage-tolerance = <1>; /* 1% */
  44                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  45                         clock-latency = <300000>; /* 300 us */
  46                         power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
  47
  48                         /* kHz - uV - OPPs unknown yet */
  49                         operating-points = <1500000 1000000>,
  50                                            <1312500 1000000>,
  51                                            <1125000 1000000>,
  52                                            < 937500 1000000>,
  53                                            < 750000 1000000>,
  54                                            < 375000 1000000>;
  55                         next-level-cache = <&L2_CA15>;
  56                 };
  57
  58                 cpu1: cpu@1 {
  59                         device_type = "cpu";
  60                         compatible = "arm,cortex-a15";
  61                         reg = <1>;
  62                         clock-frequency = <1500000000>;
  63                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  64                         power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
  65                 };
  66
  67                 L2_CA15: cache-controller-0 {
  68                         compatible = "cache";
  69                         power-domains = <&sysc R8A7793_PD_CA15_SCU>;
  70                         cache-unified;
  71                         cache-level = <2>;
  72                 };
  73         };
  74
  75         apmu@e6152000 {
  76                 compatible = "renesas,r8a7793-apmu", "renesas,apmu";
  77                 reg = <0 0xe6152000 0 0x188>;
  78                 cpus = <&cpu0 &cpu1>;
  79         };
  80
  81         thermal-zones {
  82                 cpu_thermal: cpu-thermal {
  83                         polling-delay-passive   = <0>;
  84                         polling-delay           = <0>;
  85
  86                         thermal-sensors = <&thermal>;
  87
  88                         trips {
  89                                 cpu-crit {
  90                                         temperature     = <115000>;
  91                                         hysteresis      = <0>;
  92                                         type            = "critical";
  93                                 };
  94                         };
  95                         cooling-maps {
  96                         };
  97                 };
  98         };
  99
 100         gic: interrupt-controller@f1001000 {
 101                 compatible = "arm,gic-400";
 102                 #interrupt-cells = <3>;
 103                 #address-cells = <0>;
 104                 interrupt-controller;
 105                 reg = <0 0xf1001000 0 0x1000>,
 106                         <0 0xf1002000 0 0x2000>,
 107                         <0 0xf1004000 0 0x2000>,
 108                         <0 0xf1006000 0 0x2000>;
 109                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 110                 clocks = <&cpg CPG_MOD 408>;
 111                 clock-names = "clk";
 112                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 113                 resets = <&cpg 408>;
 114         };
 115
 116         gpio0: gpio@e6050000 {
 117                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 118                 reg = <0 0xe6050000 0 0x50>;
 119                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 120                 #gpio-cells = <2>;
 121                 gpio-controller;
 122                 gpio-ranges = <&pfc 0 0 32>;
 123                 #interrupt-cells = <2>;
 124                 interrupt-controller;
 125                 clocks = <&cpg CPG_MOD 912>;
 126                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 127                 resets = <&cpg 912>;
 128         };
 129
 130         gpio1: gpio@e6051000 {
 131                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 132                 reg = <0 0xe6051000 0 0x50>;
 133                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 134                 #gpio-cells = <2>;
 135                 gpio-controller;
 136                 gpio-ranges = <&pfc 0 32 26>;
 137                 #interrupt-cells = <2>;
 138                 interrupt-controller;
 139                 clocks = <&cpg CPG_MOD 911>;
 140                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 141                 resets = <&cpg 911>;
 142         };
 143
 144         gpio2: gpio@e6052000 {
 145                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 146                 reg = <0 0xe6052000 0 0x50>;
 147                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 148                 #gpio-cells = <2>;
 149                 gpio-controller;
 150                 gpio-ranges = <&pfc 0 64 32>;
 151                 #interrupt-cells = <2>;
 152                 interrupt-controller;
 153                 clocks = <&cpg CPG_MOD 910>;
 154                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 155                 resets = <&cpg 910>;
 156         };
 157
 158         gpio3: gpio@e6053000 {
 159                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 160                 reg = <0 0xe6053000 0 0x50>;
 161                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 162                 #gpio-cells = <2>;
 163                 gpio-controller;
 164                 gpio-ranges = <&pfc 0 96 32>;
 165                 #interrupt-cells = <2>;
 166                 interrupt-controller;
 167                 clocks = <&cpg CPG_MOD 909>;
 168                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 169                 resets = <&cpg 909>;
 170         };
 171
 172         gpio4: gpio@e6054000 {
 173                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 174                 reg = <0 0xe6054000 0 0x50>;
 175                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 176                 #gpio-cells = <2>;
 177                 gpio-controller;
 178                 gpio-ranges = <&pfc 0 128 32>;
 179                 #interrupt-cells = <2>;
 180                 interrupt-controller;
 181                 clocks = <&cpg CPG_MOD 908>;
 182                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 183                 resets = <&cpg 908>;
 184         };
 185
 186         gpio5: gpio@e6055000 {
 187                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 188                 reg = <0 0xe6055000 0 0x50>;
 189                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 190                 #gpio-cells = <2>;
 191                 gpio-controller;
 192                 gpio-ranges = <&pfc 0 160 32>;
 193                 #interrupt-cells = <2>;
 194                 interrupt-controller;
 195                 clocks = <&cpg CPG_MOD 907>;
 196                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 197                 resets = <&cpg 907>;
 198         };
 199
 200         gpio6: gpio@e6055400 {
 201                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 202                 reg = <0 0xe6055400 0 0x50>;
 203                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 204                 #gpio-cells = <2>;
 205                 gpio-controller;
 206                 gpio-ranges = <&pfc 0 192 32>;
 207                 #interrupt-cells = <2>;
 208                 interrupt-controller;
 209                 clocks = <&cpg CPG_MOD 905>;
 210                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 211                 resets = <&cpg 905>;
 212         };
 213
 214         gpio7: gpio@e6055800 {
 215                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 216                 reg = <0 0xe6055800 0 0x50>;
 217                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 218                 #gpio-cells = <2>;
 219                 gpio-controller;
 220                 gpio-ranges = <&pfc 0 224 26>;
 221                 #interrupt-cells = <2>;
 222                 interrupt-controller;
 223                 clocks = <&cpg CPG_MOD 904>;
 224                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 225                 resets = <&cpg 904>;
 226         };
 227
 228         thermal: thermal@e61f0000 {
 229                 compatible =    "renesas,thermal-r8a7793",
 230                                 "renesas,rcar-gen2-thermal",
 231                                 "renesas,rcar-thermal";
 232                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
 233                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 234                 clocks = <&cpg CPG_MOD 522>;
 235                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 236                 resets = <&cpg 522>;
 237                 #thermal-sensor-cells = <0>;
 238         };
 239
 240         timer {
 241                 compatible = "arm,armv7-timer";
 242                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 243                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 244                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 245                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
 246         };
 247
 248         cmt0: timer@ffca0000 {
 249                 compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2";
 250                 reg = <0 0xffca0000 0 0x1004>;
 251                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 252                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 253                 clocks = <&cpg CPG_MOD 124>;
 254                 clock-names = "fck";
 255                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 256                 resets = <&cpg 124>;
 257
 258                 renesas,channels-mask = <0x60>;
 259
 260                 status = "disabled";
 261         };
 262
 263         cmt1: timer@e6130000 {
 264                 compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2";
 265                 reg = <0 0xe6130000 0 0x1004>;
 266                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 267                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 268                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 269                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 270                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 271                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 272                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 273                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 274                 clocks = <&cpg CPG_MOD 329>;
 275                 clock-names = "fck";
 276                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 277                 resets = <&cpg 329>;
 278
 279                 renesas,channels-mask = <0xff>;
 280
 281                 status = "disabled";
 282         };
 283
 284         irqc0: interrupt-controller@e61c0000 {
 285                 compatible = "renesas,irqc-r8a7793", "renesas,irqc";
 286                 #interrupt-cells = <2>;
 287                 interrupt-controller;
 288                 reg = <0 0xe61c0000 0 0x200>;
 289                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 290                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 291                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 292                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 293                              <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 294                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 295                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 296                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 297                              <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 298                              <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 299                 clocks = <&cpg CPG_MOD 407>;
 300                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 301                 resets = <&cpg 407>;
 302         };
 303
 304         dmac0: dma-controller@e6700000 {
 305                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 306                 reg = <0 0xe6700000 0 0x20000>;
 307                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 308                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 309                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 310                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 311                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 312                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 313                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 314                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 315                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 316                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 317                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 318                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 319                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 320                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 321                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 322                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 323                 interrupt-names = "error",
 324                                 "ch0", "ch1", "ch2", "ch3",
 325                                 "ch4", "ch5", "ch6", "ch7",
 326                                 "ch8", "ch9", "ch10", "ch11",
 327                                 "ch12", "ch13", "ch14";
 328                 clocks = <&cpg CPG_MOD 219>;
 329                 clock-names = "fck";
 330                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 331                 resets = <&cpg 219>;
 332                 #dma-cells = <1>;
 333                 dma-channels = <15>;
 334         };
 335
 336         dmac1: dma-controller@e6720000 {
 337                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 338                 reg = <0 0xe6720000 0 0x20000>;
 339                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 340                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 341                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 342                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 343                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 344                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 345                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 346                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 347                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 348                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 349                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 350                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 351                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 352                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 353                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 354                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 355                 interrupt-names = "error",
 356                                 "ch0", "ch1", "ch2", "ch3",
 357                                 "ch4", "ch5", "ch6", "ch7",
 358                                 "ch8", "ch9", "ch10", "ch11",
 359                                 "ch12", "ch13", "ch14";
 360                 clocks = <&cpg CPG_MOD 218>;
 361                 clock-names = "fck";
 362                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 363                 resets = <&cpg 218>;
 364                 #dma-cells = <1>;
 365                 dma-channels = <15>;
 366         };
 367
 368         audma0: dma-controller@ec700000 {
 369                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 370                 reg = <0 0xec700000 0 0x10000>;
 371                 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 372                               GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 373                               GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 374                               GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 375                               GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 376                               GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 377                               GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 378                               GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 379                               GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 380                               GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 381                               GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 382                               GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 383                               GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 384                               GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 385                 interrupt-names = "error",
 386                                 "ch0", "ch1", "ch2", "ch3",
 387                                 "ch4", "ch5", "ch6", "ch7",
 388                                 "ch8", "ch9", "ch10", "ch11",
 389                                 "ch12";
 390                 clocks = <&cpg CPG_MOD 502>;
 391                 clock-names = "fck";
 392                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 393                 resets = <&cpg 502>;
 394                 #dma-cells = <1>;
 395                 dma-channels = <13>;
 396         };
 397
 398         audma1: dma-controller@ec720000 {
 399                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 400                 reg = <0 0xec720000 0 0x10000>;
 401                 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 402                               GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 403                               GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 404                               GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
 405                               GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 406                               GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 407                               GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 408                               GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 409                               GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 410                               GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 411                               GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 412                               GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 413                               GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 414                               GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
 415                 interrupt-names = "error",
 416                                 "ch0", "ch1", "ch2", "ch3",
 417                                 "ch4", "ch5", "ch6", "ch7",
 418                                 "ch8", "ch9", "ch10", "ch11",
 419                                 "ch12";
 420                 clocks = <&cpg CPG_MOD 501>;
 421                 clock-names = "fck";
 422                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 423                 resets = <&cpg 501>;
 424                 #dma-cells = <1>;
 425                 dma-channels = <13>;
 426         };
 427
 428         /* The memory map in the User's Manual maps the cores to bus numbers */
 429         i2c0: i2c@e6508000 {
 430                 #address-cells = <1>;
 431                 #size-cells = <0>;
 432                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 433                 reg = <0 0xe6508000 0 0x40>;
 434                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 435                 clocks = <&cpg CPG_MOD 931>;
 436                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 437                 resets = <&cpg 931>;
 438                 i2c-scl-internal-delay-ns = <6>;
 439                 status = "disabled";
 440         };
 441
 442         i2c1: i2c@e6518000 {
 443                 #address-cells = <1>;
 444                 #size-cells = <0>;
 445                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 446                 reg = <0 0xe6518000 0 0x40>;
 447                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 448                 clocks = <&cpg CPG_MOD 930>;
 449                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 450                 resets = <&cpg 930>;
 451                 i2c-scl-internal-delay-ns = <6>;
 452                 status = "disabled";
 453         };
 454
 455         i2c2: i2c@e6530000 {
 456                 #address-cells = <1>;
 457                 #size-cells = <0>;
 458                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 459                 reg = <0 0xe6530000 0 0x40>;
 460                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 461                 clocks = <&cpg CPG_MOD 929>;
 462                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 463                 resets = <&cpg 929>;
 464                 i2c-scl-internal-delay-ns = <6>;
 465                 status = "disabled";
 466         };
 467
 468         i2c3: i2c@e6540000 {
 469                 #address-cells = <1>;
 470                 #size-cells = <0>;
 471                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 472                 reg = <0 0xe6540000 0 0x40>;
 473                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 474                 clocks = <&cpg CPG_MOD 928>;
 475                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 476                 resets = <&cpg 928>;
 477                 i2c-scl-internal-delay-ns = <6>;
 478                 status = "disabled";
 479         };
 480
 481         i2c4: i2c@e6520000 {
 482                 #address-cells = <1>;
 483                 #size-cells = <0>;
 484                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 485                 reg = <0 0xe6520000 0 0x40>;
 486                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 487                 clocks = <&cpg CPG_MOD 927>;
 488                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 489                 resets = <&cpg 927>;
 490                 i2c-scl-internal-delay-ns = <6>;
 491                 status = "disabled";
 492         };
 493
 494         i2c5: i2c@e6528000 {
 495                 /* doesn't need pinmux */
 496                 #address-cells = <1>;
 497                 #size-cells = <0>;
 498                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 499                 reg = <0 0xe6528000 0 0x40>;
 500                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 501                 clocks = <&cpg CPG_MOD 925>;
 502                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 503                 resets = <&cpg 925>;
 504                 i2c-scl-internal-delay-ns = <110>;
 505                 status = "disabled";
 506         };
 507
 508         i2c6: i2c@e60b0000 {
 509                 /* doesn't need pinmux */
 510                 #address-cells = <1>;
 511                 #size-cells = <0>;
 512                 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
 513                              "renesas,rmobile-iic";
 514                 reg = <0 0xe60b0000 0 0x425>;
 515                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 516                 clocks = <&cpg CPG_MOD 926>;
 517                 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 518                        <&dmac1 0x77>, <&dmac1 0x78>;
 519                 dma-names = "tx", "rx", "tx", "rx";
 520                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 521                 resets = <&cpg 926>;
 522                 status = "disabled";
 523         };
 524
 525         i2c7: i2c@e6500000 {
 526                 #address-cells = <1>;
 527                 #size-cells = <0>;
 528                 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
 529                              "renesas,rmobile-iic";
 530                 reg = <0 0xe6500000 0 0x425>;
 531                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 532                 clocks = <&cpg CPG_MOD 318>;
 533                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 534                        <&dmac1 0x61>, <&dmac1 0x62>;
 535                 dma-names = "tx", "rx", "tx", "rx";
 536                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 537                 resets = <&cpg 318>;
 538                 status = "disabled";
 539         };
 540
 541         i2c8: i2c@e6510000 {
 542                 #address-cells = <1>;
 543                 #size-cells = <0>;
 544                 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
 545                              "renesas,rmobile-iic";
 546                 reg = <0 0xe6510000 0 0x425>;
 547                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 548                 clocks = <&cpg CPG_MOD 323>;
 549                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 550                        <&dmac1 0x65>, <&dmac1 0x66>;
 551                 dma-names = "tx", "rx", "tx", "rx";
 552                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 553                 resets = <&cpg 323>;
 554                 status = "disabled";
 555         };
 556
 557         pfc: pin-controller@e6060000 {
 558                 compatible = "renesas,pfc-r8a7793";
 559                 reg = <0 0xe6060000 0 0x250>;
 560         };
 561
 562         sdhi0: sd@ee100000 {
 563                 compatible = "renesas,sdhi-r8a7793";
 564                 reg = <0 0xee100000 0 0x328>;
 565                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 566                 clocks = <&cpg CPG_MOD 314>;
 567                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 568                        <&dmac1 0xcd>, <&dmac1 0xce>;
 569                 dma-names = "tx", "rx", "tx", "rx";
 570                 max-frequency = <195000000>;
 571                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 572                 resets = <&cpg 314>;
 573                 status = "disabled";
 574         };
 575
 576         sdhi1: sd@ee140000 {
 577                 compatible = "renesas,sdhi-r8a7793";
 578                 reg = <0 0xee140000 0 0x100>;
 579                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 580                 clocks = <&cpg CPG_MOD 312>;
 581                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 582                        <&dmac1 0xc1>, <&dmac1 0xc2>;
 583                 dma-names = "tx", "rx", "tx", "rx";
 584                 max-frequency = <97500000>;
 585                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 586                 resets = <&cpg 312>;
 587                 status = "disabled";
 588         };
 589
 590         sdhi2: sd@ee160000 {
 591                 compatible = "renesas,sdhi-r8a7793";
 592                 reg = <0 0xee160000 0 0x100>;
 593                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 594                 clocks = <&cpg CPG_MOD 311>;
 595                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 596                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 597                 dma-names = "tx", "rx", "tx", "rx";
 598                 max-frequency = <97500000>;
 599                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 600                 resets = <&cpg 311>;
 601                 status = "disabled";
 602         };
 603
 604         mmcif0: mmc@ee200000 {
 605                 compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
 606                 reg = <0 0xee200000 0 0x80>;
 607                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 608                 clocks = <&cpg CPG_MOD 315>;
 609                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 610                        <&dmac1 0xd1>, <&dmac1 0xd2>;
 611                 dma-names = "tx", "rx", "tx", "rx";
 612                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 613                 resets = <&cpg 315>;
 614                 reg-io-width = <4>;
 615                 status = "disabled";
 616                 max-frequency = <97500000>;
 617         };
 618
 619         scifa0: serial@e6c40000 {
 620                 compatible = "renesas,scifa-r8a7793",
 621                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 622                 reg = <0 0xe6c40000 0 64>;
 623                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 624                 clocks = <&cpg CPG_MOD 204>;
 625                 clock-names = "fck";
 626                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 627                        <&dmac1 0x21>, <&dmac1 0x22>;
 628                 dma-names = "tx", "rx", "tx", "rx";
 629                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 630                 resets = <&cpg 204>;
 631                 status = "disabled";
 632         };
 633
 634         scifa1: serial@e6c50000 {
 635                 compatible = "renesas,scifa-r8a7793",
 636                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 637                 reg = <0 0xe6c50000 0 64>;
 638                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 639                 clocks = <&cpg CPG_MOD 203>;
 640                 clock-names = "fck";
 641                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 642                        <&dmac1 0x25>, <&dmac1 0x26>;
 643                 dma-names = "tx", "rx", "tx", "rx";
 644                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 645                 resets = <&cpg 203>;
 646                 status = "disabled";
 647         };
 648
 649         scifa2: serial@e6c60000 {
 650                 compatible = "renesas,scifa-r8a7793",
 651                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 652                 reg = <0 0xe6c60000 0 64>;
 653                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 654                 clocks = <&cpg CPG_MOD 202>;
 655                 clock-names = "fck";
 656                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 657                        <&dmac1 0x27>, <&dmac1 0x28>;
 658                 dma-names = "tx", "rx", "tx", "rx";
 659                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 660                 resets = <&cpg 202>;
 661                 status = "disabled";
 662         };
 663
 664         scifa3: serial@e6c70000 {
 665                 compatible = "renesas,scifa-r8a7793",
 666                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 667                 reg = <0 0xe6c70000 0 64>;
 668                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 669                 clocks = <&cpg CPG_MOD 1106>;
 670                 clock-names = "fck";
 671                 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 672                        <&dmac1 0x1b>, <&dmac1 0x1c>;
 673                 dma-names = "tx", "rx", "tx", "rx";
 674                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 675                 resets = <&cpg 1106>;
 676                 status = "disabled";
 677         };
 678
 679         scifa4: serial@e6c78000 {
 680                 compatible = "renesas,scifa-r8a7793",
 681                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 682                 reg = <0 0xe6c78000 0 64>;
 683                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 684                 clocks = <&cpg CPG_MOD 1107>;
 685                 clock-names = "fck";
 686                 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 687                        <&dmac1 0x1f>, <&dmac1 0x20>;
 688                 dma-names = "tx", "rx", "tx", "rx";
 689                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 690                 resets = <&cpg 1107>;
 691                 status = "disabled";
 692         };
 693
 694         scifa5: serial@e6c80000 {
 695                 compatible = "renesas,scifa-r8a7793",
 696                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 697                 reg = <0 0xe6c80000 0 64>;
 698                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 699                 clocks = <&cpg CPG_MOD 1108>;
 700                 clock-names = "fck";
 701                 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 702                        <&dmac1 0x23>, <&dmac1 0x24>;
 703                 dma-names = "tx", "rx", "tx", "rx";
 704                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 705                 resets = <&cpg 1108>;
 706                 status = "disabled";
 707         };
 708
 709         scifb0: serial@e6c20000 {
 710                 compatible = "renesas,scifb-r8a7793",
 711                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 712                 reg = <0 0xe6c20000 0 0x100>;
 713                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 714                 clocks = <&cpg CPG_MOD 206>;
 715                 clock-names = "fck";
 716                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 717                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 718                 dma-names = "tx", "rx", "tx", "rx";
 719                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 720                 resets = <&cpg 206>;
 721                 status = "disabled";
 722         };
 723
 724         scifb1: serial@e6c30000 {
 725                 compatible = "renesas,scifb-r8a7793",
 726                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 727                 reg = <0 0xe6c30000 0 0x100>;
 728                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 729                 clocks = <&cpg CPG_MOD 207>;
 730                 clock-names = "fck";
 731                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 732                        <&dmac1 0x19>, <&dmac1 0x1a>;
 733                 dma-names = "tx", "rx", "tx", "rx";
 734                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 735                 resets = <&cpg 207>;
 736                 status = "disabled";
 737         };
 738
 739         scifb2: serial@e6ce0000 {
 740                 compatible = "renesas,scifb-r8a7793",
 741                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 742                 reg = <0 0xe6ce0000 0 0x100>;
 743                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 744                 clocks = <&cpg CPG_MOD 216>;
 745                 clock-names = "fck";
 746                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 747                        <&dmac1 0x1d>, <&dmac1 0x1e>;
 748                 dma-names = "tx", "rx", "tx", "rx";
 749                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 750                 resets = <&cpg 216>;
 751                 status = "disabled";
 752         };
 753
 754         scif0: serial@e6e60000 {
 755                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 756                              "renesas,scif";
 757                 reg = <0 0xe6e60000 0 64>;
 758                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 759                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 760                          <&scif_clk>;
 761                 clock-names = "fck", "brg_int", "scif_clk";
 762                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 763                        <&dmac1 0x29>, <&dmac1 0x2a>;
 764                 dma-names = "tx", "rx", "tx", "rx";
 765                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 766                 resets = <&cpg 721>;
 767                 status = "disabled";
 768         };
 769
 770         scif1: serial@e6e68000 {
 771                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 772                              "renesas,scif";
 773                 reg = <0 0xe6e68000 0 64>;
 774                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 775                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 776                          <&scif_clk>;
 777                 clock-names = "fck", "brg_int", "scif_clk";
 778                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 779                        <&dmac1 0x2d>, <&dmac1 0x2e>;
 780                 dma-names = "tx", "rx", "tx", "rx";
 781                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 782                 resets = <&cpg 720>;
 783                 status = "disabled";
 784         };
 785
 786         scif2: serial@e6e58000 {
 787                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 788                              "renesas,scif";
 789                 reg = <0 0xe6e58000 0 64>;
 790                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 791                 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 792                          <&scif_clk>;
 793                 clock-names = "fck", "brg_int", "scif_clk";
 794                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 795                        <&dmac1 0x2b>, <&dmac1 0x2c>;
 796                 dma-names = "tx", "rx", "tx", "rx";
 797                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 798                 resets = <&cpg 719>;
 799                 status = "disabled";
 800         };
 801
 802         scif3: serial@e6ea8000 {
 803                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 804                              "renesas,scif";
 805                 reg = <0 0xe6ea8000 0 64>;
 806                 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 807                 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 808                          <&scif_clk>;
 809                 clock-names = "fck", "brg_int", "scif_clk";
 810                 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 811                        <&dmac1 0x2f>, <&dmac1 0x30>;
 812                 dma-names = "tx", "rx", "tx", "rx";
 813                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 814                 resets = <&cpg 718>;
 815                 status = "disabled";
 816         };
 817
 818         scif4: serial@e6ee0000 {
 819                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 820                              "renesas,scif";
 821                 reg = <0 0xe6ee0000 0 64>;
 822                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 823                 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 824                          <&scif_clk>;
 825                 clock-names = "fck", "brg_int", "scif_clk";
 826                 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 827                        <&dmac1 0xfb>, <&dmac1 0xfc>;
 828                 dma-names = "tx", "rx", "tx", "rx";
 829                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 830                 resets = <&cpg 715>;
 831                 status = "disabled";
 832         };
 833
 834         scif5: serial@e6ee8000 {
 835                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 836                              "renesas,scif";
 837                 reg = <0 0xe6ee8000 0 64>;
 838                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 839                 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 840                          <&scif_clk>;
 841                 clock-names = "fck", "brg_int", "scif_clk";
 842                 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 843                        <&dmac1 0xfd>, <&dmac1 0xfe>;
 844                 dma-names = "tx", "rx", "tx", "rx";
 845                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 846                 resets = <&cpg 714>;
 847                 status = "disabled";
 848         };
 849
 850         hscif0: serial@e62c0000 {
 851                 compatible = "renesas,hscif-r8a7793",
 852                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 853                 reg = <0 0xe62c0000 0 96>;
 854                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 855                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 856                          <&scif_clk>;
 857                 clock-names = "fck", "brg_int", "scif_clk";
 858                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 859                        <&dmac1 0x39>, <&dmac1 0x3a>;
 860                 dma-names = "tx", "rx", "tx", "rx";
 861                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 862                 resets = <&cpg 717>;
 863                 status = "disabled";
 864         };
 865
 866         hscif1: serial@e62c8000 {
 867                 compatible = "renesas,hscif-r8a7793",
 868                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 869                 reg = <0 0xe62c8000 0 96>;
 870                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 871                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 872                          <&scif_clk>;
 873                 clock-names = "fck", "brg_int", "scif_clk";
 874                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 875                        <&dmac1 0x4d>, <&dmac1 0x4e>;
 876                 dma-names = "tx", "rx", "tx", "rx";
 877                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 878                 resets = <&cpg 716>;
 879                 status = "disabled";
 880         };
 881
 882         hscif2: serial@e62d0000 {
 883                 compatible = "renesas,hscif-r8a7793",
 884                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 885                 reg = <0 0xe62d0000 0 96>;
 886                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 887                 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 888                          <&scif_clk>;
 889                 clock-names = "fck", "brg_int", "scif_clk";
 890                 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 891                        <&dmac1 0x3b>, <&dmac1 0x3c>;
 892                 dma-names = "tx", "rx", "tx", "rx";
 893                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 894                 resets = <&cpg 713>;
 895                 status = "disabled";
 896         };
 897
 898         icram0: sram@e63a0000 {
 899                 compatible = "mmio-sram";
 900                 reg = <0 0xe63a0000 0 0x12000>;
 901         };
 902
 903         icram1: sram@e63c0000 {
 904                 compatible = "mmio-sram";
 905                 reg = <0 0xe63c0000 0 0x1000>;
 906                 #address-cells = <1>;
 907                 #size-cells = <1>;
 908                 ranges = <0 0 0xe63c0000 0x1000>;
 909
 910                 smp-sram@0 {
 911                         compatible = "renesas,smp-sram";
 912                         reg = <0 0x10>;
 913                 };
 914         };
 915
 916         ether: ethernet@ee700000 {
 917                 compatible = "renesas,ether-r8a7793";
 918                 reg = <0 0xee700000 0 0x400>;
 919                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 920                 clocks = <&cpg CPG_MOD 813>;
 921                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 922                 resets = <&cpg 813>;
 923                 phy-mode = "rmii";
 924                 #address-cells = <1>;
 925                 #size-cells = <0>;
 926                 status = "disabled";
 927         };
 928
 929         vin0: video@e6ef0000 {
 930                 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
 931                 reg = <0 0xe6ef0000 0 0x1000>;
 932                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 933                 clocks = <&cpg CPG_MOD 811>;
 934                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 935                 resets = <&cpg 811>;
 936                 status = "disabled";
 937         };
 938
 939         vin1: video@e6ef1000 {
 940                 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
 941                 reg = <0 0xe6ef1000 0 0x1000>;
 942                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 943                 clocks = <&cpg CPG_MOD 810>;
 944                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 945                 resets = <&cpg 810>;
 946                 status = "disabled";
 947         };
 948
 949         vin2: video@e6ef2000 {
 950                 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
 951                 reg = <0 0xe6ef2000 0 0x1000>;
 952                 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 953                 clocks = <&cpg CPG_MOD 809>;
 954                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 955                 resets = <&cpg 809>;
 956                 status = "disabled";
 957         };
 958
 959         qspi: spi@e6b10000 {
 960                 compatible = "renesas,qspi-r8a7793", "renesas,qspi";
 961                 reg = <0 0xe6b10000 0 0x2c>;
 962                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 963                 clocks = <&cpg CPG_MOD 917>;
 964                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 965                        <&dmac1 0x17>, <&dmac1 0x18>;
 966                 dma-names = "tx", "rx", "tx", "rx";
 967                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 968                 resets = <&cpg 917>;
 969                 num-cs = <1>;
 970                 #address-cells = <1>;
 971                 #size-cells = <0>;
 972                 status = "disabled";
 973         };
 974
 975         du: display@feb00000 {
 976                 compatible = "renesas,du-r8a7793";
 977                 reg = <0 0xfeb00000 0 0x40000>,
 978                       <0 0xfeb90000 0 0x1c>;
 979                 reg-names = "du", "lvds.0";
 980                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
 981                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 982                 clocks = <&cpg CPG_MOD 724>,
 983                          <&cpg CPG_MOD 723>,
 984                          <&cpg CPG_MOD 726>;
 985                 clock-names = "du.0", "du.1", "lvds.0";
 986                 status = "disabled";
 987
 988                 ports {
 989                         #address-cells = <1>;
 990                         #size-cells = <0>;
 991
 992                         port@0 {
 993                                 reg = <0>;
 994                                 du_out_rgb: endpoint {
 995                                 };
 996                         };
 997                         port@1 {
 998                                 reg = <1>;
 999                                 du_out_lvds0: endpoint {
1000                                 };
1001                         };
1002                 };
1003         };
1004
1005         can0: can@e6e80000 {
1006                 compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
1007                 reg = <0 0xe6e80000 0 0x1000>;
1008                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1009                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
1010                          <&can_clk>;
1011                 clock-names = "clkp1", "clkp2", "can_clk";
1012                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1013                 resets = <&cpg 916>;
1014                 status = "disabled";
1015         };
1016
1017         can1: can@e6e88000 {
1018                 compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
1019                 reg = <0 0xe6e88000 0 0x1000>;
1020                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1021                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
1022                          <&can_clk>;
1023                 clock-names = "clkp1", "clkp2", "can_clk";
1024                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1025                 resets = <&cpg 915>;
1026                 status = "disabled";
1027         };
1028
1029         /* External root clock */
1030         extal_clk: extal {
1031                 compatible = "fixed-clock";
1032                 #clock-cells = <0>;
1033                 /* This value must be overridden by the board. */
1034                 clock-frequency = <0>;
1035         };
1036
1037         /*
1038          * The external audio clocks are configured as 0 Hz fixed frequency
1039          * clocks by default.
1040          * Boards that provide audio clocks should override them.
1041          */
1042         audio_clk_a: audio_clk_a {
1043                 compatible = "fixed-clock";
1044                 #clock-cells = <0>;
1045                 clock-frequency = <0>;
1046         };
1047         audio_clk_b: audio_clk_b {
1048                 compatible = "fixed-clock";
1049                 #clock-cells = <0>;
1050                 clock-frequency = <0>;
1051         };
1052         audio_clk_c: audio_clk_c {
1053                 compatible = "fixed-clock";
1054                 #clock-cells = <0>;
1055                 clock-frequency = <0>;
1056         };
1057
1058         /* External USB clock - can be overridden by the board */
1059         usb_extal_clk: usb_extal {
1060                 compatible = "fixed-clock";
1061                 #clock-cells = <0>;
1062                 clock-frequency = <48000000>;
1063         };
1064
1065         /* External CAN clock */
1066         can_clk: can {
1067                 compatible = "fixed-clock";
1068                 #clock-cells = <0>;
1069                 /* This value must be overridden by the board. */
1070                 clock-frequency = <0>;
1071         };
1072
1073         /* External SCIF clock */
1074         scif_clk: scif {
1075                 compatible = "fixed-clock";
1076                 #clock-cells = <0>;
1077                 /* This value must be overridden by the board. */
1078                 clock-frequency = <0>;
1079         };
1080
1081         /* Special CPG clocks */
1082         cpg: clock-controller@e6150000 {
1083                 compatible = "renesas,r8a7793-cpg-mssr";
1084                 reg = <0 0xe6150000 0 0x1000>;
1085                 clocks = <&extal_clk>, <&usb_extal_clk>;
1086                 clock-names = "extal", "usb_extal";
1087                 #clock-cells = <2>;
1088                 #power-domain-cells = <0>;
1089                 #reset-cells = <1>;
1090         };
1091
1092         rst: reset-controller@e6160000 {
1093                 compatible = "renesas,r8a7793-rst";
1094                 reg = <0 0xe6160000 0 0x0100>;
1095         };
1096
1097         prr: chipid@ff000044 {
1098                 compatible = "renesas,prr";
1099                 reg = <0 0xff000044 0 4>;
1100         };
1101
1102         sysc: system-controller@e6180000 {
1103                 compatible = "renesas,r8a7793-sysc";
1104                 reg = <0 0xe6180000 0 0x0200>;
1105                 #power-domain-cells = <1>;
1106         };
1107
1108         ipmmu_sy0: mmu@e6280000 {
1109                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1110                 reg = <0 0xe6280000 0 0x1000>;
1111                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1112                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1113                 #iommu-cells = <1>;
1114                 status = "disabled";
1115         };
1116
1117         ipmmu_sy1: mmu@e6290000 {
1118                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1119                 reg = <0 0xe6290000 0 0x1000>;
1120                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1121                 #iommu-cells = <1>;
1122                 status = "disabled";
1123         };
1124
1125         ipmmu_ds: mmu@e6740000 {
1126                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1127                 reg = <0 0xe6740000 0 0x1000>;
1128                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1129                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1130                 #iommu-cells = <1>;
1131                 status = "disabled";
1132         };
1133
1134         ipmmu_mp: mmu@ec680000 {
1135                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1136                 reg = <0 0xec680000 0 0x1000>;
1137                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1138                 #iommu-cells = <1>;
1139                 status = "disabled";
1140         };
1141
1142         ipmmu_mx: mmu@fe951000 {
1143                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1144                 reg = <0 0xfe951000 0 0x1000>;
1145                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1146                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1147                 #iommu-cells = <1>;
1148                 status = "disabled";
1149         };
1150
1151         ipmmu_rt: mmu@ffc80000 {
1152                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1153                 reg = <0 0xffc80000 0 0x1000>;
1154                 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1155                 #iommu-cells = <1>;
1156                 status = "disabled";
1157         };
1158
1159         ipmmu_gp: mmu@e62a0000 {
1160                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1161                 reg = <0 0xe62a0000 0 0x1000>;
1162                 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1163                              <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1164                 #iommu-cells = <1>;
1165                 status = "disabled";
1166         };
1167
1168         rcar_sound: sound@ec500000 {
1169                 /*
1170                  * #sound-dai-cells is required
1171                  *
1172                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1173                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1174                  */
1175                 compatible =  "renesas,rcar_sound-r8a7793", "renesas,rcar_sound-gen2";
1176                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1177                         <0 0xec5a0000 0 0x100>,  /* ADG */
1178                         <0 0xec540000 0 0x1000>, /* SSIU */
1179                         <0 0xec541000 0 0x280>,  /* SSI */
1180                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1181                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1182
1183                 clocks = <&cpg CPG_MOD 1005>,
1184                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1185                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1186                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1187                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1188                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1189                          <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1190                          <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1191                          <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1192                          <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1193                          <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1194                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1195                          <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1196                          <&cpg CPG_CORE R8A7793_CLK_M2>;
1197                 clock-names = "ssi-all",
1198                                 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1199                                 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1200                                 "src.9", "src.8", "src.7", "src.6", "src.5",
1201                                 "src.4", "src.3", "src.2", "src.1", "src.0",
1202                                 "dvc.0", "dvc.1",
1203                                 "clk_a", "clk_b", "clk_c", "clk_i";
1204                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1205                 resets = <&cpg 1005>,
1206                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1207                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1208                          <&cpg 1014>, <&cpg 1015>;
1209                 reset-names = "ssi-all",
1210                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1211                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1212
1213                 status = "disabled";
1214
1215                 rcar_sound,dvc {
1216                         dvc0: dvc-0 {
1217                                 dmas = <&audma1 0xbc>;
1218                                 dma-names = "tx";
1219                         };
1220                         dvc1: dvc-1 {
1221                                 dmas = <&audma1 0xbe>;
1222                                 dma-names = "tx";
1223                         };
1224                 };
1225
1226                 rcar_sound,src {
1227                         src0: src-0 {
1228                                 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1229                                 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1230                                 dma-names = "rx", "tx";
1231                         };
1232                         src1: src-1 {
1233                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1234                                 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1235                                 dma-names = "rx", "tx";
1236                         };
1237                         src2: src-2 {
1238                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1239                                 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1240                                 dma-names = "rx", "tx";
1241                         };
1242                         src3: src-3 {
1243                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1244                                 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1245                                 dma-names = "rx", "tx";
1246                         };
1247                         src4: src-4 {
1248                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1249                                 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1250                                 dma-names = "rx", "tx";
1251                         };
1252                         src5: src-5 {
1253                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1254                                 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1255                                 dma-names = "rx", "tx";
1256                         };
1257                         src6: src-6 {
1258                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1259                                 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1260                                 dma-names = "rx", "tx";
1261                         };
1262                         src7: src-7 {
1263                                 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1264                                 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1265                                 dma-names = "rx", "tx";
1266                         };
1267                         src8: src-8 {
1268                                 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1269                                 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1270                                 dma-names = "rx", "tx";
1271                         };
1272                         src9: src-9 {
1273                                 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1274                                 dmas = <&audma0 0x97>, <&audma1 0xba>;
1275                                 dma-names = "rx", "tx";
1276                         };
1277                 };
1278
1279                 rcar_sound,ssi {
1280                         ssi0: ssi-0 {
1281                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1282                                 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1283                                 dma-names = "rx", "tx", "rxu", "txu";
1284                         };
1285                         ssi1: ssi-1 {
1286                                  interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1287                                 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1288                                 dma-names = "rx", "tx", "rxu", "txu";
1289                         };
1290                         ssi2: ssi-2 {
1291                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1292                                 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1293                                 dma-names = "rx", "tx", "rxu", "txu";
1294                         };
1295                         ssi3: ssi-3 {
1296                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1297                                 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1298                                 dma-names = "rx", "tx", "rxu", "txu";
1299                         };
1300                         ssi4: ssi-4 {
1301                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1302                                 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1303                                 dma-names = "rx", "tx", "rxu", "txu";
1304                         };
1305                         ssi5: ssi-5 {
1306                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1307                                 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1308                                 dma-names = "rx", "tx", "rxu", "txu";
1309                         };
1310                         ssi6: ssi-6 {
1311                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1312                                 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1313                                 dma-names = "rx", "tx", "rxu", "txu";
1314                         };
1315                         ssi7: ssi-7 {
1316                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1317                                 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1318                                 dma-names = "rx", "tx", "rxu", "txu";
1319                         };
1320                         ssi8: ssi-8 {
1321                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1322                                 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1323                                 dma-names = "rx", "tx", "rxu", "txu";
1324                         };
1325                         ssi9: ssi-9 {
1326                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1327                                 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1328                                 dma-names = "rx", "tx", "rxu", "txu";
1329                         };
1330                 };
1331         };
1332 };