arch/arm/dts/r8a7793.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car M2-N (R8A77930) SoC
   4  *
   5  * Copyright (C) 2014-2015 Renesas Electronics Corporation
   6  */
   7
   8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11 #include <dt-bindings/power/r8a7793-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a7793";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         aliases {
  19                 i2c0 = &i2c0;
  20                 i2c1 = &i2c1;
  21                 i2c2 = &i2c2;
  22                 i2c3 = &i2c3;
  23                 i2c4 = &i2c4;
  24                 i2c5 = &i2c5;
  25                 i2c6 = &i2c6;
  26                 i2c7 = &i2c7;
  27                 i2c8 = &i2c8;
  28                 spi0 = &qspi;
  29         };
  30
  31         /*
  32          * The external audio clocks are configured as 0 Hz fixed frequency
  33          * clocks by default.
  34          * Boards that provide audio clocks should override them.
  35          */
  36         audio_clk_a: audio_clk_a {
  37                 compatible = "fixed-clock";
  38                 #clock-cells = <0>;
  39                 clock-frequency = <0>;
  40         };
  41         audio_clk_b: audio_clk_b {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46         audio_clk_c: audio_clk_c {
  47                 compatible = "fixed-clock";
  48                 #clock-cells = <0>;
  49                 clock-frequency = <0>;
  50         };
  51
  52         /* External CAN clock */
  53         can_clk: can {
  54                 compatible = "fixed-clock";
  55                 #clock-cells = <0>;
  56                 /* This value must be overridden by the board. */
  57                 clock-frequency = <0>;
  58         };
  59
  60         cpus {
  61                 #address-cells = <1>;
  62                 #size-cells = <0>;
  63                 enable-method = "renesas,apmu";
  64
  65                 cpu0: cpu@0 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a15";
  68                         reg = <0>;
  69                         clock-frequency = <1500000000>;
  70                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  71                         power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
  72                         voltage-tolerance = <1>; /* 1% */
  73                         clock-latency = <300000>; /* 300 us */
  74
  75                         /* kHz - uV - OPPs unknown yet */
  76                         operating-points = <1500000 1000000>,
  77                                            <1312500 1000000>,
  78                                            <1125000 1000000>,
  79                                            < 937500 1000000>,
  80                                            < 750000 1000000>,
  81                                            < 375000 1000000>;
  82                         next-level-cache = <&L2_CA15>;
  83                 };
  84
  85                 cpu1: cpu@1 {
  86                         device_type = "cpu";
  87                         compatible = "arm,cortex-a15";
  88                         reg = <1>;
  89                         clock-frequency = <1500000000>;
  90                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  91                         power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
  92                         voltage-tolerance = <1>; /* 1% */
  93                         clock-latency = <300000>; /* 300 us */
  94
  95                         /* kHz - uV - OPPs unknown yet */
  96                         operating-points = <1500000 1000000>,
  97                                            <1312500 1000000>,
  98                                            <1125000 1000000>,
  99                                            < 937500 1000000>,
 100                                            < 750000 1000000>,
 101                                            < 375000 1000000>;
 102                         next-level-cache = <&L2_CA15>;
 103                 };
 104
 105                 L2_CA15: cache-controller-0 {
 106                         compatible = "cache";
 107                         power-domains = <&sysc R8A7793_PD_CA15_SCU>;
 108                         cache-unified;
 109                         cache-level = <2>;
 110                 };
 111         };
 112
 113         /* External root clock */
 114         extal_clk: extal {
 115                 compatible = "fixed-clock";
 116                 #clock-cells = <0>;
 117                 /* This value must be overridden by the board. */
 118                 clock-frequency = <0>;
 119         };
 120
 121         pmu {
 122                 compatible = "arm,cortex-a15-pmu";
 123                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 124                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 125                 interrupt-affinity = <&cpu0>, <&cpu1>;
 126         };
 127
 128         /* External SCIF clock */
 129         scif_clk: scif {
 130                 compatible = "fixed-clock";
 131                 #clock-cells = <0>;
 132                 /* This value must be overridden by the board. */
 133                 clock-frequency = <0>;
 134         };
 135
 136         soc {
 137                 compatible = "simple-bus";
 138                 interrupt-parent = <&gic>;
 139
 140                 #address-cells = <2>;
 141                 #size-cells = <2>;
 142                 ranges;
 143
 144                 rwdt: watchdog@e6020000 {
 145                         compatible = "renesas,r8a7793-wdt",
 146                                      "renesas,rcar-gen2-wdt";
 147                         reg = <0 0xe6020000 0 0x0c>;
 148                         clocks = <&cpg CPG_MOD 402>;
 149                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 150                         resets = <&cpg 402>;
 151                         status = "disabled";
 152                 };
 153
 154                 gpio0: gpio@e6050000 {
 155                         compatible = "renesas,gpio-r8a7793",
 156                                      "renesas,rcar-gen2-gpio";
 157                         reg = <0 0xe6050000 0 0x50>;
 158                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 159                         #gpio-cells = <2>;
 160                         gpio-controller;
 161                         gpio-ranges = <&pfc 0 0 32>;
 162                         #interrupt-cells = <2>;
 163                         interrupt-controller;
 164                         clocks = <&cpg CPG_MOD 912>;
 165                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 166                         resets = <&cpg 912>;
 167                 };
 168
 169                 gpio1: gpio@e6051000 {
 170                         compatible = "renesas,gpio-r8a7793",
 171                                      "renesas,rcar-gen2-gpio";
 172                         reg = <0 0xe6051000 0 0x50>;
 173                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 174                         #gpio-cells = <2>;
 175                         gpio-controller;
 176                         gpio-ranges = <&pfc 0 32 26>;
 177                         #interrupt-cells = <2>;
 178                         interrupt-controller;
 179                         clocks = <&cpg CPG_MOD 911>;
 180                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 181                         resets = <&cpg 911>;
 182                 };
 183
 184                 gpio2: gpio@e6052000 {
 185                         compatible = "renesas,gpio-r8a7793",
 186                                      "renesas,rcar-gen2-gpio";
 187                         reg = <0 0xe6052000 0 0x50>;
 188                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 189                         #gpio-cells = <2>;
 190                         gpio-controller;
 191                         gpio-ranges = <&pfc 0 64 32>;
 192                         #interrupt-cells = <2>;
 193                         interrupt-controller;
 194                         clocks = <&cpg CPG_MOD 910>;
 195                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 196                         resets = <&cpg 910>;
 197                 };
 198
 199                 gpio3: gpio@e6053000 {
 200                         compatible = "renesas,gpio-r8a7793",
 201                                      "renesas,rcar-gen2-gpio";
 202                         reg = <0 0xe6053000 0 0x50>;
 203                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 204                         #gpio-cells = <2>;
 205                         gpio-controller;
 206                         gpio-ranges = <&pfc 0 96 32>;
 207                         #interrupt-cells = <2>;
 208                         interrupt-controller;
 209                         clocks = <&cpg CPG_MOD 909>;
 210                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 211                         resets = <&cpg 909>;
 212                 };
 213
 214                 gpio4: gpio@e6054000 {
 215                         compatible = "renesas,gpio-r8a7793",
 216                                      "renesas,rcar-gen2-gpio";
 217                         reg = <0 0xe6054000 0 0x50>;
 218                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 219                         #gpio-cells = <2>;
 220                         gpio-controller;
 221                         gpio-ranges = <&pfc 0 128 32>;
 222                         #interrupt-cells = <2>;
 223                         interrupt-controller;
 224                         clocks = <&cpg CPG_MOD 908>;
 225                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 226                         resets = <&cpg 908>;
 227                 };
 228
 229                 gpio5: gpio@e6055000 {
 230                         compatible = "renesas,gpio-r8a7793",
 231                                      "renesas,rcar-gen2-gpio";
 232                         reg = <0 0xe6055000 0 0x50>;
 233                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 234                         #gpio-cells = <2>;
 235                         gpio-controller;
 236                         gpio-ranges = <&pfc 0 160 32>;
 237                         #interrupt-cells = <2>;
 238                         interrupt-controller;
 239                         clocks = <&cpg CPG_MOD 907>;
 240                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 241                         resets = <&cpg 907>;
 242                 };
 243
 244                 gpio6: gpio@e6055400 {
 245                         compatible = "renesas,gpio-r8a7793",
 246                                      "renesas,rcar-gen2-gpio";
 247                         reg = <0 0xe6055400 0 0x50>;
 248                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 249                         #gpio-cells = <2>;
 250                         gpio-controller;
 251                         gpio-ranges = <&pfc 0 192 32>;
 252                         #interrupt-cells = <2>;
 253                         interrupt-controller;
 254                         clocks = <&cpg CPG_MOD 905>;
 255                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 256                         resets = <&cpg 905>;
 257                 };
 258
 259                 gpio7: gpio@e6055800 {
 260                         compatible = "renesas,gpio-r8a7793",
 261                                      "renesas,rcar-gen2-gpio";
 262                         reg = <0 0xe6055800 0 0x50>;
 263                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 264                         #gpio-cells = <2>;
 265                         gpio-controller;
 266                         gpio-ranges = <&pfc 0 224 26>;
 267                         #interrupt-cells = <2>;
 268                         interrupt-controller;
 269                         clocks = <&cpg CPG_MOD 904>;
 270                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 271                         resets = <&cpg 904>;
 272                 };
 273
 274                 pfc: pin-controller@e6060000 {
 275                         compatible = "renesas,pfc-r8a7793";
 276                         reg = <0 0xe6060000 0 0x250>;
 277                 };
 278
 279                 /* Special CPG clocks */
 280                 cpg: clock-controller@e6150000 {
 281                         compatible = "renesas,r8a7793-cpg-mssr";
 282                         reg = <0 0xe6150000 0 0x1000>;
 283                         clocks = <&extal_clk>, <&usb_extal_clk>;
 284                         clock-names = "extal", "usb_extal";
 285                         #clock-cells = <2>;
 286                         #power-domain-cells = <0>;
 287                         #reset-cells = <1>;
 288                 };
 289
 290                 apmu@e6152000 {
 291                         compatible = "renesas,r8a7793-apmu", "renesas,apmu";
 292                         reg = <0 0xe6152000 0 0x188>;
 293                         cpus = <&cpu0 &cpu1>;
 294                 };
 295
 296                 rst: reset-controller@e6160000 {
 297                         compatible = "renesas,r8a7793-rst";
 298                         reg = <0 0xe6160000 0 0x0100>;
 299                 };
 300
 301                 sysc: system-controller@e6180000 {
 302                         compatible = "renesas,r8a7793-sysc";
 303                         reg = <0 0xe6180000 0 0x0200>;
 304                         #power-domain-cells = <1>;
 305                 };
 306
 307                 irqc0: interrupt-controller@e61c0000 {
 308                         compatible = "renesas,irqc-r8a7793", "renesas,irqc";
 309                         #interrupt-cells = <2>;
 310                         interrupt-controller;
 311                         reg = <0 0xe61c0000 0 0x200>;
 312                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 313                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 314                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 315                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 316                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 317                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 318                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 319                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 320                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 321                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 322                         clocks = <&cpg CPG_MOD 407>;
 323                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 324                         resets = <&cpg 407>;
 325                 };
 326
 327                 thermal: thermal@e61f0000 {
 328                         compatible = "renesas,thermal-r8a7793",
 329                                      "renesas,rcar-gen2-thermal",
 330                                      "renesas,rcar-thermal";
 331                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
 332                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 333                         clocks = <&cpg CPG_MOD 522>;
 334                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 335                         resets = <&cpg 522>;
 336                         #thermal-sensor-cells = <0>;
 337                 };
 338
 339                 ipmmu_sy0: mmu@e6280000 {
 340                         compatible = "renesas,ipmmu-r8a7793",
 341                                      "renesas,ipmmu-vmsa";
 342                         reg = <0 0xe6280000 0 0x1000>;
 343                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
 344                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 345                         #iommu-cells = <1>;
 346                         status = "disabled";
 347                 };
 348
 349                 ipmmu_sy1: mmu@e6290000 {
 350                         compatible = "renesas,ipmmu-r8a7793",
 351                                      "renesas,ipmmu-vmsa";
 352                         reg = <0 0xe6290000 0 0x1000>;
 353                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 354                         #iommu-cells = <1>;
 355                         status = "disabled";
 356                 };
 357
 358                 ipmmu_ds: mmu@e6740000 {
 359                         compatible = "renesas,ipmmu-r8a7793",
 360                                      "renesas,ipmmu-vmsa";
 361                         reg = <0 0xe6740000 0 0x1000>;
 362                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
 363                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
 364                         #iommu-cells = <1>;
 365                         status = "disabled";
 366                 };
 367
 368                 ipmmu_mp: mmu@ec680000 {
 369                         compatible = "renesas,ipmmu-r8a7793",
 370                                      "renesas,ipmmu-vmsa";
 371                         reg = <0 0xec680000 0 0x1000>;
 372                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 373                         #iommu-cells = <1>;
 374                         status = "disabled";
 375                 };
 376
 377                 ipmmu_mx: mmu@fe951000 {
 378                         compatible = "renesas,ipmmu-r8a7793",
 379                                      "renesas,ipmmu-vmsa";
 380                         reg = <0 0xfe951000 0 0x1000>;
 381                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
 382                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 383                         #iommu-cells = <1>;
 384                         status = "disabled";
 385                 };
 386
 387                 ipmmu_rt: mmu@ffc80000 {
 388                         compatible = "renesas,ipmmu-r8a7793",
 389                                      "renesas,ipmmu-vmsa";
 390                         reg = <0 0xffc80000 0 0x1000>;
 391                         interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
 392                         #iommu-cells = <1>;
 393                         status = "disabled";
 394                 };
 395
 396                 ipmmu_gp: mmu@e62a0000 {
 397                         compatible = "renesas,ipmmu-r8a7793",
 398                                      "renesas,ipmmu-vmsa";
 399                         reg = <0 0xe62a0000 0 0x1000>;
 400                         interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
 401                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
 402                         #iommu-cells = <1>;
 403                         status = "disabled";
 404                 };
 405
 406                 icram0: sram@e63a0000 {
 407                         compatible = "mmio-sram";
 408                         reg = <0 0xe63a0000 0 0x12000>;
 409                         #address-cells = <1>;
 410                         #size-cells = <1>;
 411                         ranges = <0 0 0xe63a0000 0x12000>;
 412                 };
 413
 414                 icram1: sram@e63c0000 {
 415                         compatible = "mmio-sram";
 416                         reg = <0 0xe63c0000 0 0x1000>;
 417                         #address-cells = <1>;
 418                         #size-cells = <1>;
 419                         ranges = <0 0 0xe63c0000 0x1000>;
 420
 421                         smp-sram@0 {
 422                                 compatible = "renesas,smp-sram";
 423                                 reg = <0 0x100>;
 424                         };
 425                 };
 426
 427                 /* The memory map in the User's Manual maps the cores to
 428                  * bus numbers
 429                  */
 430                 i2c0: i2c@e6508000 {
 431                         #address-cells = <1>;
 432                         #size-cells = <0>;
 433                         compatible = "renesas,i2c-r8a7793",
 434                                      "renesas,rcar-gen2-i2c";
 435                         reg = <0 0xe6508000 0 0x40>;
 436                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 437                         clocks = <&cpg CPG_MOD 931>;
 438                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 439                         resets = <&cpg 931>;
 440                         i2c-scl-internal-delay-ns = <6>;
 441                         status = "disabled";
 442                 };
 443
 444                 i2c1: i2c@e6518000 {
 445                         #address-cells = <1>;
 446                         #size-cells = <0>;
 447                         compatible = "renesas,i2c-r8a7793",
 448                                      "renesas,rcar-gen2-i2c";
 449                         reg = <0 0xe6518000 0 0x40>;
 450                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 451                         clocks = <&cpg CPG_MOD 930>;
 452                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 453                         resets = <&cpg 930>;
 454                         i2c-scl-internal-delay-ns = <6>;
 455                         status = "disabled";
 456                 };
 457
 458                 i2c2: i2c@e6530000 {
 459                         #address-cells = <1>;
 460                         #size-cells = <0>;
 461                         compatible = "renesas,i2c-r8a7793",
 462                                      "renesas,rcar-gen2-i2c";
 463                         reg = <0 0xe6530000 0 0x40>;
 464                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 465                         clocks = <&cpg CPG_MOD 929>;
 466                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 467                         resets = <&cpg 929>;
 468                         i2c-scl-internal-delay-ns = <6>;
 469                         status = "disabled";
 470                 };
 471
 472                 i2c3: i2c@e6540000 {
 473                         #address-cells = <1>;
 474                         #size-cells = <0>;
 475                         compatible = "renesas,i2c-r8a7793",
 476                                      "renesas,rcar-gen2-i2c";
 477                         reg = <0 0xe6540000 0 0x40>;
 478                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 479                         clocks = <&cpg CPG_MOD 928>;
 480                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 481                         resets = <&cpg 928>;
 482                         i2c-scl-internal-delay-ns = <6>;
 483                         status = "disabled";
 484                 };
 485
 486                 i2c4: i2c@e6520000 {
 487                         #address-cells = <1>;
 488                         #size-cells = <0>;
 489                         compatible = "renesas,i2c-r8a7793",
 490                                      "renesas,rcar-gen2-i2c";
 491                         reg = <0 0xe6520000 0 0x40>;
 492                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 493                         clocks = <&cpg CPG_MOD 927>;
 494                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 495                         resets = <&cpg 927>;
 496                         i2c-scl-internal-delay-ns = <6>;
 497                         status = "disabled";
 498                 };
 499
 500                 i2c5: i2c@e6528000 {
 501                         /* doesn't need pinmux */
 502                         #address-cells = <1>;
 503                         #size-cells = <0>;
 504                         compatible = "renesas,i2c-r8a7793",
 505                                      "renesas,rcar-gen2-i2c";
 506                         reg = <0 0xe6528000 0 0x40>;
 507                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 508                         clocks = <&cpg CPG_MOD 925>;
 509                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 510                         resets = <&cpg 925>;
 511                         i2c-scl-internal-delay-ns = <110>;
 512                         status = "disabled";
 513                 };
 514
 515                 i2c6: i2c@e60b0000 {
 516                         /* doesn't need pinmux */
 517                         #address-cells = <1>;
 518                         #size-cells = <0>;
 519                         compatible = "renesas,iic-r8a7793",
 520                                      "renesas,rcar-gen2-iic",
 521                                      "renesas,rmobile-iic";
 522                         reg = <0 0xe60b0000 0 0x425>;
 523                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 524                         clocks = <&cpg CPG_MOD 926>;
 525                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 526                                <&dmac1 0x77>, <&dmac1 0x78>;
 527                         dma-names = "tx", "rx", "tx", "rx";
 528                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 529                         resets = <&cpg 926>;
 530                         status = "disabled";
 531                 };
 532
 533                 i2c7: i2c@e6500000 {
 534                         #address-cells = <1>;
 535                         #size-cells = <0>;
 536                         compatible = "renesas,iic-r8a7793",
 537                                      "renesas,rcar-gen2-iic",
 538                                      "renesas,rmobile-iic";
 539                         reg = <0 0xe6500000 0 0x425>;
 540                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 541                         clocks = <&cpg CPG_MOD 318>;
 542                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 543                                <&dmac1 0x61>, <&dmac1 0x62>;
 544                         dma-names = "tx", "rx", "tx", "rx";
 545                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 546                         resets = <&cpg 318>;
 547                         status = "disabled";
 548                 };
 549
 550                 i2c8: i2c@e6510000 {
 551                         #address-cells = <1>;
 552                         #size-cells = <0>;
 553                         compatible = "renesas,iic-r8a7793",
 554                                      "renesas,rcar-gen2-iic",
 555                                      "renesas,rmobile-iic";
 556                         reg = <0 0xe6510000 0 0x425>;
 557                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 558                         clocks = <&cpg CPG_MOD 323>;
 559                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 560                                <&dmac1 0x65>, <&dmac1 0x66>;
 561                         dma-names = "tx", "rx", "tx", "rx";
 562                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 563                         resets = <&cpg 323>;
 564                         status = "disabled";
 565                 };
 566
 567                 dmac0: dma-controller@e6700000 {
 568                         compatible = "renesas,dmac-r8a7793",
 569                                      "renesas,rcar-dmac";
 570                         reg = <0 0xe6700000 0 0x20000>;
 571                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
 572                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 573                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 574                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 575                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 576                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 577                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 578                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 579                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 580                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 581                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 582                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 583                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 584                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 585                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 586                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 587                         interrupt-names = "error",
 588                                           "ch0", "ch1", "ch2", "ch3",
 589                                           "ch4", "ch5", "ch6", "ch7",
 590                                           "ch8", "ch9", "ch10", "ch11",
 591                                           "ch12", "ch13", "ch14";
 592                         clocks = <&cpg CPG_MOD 219>;
 593                         clock-names = "fck";
 594                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 595                         resets = <&cpg 219>;
 596                         #dma-cells = <1>;
 597                         dma-channels = <15>;
 598                 };
 599
 600                 dmac1: dma-controller@e6720000 {
 601                         compatible = "renesas,dmac-r8a7793",
 602                                      "renesas,rcar-dmac";
 603                         reg = <0 0xe6720000 0 0x20000>;
 604                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 605                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 606                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 607                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 608                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 611                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 612                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 613                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 614                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 615                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 616                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 617                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 618                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 619                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 620                         interrupt-names = "error",
 621                                           "ch0", "ch1", "ch2", "ch3",
 622                                           "ch4", "ch5", "ch6", "ch7",
 623                                           "ch8", "ch9", "ch10", "ch11",
 624                                           "ch12", "ch13", "ch14";
 625                         clocks = <&cpg CPG_MOD 218>;
 626                         clock-names = "fck";
 627                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 628                         resets = <&cpg 218>;
 629                         #dma-cells = <1>;
 630                         dma-channels = <15>;
 631                 };
 632
 633                 qspi: spi@e6b10000 {
 634                         compatible = "renesas,qspi-r8a7793", "renesas,qspi";
 635                         reg = <0 0xe6b10000 0 0x2c>;
 636                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 637                         clocks = <&cpg CPG_MOD 917>;
 638                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 639                                <&dmac1 0x17>, <&dmac1 0x18>;
 640                         dma-names = "tx", "rx", "tx", "rx";
 641                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 642                         resets = <&cpg 917>;
 643                         num-cs = <1>;
 644                         #address-cells = <1>;
 645                         #size-cells = <0>;
 646                         status = "disabled";
 647                 };
 648
 649                 scifa0: serial@e6c40000 {
 650                         compatible = "renesas,scifa-r8a7793",
 651                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 652                         reg = <0 0xe6c40000 0 64>;
 653                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 654                         clocks = <&cpg CPG_MOD 204>;
 655                         clock-names = "fck";
 656                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 657                                <&dmac1 0x21>, <&dmac1 0x22>;
 658                         dma-names = "tx", "rx", "tx", "rx";
 659                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 660                         resets = <&cpg 204>;
 661                         status = "disabled";
 662                 };
 663
 664                 scifa1: serial@e6c50000 {
 665                         compatible = "renesas,scifa-r8a7793",
 666                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 667                         reg = <0 0xe6c50000 0 64>;
 668                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 669                         clocks = <&cpg CPG_MOD 203>;
 670                         clock-names = "fck";
 671                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 672                                <&dmac1 0x25>, <&dmac1 0x26>;
 673                         dma-names = "tx", "rx", "tx", "rx";
 674                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 675                         resets = <&cpg 203>;
 676                         status = "disabled";
 677                 };
 678
 679                 scifa2: serial@e6c60000 {
 680                         compatible = "renesas,scifa-r8a7793",
 681                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 682                         reg = <0 0xe6c60000 0 64>;
 683                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 684                         clocks = <&cpg CPG_MOD 202>;
 685                         clock-names = "fck";
 686                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 687                                <&dmac1 0x27>, <&dmac1 0x28>;
 688                         dma-names = "tx", "rx", "tx", "rx";
 689                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 690                         resets = <&cpg 202>;
 691                         status = "disabled";
 692                 };
 693
 694                 scifa3: serial@e6c70000 {
 695                         compatible = "renesas,scifa-r8a7793",
 696                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 697                         reg = <0 0xe6c70000 0 64>;
 698                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 699                         clocks = <&cpg CPG_MOD 1106>;
 700                         clock-names = "fck";
 701                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 702                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 703                         dma-names = "tx", "rx", "tx", "rx";
 704                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 705                         resets = <&cpg 1106>;
 706                         status = "disabled";
 707                 };
 708
 709                 scifa4: serial@e6c78000 {
 710                         compatible = "renesas,scifa-r8a7793",
 711                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 712                         reg = <0 0xe6c78000 0 64>;
 713                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 714                         clocks = <&cpg CPG_MOD 1107>;
 715                         clock-names = "fck";
 716                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 717                                <&dmac1 0x1f>, <&dmac1 0x20>;
 718                         dma-names = "tx", "rx", "tx", "rx";
 719                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 720                         resets = <&cpg 1107>;
 721                         status = "disabled";
 722                 };
 723
 724                 scifa5: serial@e6c80000 {
 725                         compatible = "renesas,scifa-r8a7793",
 726                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 727                         reg = <0 0xe6c80000 0 64>;
 728                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 729                         clocks = <&cpg CPG_MOD 1108>;
 730                         clock-names = "fck";
 731                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 732                                <&dmac1 0x23>, <&dmac1 0x24>;
 733                         dma-names = "tx", "rx", "tx", "rx";
 734                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 735                         resets = <&cpg 1108>;
 736                         status = "disabled";
 737                 };
 738
 739                 scifb0: serial@e6c20000 {
 740                         compatible = "renesas,scifb-r8a7793",
 741                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 742                         reg = <0 0xe6c20000 0 0x100>;
 743                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 744                         clocks = <&cpg CPG_MOD 206>;
 745                         clock-names = "fck";
 746                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 747                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 748                         dma-names = "tx", "rx", "tx", "rx";
 749                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 750                         resets = <&cpg 206>;
 751                         status = "disabled";
 752                 };
 753
 754                 scifb1: serial@e6c30000 {
 755                         compatible = "renesas,scifb-r8a7793",
 756                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 757                         reg = <0 0xe6c30000 0 0x100>;
 758                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 759                         clocks = <&cpg CPG_MOD 207>;
 760                         clock-names = "fck";
 761                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 762                                <&dmac1 0x19>, <&dmac1 0x1a>;
 763                         dma-names = "tx", "rx", "tx", "rx";
 764                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 765                         resets = <&cpg 207>;
 766                         status = "disabled";
 767                 };
 768
 769                 scifb2: serial@e6ce0000 {
 770                         compatible = "renesas,scifb-r8a7793",
 771                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 772                         reg = <0 0xe6ce0000 0 0x100>;
 773                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 774                         clocks = <&cpg CPG_MOD 216>;
 775                         clock-names = "fck";
 776                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 777                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 778                         dma-names = "tx", "rx", "tx", "rx";
 779                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 780                         resets = <&cpg 216>;
 781                         status = "disabled";
 782                 };
 783
 784                 scif0: serial@e6e60000 {
 785                         compatible = "renesas,scif-r8a7793",
 786                                      "renesas,rcar-gen2-scif", "renesas,scif";
 787                         reg = <0 0xe6e60000 0 64>;
 788                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 789                         clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 790                                  <&scif_clk>;
 791                         clock-names = "fck", "brg_int", "scif_clk";
 792                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 793                                <&dmac1 0x29>, <&dmac1 0x2a>;
 794                         dma-names = "tx", "rx", "tx", "rx";
 795                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 796                         resets = <&cpg 721>;
 797                         status = "disabled";
 798                 };
 799
 800                 scif1: serial@e6e68000 {
 801                         compatible = "renesas,scif-r8a7793",
 802                                      "renesas,rcar-gen2-scif", "renesas,scif";
 803                         reg = <0 0xe6e68000 0 64>;
 804                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 805                         clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 806                                  <&scif_clk>;
 807                         clock-names = "fck", "brg_int", "scif_clk";
 808                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 809                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 810                         dma-names = "tx", "rx", "tx", "rx";
 811                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 812                         resets = <&cpg 720>;
 813                         status = "disabled";
 814                 };
 815
 816                 scif2: serial@e6e58000 {
 817                         compatible = "renesas,scif-r8a7793",
 818                                      "renesas,rcar-gen2-scif", "renesas,scif";
 819                         reg = <0 0xe6e58000 0 64>;
 820                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 821                         clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 822                                  <&scif_clk>;
 823                         clock-names = "fck", "brg_int", "scif_clk";
 824                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 825                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 826                         dma-names = "tx", "rx", "tx", "rx";
 827                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 828                         resets = <&cpg 719>;
 829                         status = "disabled";
 830                 };
 831
 832                 scif3: serial@e6ea8000 {
 833                         compatible = "renesas,scif-r8a7793",
 834                                      "renesas,rcar-gen2-scif", "renesas,scif";
 835                         reg = <0 0xe6ea8000 0 64>;
 836                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 837                         clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 838                                  <&scif_clk>;
 839                         clock-names = "fck", "brg_int", "scif_clk";
 840                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 841                                <&dmac1 0x2f>, <&dmac1 0x30>;
 842                         dma-names = "tx", "rx", "tx", "rx";
 843                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 844                         resets = <&cpg 718>;
 845                         status = "disabled";
 846                 };
 847
 848                 scif4: serial@e6ee0000 {
 849                         compatible = "renesas,scif-r8a7793",
 850                                      "renesas,rcar-gen2-scif", "renesas,scif";
 851                         reg = <0 0xe6ee0000 0 64>;
 852                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 853                         clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 854                                  <&scif_clk>;
 855                         clock-names = "fck", "brg_int", "scif_clk";
 856                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 857                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 858                         dma-names = "tx", "rx", "tx", "rx";
 859                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 860                         resets = <&cpg 715>;
 861                         status = "disabled";
 862                 };
 863
 864                 scif5: serial@e6ee8000 {
 865                         compatible = "renesas,scif-r8a7793",
 866                                      "renesas,rcar-gen2-scif", "renesas,scif";
 867                         reg = <0 0xe6ee8000 0 64>;
 868                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 869                         clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 870                                  <&scif_clk>;
 871                         clock-names = "fck", "brg_int", "scif_clk";
 872                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 873                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 874                         dma-names = "tx", "rx", "tx", "rx";
 875                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 876                         resets = <&cpg 714>;
 877                         status = "disabled";
 878                 };
 879
 880                 hscif0: serial@e62c0000 {
 881                         compatible = "renesas,hscif-r8a7793",
 882                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 883                         reg = <0 0xe62c0000 0 96>;
 884                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 885                         clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 886                                  <&scif_clk>;
 887                         clock-names = "fck", "brg_int", "scif_clk";
 888                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 889                                <&dmac1 0x39>, <&dmac1 0x3a>;
 890                         dma-names = "tx", "rx", "tx", "rx";
 891                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 892                         resets = <&cpg 717>;
 893                         status = "disabled";
 894                 };
 895
 896                 hscif1: serial@e62c8000 {
 897                         compatible = "renesas,hscif-r8a7793",
 898                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 899                         reg = <0 0xe62c8000 0 96>;
 900                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 901                         clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 902                                  <&scif_clk>;
 903                         clock-names = "fck", "brg_int", "scif_clk";
 904                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 905                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 906                         dma-names = "tx", "rx", "tx", "rx";
 907                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 908                         resets = <&cpg 716>;
 909                         status = "disabled";
 910                 };
 911
 912                 hscif2: serial@e62d0000 {
 913                         compatible = "renesas,hscif-r8a7793",
 914                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 915                         reg = <0 0xe62d0000 0 96>;
 916                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 917                         clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 918                                  <&scif_clk>;
 919                         clock-names = "fck", "brg_int", "scif_clk";
 920                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 921                                <&dmac1 0x3b>, <&dmac1 0x3c>;
 922                         dma-names = "tx", "rx", "tx", "rx";
 923                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 924                         resets = <&cpg 713>;
 925                         status = "disabled";
 926                 };
 927
 928                 can0: can@e6e80000 {
 929                         compatible = "renesas,can-r8a7793",
 930                                      "renesas,rcar-gen2-can";
 931                         reg = <0 0xe6e80000 0 0x1000>;
 932                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 933                         clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
 934                                  <&can_clk>;
 935                         clock-names = "clkp1", "clkp2", "can_clk";
 936                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 937                         resets = <&cpg 916>;
 938                         status = "disabled";
 939                 };
 940
 941                 can1: can@e6e88000 {
 942                         compatible = "renesas,can-r8a7793",
 943                                      "renesas,rcar-gen2-can";
 944                         reg = <0 0xe6e88000 0 0x1000>;
 945                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 946                         clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
 947                                  <&can_clk>;
 948                         clock-names = "clkp1", "clkp2", "can_clk";
 949                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 950                         resets = <&cpg 915>;
 951                         status = "disabled";
 952                 };
 953
 954                 vin0: video@e6ef0000 {
 955                         compatible = "renesas,vin-r8a7793",
 956                                      "renesas,rcar-gen2-vin";
 957                         reg = <0 0xe6ef0000 0 0x1000>;
 958                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 959                         clocks = <&cpg CPG_MOD 811>;
 960                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 961                         resets = <&cpg 811>;
 962                         status = "disabled";
 963                 };
 964
 965                 vin1: video@e6ef1000 {
 966                         compatible = "renesas,vin-r8a7793",
 967                                      "renesas,rcar-gen2-vin";
 968                         reg = <0 0xe6ef1000 0 0x1000>;
 969                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 970                         clocks = <&cpg CPG_MOD 810>;
 971                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 972                         resets = <&cpg 810>;
 973                         status = "disabled";
 974                 };
 975
 976                 vin2: video@e6ef2000 {
 977                         compatible = "renesas,vin-r8a7793",
 978                                      "renesas,rcar-gen2-vin";
 979                         reg = <0 0xe6ef2000 0 0x1000>;
 980                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 981                         clocks = <&cpg CPG_MOD 809>;
 982                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 983                         resets = <&cpg 809>;
 984                         status = "disabled";
 985                 };
 986
 987                 rcar_sound: sound@ec500000 {
 988                         /*
 989                          * #sound-dai-cells is required
 990                          *
 991                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
 992                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
 993                          */
 994                         compatible = "renesas,rcar_sound-r8a7793",
 995                                      "renesas,rcar_sound-gen2";
 996                         reg = <0 0xec500000 0 0x1000>, /* SCU */
 997                               <0 0xec5a0000 0 0x100>,  /* ADG */
 998                               <0 0xec540000 0 0x1000>, /* SSIU */
 999                               <0 0xec541000 0 0x280>,  /* SSI */
1000                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1001                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1002
1003                         clocks = <&cpg CPG_MOD 1005>,
1004                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1005                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1006                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1007                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1008                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1009                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1010                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1011                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1012                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1013                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1014                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1015                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1016                                  <&cpg CPG_CORE R8A7793_CLK_M2>;
1017                         clock-names = "ssi-all",
1018                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1019                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1020                                       "ssi.1", "ssi.0",
1021                                       "src.9", "src.8", "src.7", "src.6",
1022                                       "src.5", "src.4", "src.3", "src.2",
1023                                       "src.1", "src.0",
1024                                       "dvc.0", "dvc.1",
1025                                       "clk_a", "clk_b", "clk_c", "clk_i";
1026                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1027                         resets = <&cpg 1005>,
1028                                  <&cpg 1006>, <&cpg 1007>,
1029                                  <&cpg 1008>, <&cpg 1009>,
1030                                  <&cpg 1010>, <&cpg 1011>,
1031                                  <&cpg 1012>, <&cpg 1013>,
1032                                  <&cpg 1014>, <&cpg 1015>;
1033                         reset-names = "ssi-all",
1034                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1035                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1036                                       "ssi.1", "ssi.0";
1037
1038                         status = "disabled";
1039
1040                         rcar_sound,dvc {
1041                                 dvc0: dvc-0 {
1042                                         dmas = <&audma1 0xbc>;
1043                                         dma-names = "tx";
1044                                 };
1045                                 dvc1: dvc-1 {
1046                                         dmas = <&audma1 0xbe>;
1047                                         dma-names = "tx";
1048                                 };
1049                         };
1050
1051                         rcar_sound,src {
1052                                 src0: src-0 {
1053                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1054                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1055                                         dma-names = "rx", "tx";
1056                                 };
1057                                 src1: src-1 {
1058                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1059                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1060                                         dma-names = "rx", "tx";
1061                                 };
1062                                 src2: src-2 {
1063                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1064                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1065                                         dma-names = "rx", "tx";
1066                                 };
1067                                 src3: src-3 {
1068                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1069                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1070                                         dma-names = "rx", "tx";
1071                                 };
1072                                 src4: src-4 {
1073                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1074                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1075                                         dma-names = "rx", "tx";
1076                                 };
1077                                 src5: src-5 {
1078                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1079                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1080                                         dma-names = "rx", "tx";
1081                                 };
1082                                 src6: src-6 {
1083                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1084                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1085                                         dma-names = "rx", "tx";
1086                                 };
1087                                 src7: src-7 {
1088                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1089                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1090                                         dma-names = "rx", "tx";
1091                                 };
1092                                 src8: src-8 {
1093                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1094                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1095                                         dma-names = "rx", "tx";
1096                                 };
1097                                 src9: src-9 {
1098                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1099                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1100                                         dma-names = "rx", "tx";
1101                                 };
1102                         };
1103
1104                         rcar_sound,ssi {
1105                                 ssi0: ssi-0 {
1106                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1107                                         dmas = <&audma0 0x01>, <&audma1 0x02>,
1108                                                <&audma0 0x15>, <&audma1 0x16>;
1109                                         dma-names = "rx", "tx", "rxu", "txu";
1110                                 };
1111                                 ssi1: ssi-1 {
1112                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1113                                         dmas = <&audma0 0x03>, <&audma1 0x04>,
1114                                                <&audma0 0x49>, <&audma1 0x4a>;
1115                                         dma-names = "rx", "tx", "rxu", "txu";
1116                                 };
1117                                 ssi2: ssi-2 {
1118                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1119                                         dmas = <&audma0 0x05>, <&audma1 0x06>,
1120                                                <&audma0 0x63>, <&audma1 0x64>;
1121                                         dma-names = "rx", "tx", "rxu", "txu";
1122                                 };
1123                                 ssi3: ssi-3 {
1124                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1125                                         dmas = <&audma0 0x07>, <&audma1 0x08>,
1126                                                <&audma0 0x6f>, <&audma1 0x70>;
1127                                         dma-names = "rx", "tx", "rxu", "txu";
1128                                 };
1129                                 ssi4: ssi-4 {
1130                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1131                                         dmas = <&audma0 0x09>, <&audma1 0x0a>,
1132                                                <&audma0 0x71>, <&audma1 0x72>;
1133                                         dma-names = "rx", "tx", "rxu", "txu";
1134                                 };
1135                                 ssi5: ssi-5 {
1136                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1137                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1138                                                <&audma0 0x73>, <&audma1 0x74>;
1139                                         dma-names = "rx", "tx", "rxu", "txu";
1140                                 };
1141                                 ssi6: ssi-6 {
1142                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1143                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1144                                                <&audma0 0x75>, <&audma1 0x76>;
1145                                         dma-names = "rx", "tx", "rxu", "txu";
1146                                 };
1147                                 ssi7: ssi-7 {
1148                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1149                                         dmas = <&audma0 0x0f>, <&audma1 0x10>,
1150                                                <&audma0 0x79>, <&audma1 0x7a>;
1151                                         dma-names = "rx", "tx", "rxu", "txu";
1152                                 };
1153                                 ssi8: ssi-8 {
1154                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1155                                         dmas = <&audma0 0x11>, <&audma1 0x12>,
1156                                                <&audma0 0x7b>, <&audma1 0x7c>;
1157                                         dma-names = "rx", "tx", "rxu", "txu";
1158                                 };
1159                                 ssi9: ssi-9 {
1160                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1161                                         dmas = <&audma0 0x13>, <&audma1 0x14>,
1162                                                <&audma0 0x7d>, <&audma1 0x7e>;
1163                                         dma-names = "rx", "tx", "rxu", "txu";
1164                                 };
1165                         };
1166                 };
1167
1168                 audma0: dma-controller@ec700000 {
1169                         compatible = "renesas,dmac-r8a7793",
1170                                      "renesas,rcar-dmac";
1171                         reg = <0 0xec700000 0 0x10000>;
1172                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1173                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1174                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1175                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1176                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1177                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1178                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1179                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1180                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1181                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1182                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1183                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1184                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1185                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1186                         interrupt-names = "error",
1187                                           "ch0", "ch1", "ch2", "ch3",
1188                                           "ch4", "ch5", "ch6", "ch7",
1189                                           "ch8", "ch9", "ch10", "ch11",
1190                                           "ch12";
1191                         clocks = <&cpg CPG_MOD 502>;
1192                         clock-names = "fck";
1193                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1194                         resets = <&cpg 502>;
1195                         #dma-cells = <1>;
1196                         dma-channels = <13>;
1197                 };
1198
1199                 audma1: dma-controller@ec720000 {
1200                         compatible = "renesas,dmac-r8a7793",
1201                                      "renesas,rcar-dmac";
1202                         reg = <0 0xec720000 0 0x10000>;
1203                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1204                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1205                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1206                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1207                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1208                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1209                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1210                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1211                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1212                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1213                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1214                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1215                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1216                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1217                         interrupt-names = "error",
1218                                           "ch0", "ch1", "ch2", "ch3",
1219                                           "ch4", "ch5", "ch6", "ch7",
1220                                           "ch8", "ch9", "ch10", "ch11",
1221                                           "ch12";
1222                         clocks = <&cpg CPG_MOD 501>;
1223                         clock-names = "fck";
1224                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1225                         resets = <&cpg 501>;
1226                         #dma-cells = <1>;
1227                         dma-channels = <13>;
1228                 };
1229
1230                 sdhi0: sd@ee100000 {
1231                         compatible = "renesas,sdhi-r8a7793",
1232                                      "renesas,rcar-gen2-sdhi";
1233                         reg = <0 0xee100000 0 0x328>;
1234                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1235                         clocks = <&cpg CPG_MOD 314>;
1236                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1237                                <&dmac1 0xcd>, <&dmac1 0xce>;
1238                         dma-names = "tx", "rx", "tx", "rx";
1239                         max-frequency = <195000000>;
1240                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1241                         resets = <&cpg 314>;
1242                         status = "disabled";
1243                 };
1244
1245                 sdhi1: sd@ee140000 {
1246                         compatible = "renesas,sdhi-r8a7793",
1247                                      "renesas,rcar-gen2-sdhi";
1248                         reg = <0 0xee140000 0 0x100>;
1249                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1250                         clocks = <&cpg CPG_MOD 312>;
1251                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1252                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1253                         dma-names = "tx", "rx", "tx", "rx";
1254                         max-frequency = <97500000>;
1255                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1256                         resets = <&cpg 312>;
1257                         status = "disabled";
1258                 };
1259
1260                 sdhi2: sd@ee160000 {
1261                         compatible = "renesas,sdhi-r8a7793",
1262                                      "renesas,rcar-gen2-sdhi";
1263                         reg = <0 0xee160000 0 0x100>;
1264                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1265                         clocks = <&cpg CPG_MOD 311>;
1266                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1267                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1268                         dma-names = "tx", "rx", "tx", "rx";
1269                         max-frequency = <97500000>;
1270                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1271                         resets = <&cpg 311>;
1272                         status = "disabled";
1273                 };
1274
1275                 mmcif0: mmc@ee200000 {
1276                         compatible = "renesas,mmcif-r8a7793",
1277                                      "renesas,sh-mmcif";
1278                         reg = <0 0xee200000 0 0x80>;
1279                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1280                         clocks = <&cpg CPG_MOD 315>;
1281                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1282                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1283                         dma-names = "tx", "rx", "tx", "rx";
1284                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1285                         resets = <&cpg 315>;
1286                         reg-io-width = <4>;
1287                         status = "disabled";
1288                         max-frequency = <97500000>;
1289                 };
1290
1291                 ether: ethernet@ee700000 {
1292                         compatible = "renesas,ether-r8a7793",
1293                                      "renesas,rcar-gen2-ether";
1294                         reg = <0 0xee700000 0 0x400>;
1295                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1296                         clocks = <&cpg CPG_MOD 813>;
1297                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1298                         resets = <&cpg 813>;
1299                         phy-mode = "rmii";
1300                         #address-cells = <1>;
1301                         #size-cells = <0>;
1302                         status = "disabled";
1303                 };
1304
1305                 gic: interrupt-controller@f1001000 {
1306                         compatible = "arm,gic-400";
1307                         #interrupt-cells = <3>;
1308                         #address-cells = <0>;
1309                         interrupt-controller;
1310                         reg = <0 0xf1001000 0 0x1000>,
1311                                 <0 0xf1002000 0 0x2000>,
1312                                 <0 0xf1004000 0 0x2000>,
1313                                 <0 0xf1006000 0 0x2000>;
1314                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1315                         clocks = <&cpg CPG_MOD 408>;
1316                         clock-names = "clk";
1317                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1318                         resets = <&cpg 408>;
1319                 };
1320
1321                 fdp1@fe940000 {
1322                         compatible = "renesas,fdp1";
1323                         reg = <0 0xfe940000 0 0x2400>;
1324                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1325                         clocks = <&cpg CPG_MOD 119>;
1326                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1327                         resets = <&cpg 119>;
1328                 };
1329
1330                 fdp1@fe944000 {
1331                         compatible = "renesas,fdp1";
1332                         reg = <0 0xfe944000 0 0x2400>;
1333                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1334                         clocks = <&cpg CPG_MOD 118>;
1335                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1336                         resets = <&cpg 118>;
1337                 };
1338
1339                 du: display@feb00000 {
1340                         compatible = "renesas,du-r8a7793";
1341                         reg = <0 0xfeb00000 0 0x40000>;
1342                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1343                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1344                         clocks = <&cpg CPG_MOD 724>,
1345                                  <&cpg CPG_MOD 723>;
1346                         clock-names = "du.0", "du.1";
1347                         status = "disabled";
1348
1349                         ports {
1350                                 #address-cells = <1>;
1351                                 #size-cells = <0>;
1352
1353                                 port@0 {
1354                                         reg = <0>;
1355                                         du_out_rgb: endpoint {
1356                                         };
1357                                 };
1358                                 port@1 {
1359                                         reg = <1>;
1360                                         du_out_lvds0: endpoint {
1361                                                 remote-endpoint = <&lvds0_in>;
1362                                         };
1363                                 };
1364                         };
1365                 };
1366
1367                 lvds0: lvds@feb90000 {
1368                         compatible = "renesas,r8a7793-lvds";
1369                         reg = <0 0xfeb90000 0 0x1c>;
1370                         clocks = <&cpg CPG_MOD 726>;
1371                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1372                         resets = <&cpg 726>;
1373
1374                         status = "disabled";
1375
1376                         ports {
1377                                 #address-cells = <1>;
1378                                 #size-cells = <0>;
1379
1380                                 port@0 {
1381                                         reg = <0>;
1382                                         lvds0_in: endpoint {
1383                                                 remote-endpoint = <&du_out_lvds0>;
1384                                         };
1385                                 };
1386                                 port@1 {
1387                                         reg = <1>;
1388                                         lvds0_out: endpoint {
1389                                         };
1390                                 };
1391                         };
1392                 };
1393
1394                 prr: chipid@ff000044 {
1395                         compatible = "renesas,prr";
1396                         reg = <0 0xff000044 0 4>;
1397                 };
1398
1399                 cmt0: timer@ffca0000 {
1400                         compatible = "renesas,r8a7793-cmt0",
1401                                      "renesas,rcar-gen2-cmt0";
1402                         reg = <0 0xffca0000 0 0x1004>;
1403                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1404                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1405                         clocks = <&cpg CPG_MOD 124>;
1406                         clock-names = "fck";
1407                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1408                         resets = <&cpg 124>;
1409
1410                         status = "disabled";
1411                 };
1412
1413                 cmt1: timer@e6130000 {
1414                         compatible = "renesas,r8a7793-cmt1",
1415                                      "renesas,rcar-gen2-cmt1";
1416                         reg = <0 0xe6130000 0 0x1004>;
1417                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1418                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1419                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1420                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1421                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1422                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1423                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1424                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1425                         clocks = <&cpg CPG_MOD 329>;
1426                         clock-names = "fck";
1427                         power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1428                         resets = <&cpg 329>;
1429
1430                         status = "disabled";
1431                 };
1432         };
1433
1434         thermal-zones {
1435                 cpu_thermal: cpu-thermal {
1436                         polling-delay-passive = <0>;
1437                         polling-delay = <0>;
1438
1439                         thermal-sensors = <&thermal>;
1440
1441                         trips {
1442                                 cpu-crit {
1443                                         temperature = <95000>;
1444                                         hysteresis = <0>;
1445                                         type = "critical";
1446                                 };
1447                         };
1448                         cooling-maps {
1449                         };
1450                 };
1451         };
1452
1453         timer {
1454                 compatible = "arm,armv7-timer";
1455                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1456                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1457                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1458                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1459         };
1460
1461         /* External USB clock - can be overridden by the board */
1462         usb_extal_clk: usb_extal {
1463                 compatible = "fixed-clock";
1464                 #clock-cells = <0>;
1465                 clock-frequency = <48000000>;
1466         };
1467 };