Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh
[platform/kernel/u-boot.git] / arch / arm / dts / r8a7791.dtsi
1 /*
2  * Device Tree Source for the r8a7791 SoC
3  *
4  * Copyright (C) 2013-2015 Renesas Electronics Corporation
5  * Copyright (C) 2013-2014 Renesas Solutions Corp.
6  * Copyright (C) 2014 Cogent Embedded Inc.
7  *
8  * SPDX-License-Identifier:     GPL-2.0
9  */
10
11 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/power/r8a7791-sysc.h>
15
16 / {
17         compatible = "renesas,r8a7791";
18         interrupt-parent = <&gic>;
19         #address-cells = <2>;
20         #size-cells = <2>;
21
22         aliases {
23                 i2c0 = &i2c0;
24                 i2c1 = &i2c1;
25                 i2c2 = &i2c2;
26                 i2c3 = &i2c3;
27                 i2c4 = &i2c4;
28                 i2c5 = &i2c5;
29                 i2c6 = &i2c6;
30                 i2c7 = &i2c7;
31                 i2c8 = &i2c8;
32                 spi0 = &qspi;
33                 spi1 = &msiof0;
34                 spi2 = &msiof1;
35                 spi3 = &msiof2;
36                 vin0 = &vin0;
37                 vin1 = &vin1;
38                 vin2 = &vin2;
39         };
40
41         cpus {
42                 #address-cells = <1>;
43                 #size-cells = <0>;
44                 enable-method = "renesas,apmu";
45
46                 cpu0: cpu@0 {
47                         device_type = "cpu";
48                         compatible = "arm,cortex-a15";
49                         reg = <0>;
50                         clock-frequency = <1500000000>;
51                         voltage-tolerance = <1>; /* 1% */
52                         clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
53                         clock-latency = <300000>; /* 300 us */
54                         power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
55                         next-level-cache = <&L2_CA15>;
56
57                         /* kHz - uV - OPPs unknown yet */
58                         operating-points = <1500000 1000000>,
59                                            <1312500 1000000>,
60                                            <1125000 1000000>,
61                                            < 937500 1000000>,
62                                            < 750000 1000000>,
63                                            < 375000 1000000>;
64                 };
65
66                 cpu1: cpu@1 {
67                         device_type = "cpu";
68                         compatible = "arm,cortex-a15";
69                         reg = <1>;
70                         clock-frequency = <1500000000>;
71                         clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
72                         power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
73                         next-level-cache = <&L2_CA15>;
74                 };
75
76                 L2_CA15: cache-controller-0 {
77                         compatible = "cache";
78                         power-domains = <&sysc R8A7791_PD_CA15_SCU>;
79                         cache-unified;
80                         cache-level = <2>;
81                 };
82         };
83
84         thermal-zones {
85                 cpu_thermal: cpu-thermal {
86                         polling-delay-passive   = <0>;
87                         polling-delay           = <0>;
88
89                         thermal-sensors = <&thermal>;
90
91                         trips {
92                                 cpu-crit {
93                                         temperature     = <115000>;
94                                         hysteresis      = <0>;
95                                         type            = "critical";
96                                 };
97                         };
98                         cooling-maps {
99                         };
100                 };
101         };
102
103         apmu@e6152000 {
104                 compatible = "renesas,r8a7791-apmu", "renesas,apmu";
105                 reg = <0 0xe6152000 0 0x188>;
106                 cpus = <&cpu0 &cpu1>;
107         };
108
109         gic: interrupt-controller@f1001000 {
110                 compatible = "arm,gic-400";
111                 #interrupt-cells = <3>;
112                 #address-cells = <0>;
113                 interrupt-controller;
114                 reg = <0 0xf1001000 0 0x1000>,
115                         <0 0xf1002000 0 0x2000>,
116                         <0 0xf1004000 0 0x2000>,
117                         <0 0xf1006000 0 0x2000>;
118                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
119                 clocks = <&cpg CPG_MOD 408>;
120                 clock-names = "clk";
121                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
122                 resets = <&cpg 408>;
123         };
124
125         gpio0: gpio@e6050000 {
126                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
127                 reg = <0 0xe6050000 0 0x50>;
128                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
129                 #gpio-cells = <2>;
130                 gpio-controller;
131                 gpio-ranges = <&pfc 0 0 32>;
132                 #interrupt-cells = <2>;
133                 interrupt-controller;
134                 clocks = <&cpg CPG_MOD 912>;
135                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
136                 resets = <&cpg 912>;
137         };
138
139         gpio1: gpio@e6051000 {
140                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
141                 reg = <0 0xe6051000 0 0x50>;
142                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
143                 #gpio-cells = <2>;
144                 gpio-controller;
145                 gpio-ranges = <&pfc 0 32 26>;
146                 #interrupt-cells = <2>;
147                 interrupt-controller;
148                 clocks = <&cpg CPG_MOD 911>;
149                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
150                 resets = <&cpg 911>;
151         };
152
153         gpio2: gpio@e6052000 {
154                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
155                 reg = <0 0xe6052000 0 0x50>;
156                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
157                 #gpio-cells = <2>;
158                 gpio-controller;
159                 gpio-ranges = <&pfc 0 64 32>;
160                 #interrupt-cells = <2>;
161                 interrupt-controller;
162                 clocks = <&cpg CPG_MOD 910>;
163                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
164                 resets = <&cpg 910>;
165         };
166
167         gpio3: gpio@e6053000 {
168                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
169                 reg = <0 0xe6053000 0 0x50>;
170                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
171                 #gpio-cells = <2>;
172                 gpio-controller;
173                 gpio-ranges = <&pfc 0 96 32>;
174                 #interrupt-cells = <2>;
175                 interrupt-controller;
176                 clocks = <&cpg CPG_MOD 909>;
177                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
178                 resets = <&cpg 909>;
179         };
180
181         gpio4: gpio@e6054000 {
182                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
183                 reg = <0 0xe6054000 0 0x50>;
184                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
185                 #gpio-cells = <2>;
186                 gpio-controller;
187                 gpio-ranges = <&pfc 0 128 32>;
188                 #interrupt-cells = <2>;
189                 interrupt-controller;
190                 clocks = <&cpg CPG_MOD 908>;
191                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
192                 resets = <&cpg 908>;
193         };
194
195         gpio5: gpio@e6055000 {
196                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
197                 reg = <0 0xe6055000 0 0x50>;
198                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
199                 #gpio-cells = <2>;
200                 gpio-controller;
201                 gpio-ranges = <&pfc 0 160 32>;
202                 #interrupt-cells = <2>;
203                 interrupt-controller;
204                 clocks = <&cpg CPG_MOD 907>;
205                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
206                 resets = <&cpg 907>;
207         };
208
209         gpio6: gpio@e6055400 {
210                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
211                 reg = <0 0xe6055400 0 0x50>;
212                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
213                 #gpio-cells = <2>;
214                 gpio-controller;
215                 gpio-ranges = <&pfc 0 192 32>;
216                 #interrupt-cells = <2>;
217                 interrupt-controller;
218                 clocks = <&cpg CPG_MOD 905>;
219                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
220                 resets = <&cpg 905>;
221         };
222
223         gpio7: gpio@e6055800 {
224                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
225                 reg = <0 0xe6055800 0 0x50>;
226                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
227                 #gpio-cells = <2>;
228                 gpio-controller;
229                 gpio-ranges = <&pfc 0 224 26>;
230                 #interrupt-cells = <2>;
231                 interrupt-controller;
232                 clocks = <&cpg CPG_MOD 904>;
233                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
234                 resets = <&cpg 904>;
235         };
236
237         thermal: thermal@e61f0000 {
238                 compatible =    "renesas,thermal-r8a7791",
239                                 "renesas,rcar-gen2-thermal",
240                                 "renesas,rcar-thermal";
241                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
242                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
243                 clocks = <&cpg CPG_MOD 522>;
244                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
245                 resets = <&cpg 522>;
246                 #thermal-sensor-cells = <0>;
247         };
248
249         timer {
250                 compatible = "arm,armv7-timer";
251                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
252                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
253                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
254                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
255         };
256
257         cmt0: timer@ffca0000 {
258                 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
259                 reg = <0 0xffca0000 0 0x1004>;
260                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
261                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
262                 clocks = <&cpg CPG_MOD 124>;
263                 clock-names = "fck";
264                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
265                 resets = <&cpg 124>;
266
267                 renesas,channels-mask = <0x60>;
268
269                 status = "disabled";
270         };
271
272         cmt1: timer@e6130000 {
273                 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
274                 reg = <0 0xe6130000 0 0x1004>;
275                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
276                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
277                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
278                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
279                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
280                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
281                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
282                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
283                 clocks = <&cpg CPG_MOD 329>;
284                 clock-names = "fck";
285                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
286                 resets = <&cpg 329>;
287
288                 renesas,channels-mask = <0xff>;
289
290                 status = "disabled";
291         };
292
293         irqc0: interrupt-controller@e61c0000 {
294                 compatible = "renesas,irqc-r8a7791", "renesas,irqc";
295                 #interrupt-cells = <2>;
296                 interrupt-controller;
297                 reg = <0 0xe61c0000 0 0x200>;
298                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
299                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
300                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
301                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
302                              <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
303                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
304                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
305                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
306                              <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
307                              <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
308                 clocks = <&cpg CPG_MOD 407>;
309                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
310                 resets = <&cpg 407>;
311         };
312
313         dmac0: dma-controller@e6700000 {
314                 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
315                 reg = <0 0xe6700000 0 0x20000>;
316                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
317                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
318                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
319                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
320                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
321                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
322                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
323                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
324                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
325                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
326                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
327                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
328                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
329                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
330                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
331                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
332                 interrupt-names = "error",
333                                 "ch0", "ch1", "ch2", "ch3",
334                                 "ch4", "ch5", "ch6", "ch7",
335                                 "ch8", "ch9", "ch10", "ch11",
336                                 "ch12", "ch13", "ch14";
337                 clocks = <&cpg CPG_MOD 219>;
338                 clock-names = "fck";
339                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
340                 resets = <&cpg 219>;
341                 #dma-cells = <1>;
342                 dma-channels = <15>;
343         };
344
345         dmac1: dma-controller@e6720000 {
346                 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
347                 reg = <0 0xe6720000 0 0x20000>;
348                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
349                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
350                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
351                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
352                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
353                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
354                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
355                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
356                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
357                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
358                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
359                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
360                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
361                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
362                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
363                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
364                 interrupt-names = "error",
365                                 "ch0", "ch1", "ch2", "ch3",
366                                 "ch4", "ch5", "ch6", "ch7",
367                                 "ch8", "ch9", "ch10", "ch11",
368                                 "ch12", "ch13", "ch14";
369                 clocks = <&cpg CPG_MOD 218>;
370                 clock-names = "fck";
371                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
372                 resets = <&cpg 218>;
373                 #dma-cells = <1>;
374                 dma-channels = <15>;
375         };
376
377         audma0: dma-controller@ec700000 {
378                 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
379                 reg = <0 0xec700000 0 0x10000>;
380                 interrupts =    <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
381                                  GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
382                                  GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
383                                  GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
384                                  GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
385                                  GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
386                                  GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
387                                  GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
388                                  GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
389                                  GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
390                                  GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
391                                  GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
392                                  GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
393                                  GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
394                 interrupt-names = "error",
395                                 "ch0", "ch1", "ch2", "ch3",
396                                 "ch4", "ch5", "ch6", "ch7",
397                                 "ch8", "ch9", "ch10", "ch11",
398                                 "ch12";
399                 clocks = <&cpg CPG_MOD 502>;
400                 clock-names = "fck";
401                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
402                 resets = <&cpg 502>;
403                 #dma-cells = <1>;
404                 dma-channels = <13>;
405         };
406
407         audma1: dma-controller@ec720000 {
408                 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
409                 reg = <0 0xec720000 0 0x10000>;
410                 interrupts =    <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
411                                  GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
412                                  GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
413                                  GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
414                                  GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
415                                  GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
416                                  GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
417                                  GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
418                                  GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
419                                  GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
420                                  GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
421                                  GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
422                                  GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
423                                  GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
424                 interrupt-names = "error",
425                                 "ch0", "ch1", "ch2", "ch3",
426                                 "ch4", "ch5", "ch6", "ch7",
427                                 "ch8", "ch9", "ch10", "ch11",
428                                 "ch12";
429                 clocks = <&cpg CPG_MOD 501>;
430                 clock-names = "fck";
431                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
432                 resets = <&cpg 501>;
433                 #dma-cells = <1>;
434                 dma-channels = <13>;
435         };
436
437         usb_dmac0: dma-controller@e65a0000 {
438                 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
439                 reg = <0 0xe65a0000 0 0x100>;
440                 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
441                               GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
442                 interrupt-names = "ch0", "ch1";
443                 clocks = <&cpg CPG_MOD 330>;
444                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
445                 resets = <&cpg 330>;
446                 #dma-cells = <1>;
447                 dma-channels = <2>;
448         };
449
450         usb_dmac1: dma-controller@e65b0000 {
451                 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
452                 reg = <0 0xe65b0000 0 0x100>;
453                 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
454                               GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
455                 interrupt-names = "ch0", "ch1";
456                 clocks = <&cpg CPG_MOD 331>;
457                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
458                 resets = <&cpg 331>;
459                 #dma-cells = <1>;
460                 dma-channels = <2>;
461         };
462
463         /* The memory map in the User's Manual maps the cores to bus numbers */
464         i2c0: i2c@e6508000 {
465                 #address-cells = <1>;
466                 #size-cells = <0>;
467                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
468                 reg = <0 0xe6508000 0 0x40>;
469                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
470                 clocks = <&cpg CPG_MOD 931>;
471                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
472                 resets = <&cpg 931>;
473                 i2c-scl-internal-delay-ns = <6>;
474                 status = "disabled";
475         };
476
477         i2c1: i2c@e6518000 {
478                 #address-cells = <1>;
479                 #size-cells = <0>;
480                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
481                 reg = <0 0xe6518000 0 0x40>;
482                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
483                 clocks = <&cpg CPG_MOD 930>;
484                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
485                 resets = <&cpg 930>;
486                 i2c-scl-internal-delay-ns = <6>;
487                 status = "disabled";
488         };
489
490         i2c2: i2c@e6530000 {
491                 #address-cells = <1>;
492                 #size-cells = <0>;
493                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
494                 reg = <0 0xe6530000 0 0x40>;
495                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
496                 clocks = <&cpg CPG_MOD 929>;
497                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
498                 resets = <&cpg 929>;
499                 i2c-scl-internal-delay-ns = <6>;
500                 status = "disabled";
501         };
502
503         i2c3: i2c@e6540000 {
504                 #address-cells = <1>;
505                 #size-cells = <0>;
506                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
507                 reg = <0 0xe6540000 0 0x40>;
508                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
509                 clocks = <&cpg CPG_MOD 928>;
510                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
511                 resets = <&cpg 928>;
512                 i2c-scl-internal-delay-ns = <6>;
513                 status = "disabled";
514         };
515
516         i2c4: i2c@e6520000 {
517                 #address-cells = <1>;
518                 #size-cells = <0>;
519                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
520                 reg = <0 0xe6520000 0 0x40>;
521                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
522                 clocks = <&cpg CPG_MOD 927>;
523                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
524                 resets = <&cpg 927>;
525                 i2c-scl-internal-delay-ns = <6>;
526                 status = "disabled";
527         };
528
529         i2c5: i2c@e6528000 {
530                 /* doesn't need pinmux */
531                 #address-cells = <1>;
532                 #size-cells = <0>;
533                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
534                 reg = <0 0xe6528000 0 0x40>;
535                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
536                 clocks = <&cpg CPG_MOD 925>;
537                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
538                 resets = <&cpg 925>;
539                 i2c-scl-internal-delay-ns = <110>;
540                 status = "disabled";
541         };
542
543         i2c6: i2c@e60b0000 {
544                 /* doesn't need pinmux */
545                 #address-cells = <1>;
546                 #size-cells = <0>;
547                 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
548                              "renesas,rmobile-iic";
549                 reg = <0 0xe60b0000 0 0x425>;
550                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
551                 clocks = <&cpg CPG_MOD 926>;
552                 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
553                        <&dmac1 0x77>, <&dmac1 0x78>;
554                 dma-names = "tx", "rx", "tx", "rx";
555                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
556                 resets = <&cpg 926>;
557                 status = "disabled";
558         };
559
560         i2c7: i2c@e6500000 {
561                 #address-cells = <1>;
562                 #size-cells = <0>;
563                 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
564                              "renesas,rmobile-iic";
565                 reg = <0 0xe6500000 0 0x425>;
566                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
567                 clocks = <&cpg CPG_MOD 318>;
568                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
569                        <&dmac1 0x61>, <&dmac1 0x62>;
570                 dma-names = "tx", "rx", "tx", "rx";
571                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
572                 resets = <&cpg 318>;
573                 status = "disabled";
574         };
575
576         i2c8: i2c@e6510000 {
577                 #address-cells = <1>;
578                 #size-cells = <0>;
579                 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
580                              "renesas,rmobile-iic";
581                 reg = <0 0xe6510000 0 0x425>;
582                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
583                 clocks = <&cpg CPG_MOD 323>;
584                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
585                        <&dmac1 0x65>, <&dmac1 0x66>;
586                 dma-names = "tx", "rx", "tx", "rx";
587                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
588                 resets = <&cpg 323>;
589                 status = "disabled";
590         };
591
592         pfc: pin-controller@e6060000 {
593                 compatible = "renesas,pfc-r8a7791";
594                 reg = <0 0xe6060000 0 0x250>;
595         };
596
597         mmcif0: mmc@ee200000 {
598                 compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif";
599                 reg = <0 0xee200000 0 0x80>;
600                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
601                 clocks = <&cpg CPG_MOD 315>;
602                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
603                        <&dmac1 0xd1>, <&dmac1 0xd2>;
604                 dma-names = "tx", "rx", "tx", "rx";
605                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
606                 resets = <&cpg 315>;
607                 reg-io-width = <4>;
608                 status = "disabled";
609                 max-frequency = <97500000>;
610         };
611
612         sdhi0: sd@ee100000 {
613                 compatible = "renesas,sdhi-r8a7791";
614                 reg = <0 0xee100000 0 0x328>;
615                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
616                 clocks = <&cpg CPG_MOD 314>;
617                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
618                        <&dmac1 0xcd>, <&dmac1 0xce>;
619                 dma-names = "tx", "rx", "tx", "rx";
620                 max-frequency = <195000000>;
621                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
622                 resets = <&cpg 314>;
623                 status = "disabled";
624         };
625
626         sdhi1: sd@ee140000 {
627                 compatible = "renesas,sdhi-r8a7791";
628                 reg = <0 0xee140000 0 0x100>;
629                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
630                 clocks = <&cpg CPG_MOD 312>;
631                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
632                        <&dmac1 0xc1>, <&dmac1 0xc2>;
633                 dma-names = "tx", "rx", "tx", "rx";
634                 max-frequency = <97500000>;
635                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
636                 resets = <&cpg 312>;
637                 status = "disabled";
638         };
639
640         sdhi2: sd@ee160000 {
641                 compatible = "renesas,sdhi-r8a7791";
642                 reg = <0 0xee160000 0 0x100>;
643                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
644                 clocks = <&cpg CPG_MOD 311>;
645                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
646                        <&dmac1 0xd3>, <&dmac1 0xd4>;
647                 dma-names = "tx", "rx", "tx", "rx";
648                 max-frequency = <97500000>;
649                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
650                 resets = <&cpg 311>;
651                 status = "disabled";
652         };
653
654         scifa0: serial@e6c40000 {
655                 compatible = "renesas,scifa-r8a7791",
656                              "renesas,rcar-gen2-scifa", "renesas,scifa";
657                 reg = <0 0xe6c40000 0 64>;
658                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
659                 clocks = <&cpg CPG_MOD 204>;
660                 clock-names = "fck";
661                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
662                        <&dmac1 0x21>, <&dmac1 0x22>;
663                 dma-names = "tx", "rx", "tx", "rx";
664                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
665                 resets = <&cpg 204>;
666                 status = "disabled";
667         };
668
669         scifa1: serial@e6c50000 {
670                 compatible = "renesas,scifa-r8a7791",
671                              "renesas,rcar-gen2-scifa", "renesas,scifa";
672                 reg = <0 0xe6c50000 0 64>;
673                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
674                 clocks = <&cpg CPG_MOD 203>;
675                 clock-names = "fck";
676                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
677                        <&dmac1 0x25>, <&dmac1 0x26>;
678                 dma-names = "tx", "rx", "tx", "rx";
679                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
680                 resets = <&cpg 203>;
681                 status = "disabled";
682         };
683
684         scifa2: serial@e6c60000 {
685                 compatible = "renesas,scifa-r8a7791",
686                              "renesas,rcar-gen2-scifa", "renesas,scifa";
687                 reg = <0 0xe6c60000 0 64>;
688                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
689                 clocks = <&cpg CPG_MOD 202>;
690                 clock-names = "fck";
691                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
692                        <&dmac1 0x27>, <&dmac1 0x28>;
693                 dma-names = "tx", "rx", "tx", "rx";
694                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
695                 resets = <&cpg 202>;
696                 status = "disabled";
697         };
698
699         scifa3: serial@e6c70000 {
700                 compatible = "renesas,scifa-r8a7791",
701                              "renesas,rcar-gen2-scifa", "renesas,scifa";
702                 reg = <0 0xe6c70000 0 64>;
703                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
704                 clocks = <&cpg CPG_MOD 1106>;
705                 clock-names = "fck";
706                 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
707                        <&dmac1 0x1b>, <&dmac1 0x1c>;
708                 dma-names = "tx", "rx", "tx", "rx";
709                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
710                 resets = <&cpg 1106>;
711                 status = "disabled";
712         };
713
714         scifa4: serial@e6c78000 {
715                 compatible = "renesas,scifa-r8a7791",
716                              "renesas,rcar-gen2-scifa", "renesas,scifa";
717                 reg = <0 0xe6c78000 0 64>;
718                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
719                 clocks = <&cpg CPG_MOD 1107>;
720                 clock-names = "fck";
721                 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
722                        <&dmac1 0x1f>, <&dmac1 0x20>;
723                 dma-names = "tx", "rx", "tx", "rx";
724                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
725                 resets = <&cpg 1107>;
726                 status = "disabled";
727         };
728
729         scifa5: serial@e6c80000 {
730                 compatible = "renesas,scifa-r8a7791",
731                              "renesas,rcar-gen2-scifa", "renesas,scifa";
732                 reg = <0 0xe6c80000 0 64>;
733                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
734                 clocks = <&cpg CPG_MOD 1108>;
735                 clock-names = "fck";
736                 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
737                        <&dmac1 0x23>, <&dmac1 0x24>;
738                 dma-names = "tx", "rx", "tx", "rx";
739                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
740                 resets = <&cpg 1108>;
741                 status = "disabled";
742         };
743
744         scifb0: serial@e6c20000 {
745                 compatible = "renesas,scifb-r8a7791",
746                              "renesas,rcar-gen2-scifb", "renesas,scifb";
747                 reg = <0 0xe6c20000 0 0x100>;
748                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
749                 clocks = <&cpg CPG_MOD 206>;
750                 clock-names = "fck";
751                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
752                        <&dmac1 0x3d>, <&dmac1 0x3e>;
753                 dma-names = "tx", "rx", "tx", "rx";
754                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
755                 resets = <&cpg 206>;
756                 status = "disabled";
757         };
758
759         scifb1: serial@e6c30000 {
760                 compatible = "renesas,scifb-r8a7791",
761                              "renesas,rcar-gen2-scifb", "renesas,scifb";
762                 reg = <0 0xe6c30000 0 0x100>;
763                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
764                 clocks = <&cpg CPG_MOD 207>;
765                 clock-names = "fck";
766                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
767                        <&dmac1 0x19>, <&dmac1 0x1a>;
768                 dma-names = "tx", "rx", "tx", "rx";
769                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
770                 resets = <&cpg 207>;
771                 status = "disabled";
772         };
773
774         scifb2: serial@e6ce0000 {
775                 compatible = "renesas,scifb-r8a7791",
776                              "renesas,rcar-gen2-scifb", "renesas,scifb";
777                 reg = <0 0xe6ce0000 0 0x100>;
778                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
779                 clocks = <&cpg CPG_MOD 216>;
780                 clock-names = "fck";
781                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
782                        <&dmac1 0x1d>, <&dmac1 0x1e>;
783                 dma-names = "tx", "rx", "tx", "rx";
784                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
785                 resets = <&cpg 216>;
786                 status = "disabled";
787         };
788
789         scif0: serial@e6e60000 {
790                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
791                              "renesas,scif";
792                 reg = <0 0xe6e60000 0 64>;
793                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
794                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
795                          <&scif_clk>;
796                 clock-names = "fck", "brg_int", "scif_clk";
797                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
798                        <&dmac1 0x29>, <&dmac1 0x2a>;
799                 dma-names = "tx", "rx", "tx", "rx";
800                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
801                 resets = <&cpg 721>;
802                 status = "disabled";
803         };
804
805         scif1: serial@e6e68000 {
806                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
807                              "renesas,scif";
808                 reg = <0 0xe6e68000 0 64>;
809                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
810                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
811                          <&scif_clk>;
812                 clock-names = "fck", "brg_int", "scif_clk";
813                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
814                        <&dmac1 0x2d>, <&dmac1 0x2e>;
815                 dma-names = "tx", "rx", "tx", "rx";
816                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
817                 resets = <&cpg 720>;
818                 status = "disabled";
819         };
820
821         adc: adc@e6e54000 {
822                 compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
823                 reg = <0 0xe6e54000 0 64>;
824                 clocks = <&cpg CPG_MOD 901>;
825                 clock-names = "fck";
826                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
827                 resets = <&cpg 901>;
828                 status = "disabled";
829         };
830
831         scif2: serial@e6e58000 {
832                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
833                              "renesas,scif";
834                 reg = <0 0xe6e58000 0 64>;
835                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
836                 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
837                          <&scif_clk>;
838                 clock-names = "fck", "brg_int", "scif_clk";
839                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
840                        <&dmac1 0x2b>, <&dmac1 0x2c>;
841                 dma-names = "tx", "rx", "tx", "rx";
842                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
843                 resets = <&cpg 719>;
844                 status = "disabled";
845         };
846
847         scif3: serial@e6ea8000 {
848                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
849                              "renesas,scif";
850                 reg = <0 0xe6ea8000 0 64>;
851                 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
852                 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
853                          <&scif_clk>;
854                 clock-names = "fck", "brg_int", "scif_clk";
855                 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
856                        <&dmac1 0x2f>, <&dmac1 0x30>;
857                 dma-names = "tx", "rx", "tx", "rx";
858                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
859                 resets = <&cpg 718>;
860                 status = "disabled";
861         };
862
863         scif4: serial@e6ee0000 {
864                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
865                              "renesas,scif";
866                 reg = <0 0xe6ee0000 0 64>;
867                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
868                 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
869                          <&scif_clk>;
870                 clock-names = "fck", "brg_int", "scif_clk";
871                 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
872                        <&dmac1 0xfb>, <&dmac1 0xfc>;
873                 dma-names = "tx", "rx", "tx", "rx";
874                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
875                 resets = <&cpg 715>;
876                 status = "disabled";
877         };
878
879         scif5: serial@e6ee8000 {
880                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
881                              "renesas,scif";
882                 reg = <0 0xe6ee8000 0 64>;
883                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
884                 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
885                          <&scif_clk>;
886                 clock-names = "fck", "brg_int", "scif_clk";
887                 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
888                        <&dmac1 0xfd>, <&dmac1 0xfe>;
889                 dma-names = "tx", "rx", "tx", "rx";
890                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
891                 resets = <&cpg 714>;
892                 status = "disabled";
893         };
894
895         hscif0: serial@e62c0000 {
896                 compatible = "renesas,hscif-r8a7791",
897                              "renesas,rcar-gen2-hscif", "renesas,hscif";
898                 reg = <0 0xe62c0000 0 96>;
899                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
900                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
901                          <&scif_clk>;
902                 clock-names = "fck", "brg_int", "scif_clk";
903                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
904                        <&dmac1 0x39>, <&dmac1 0x3a>;
905                 dma-names = "tx", "rx", "tx", "rx";
906                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
907                 resets = <&cpg 717>;
908                 status = "disabled";
909         };
910
911         hscif1: serial@e62c8000 {
912                 compatible = "renesas,hscif-r8a7791",
913                              "renesas,rcar-gen2-hscif", "renesas,hscif";
914                 reg = <0 0xe62c8000 0 96>;
915                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
916                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
917                          <&scif_clk>;
918                 clock-names = "fck", "brg_int", "scif_clk";
919                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
920                        <&dmac1 0x4d>, <&dmac1 0x4e>;
921                 dma-names = "tx", "rx", "tx", "rx";
922                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
923                 resets = <&cpg 716>;
924                 status = "disabled";
925         };
926
927         hscif2: serial@e62d0000 {
928                 compatible = "renesas,hscif-r8a7791",
929                              "renesas,rcar-gen2-hscif", "renesas,hscif";
930                 reg = <0 0xe62d0000 0 96>;
931                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
932                 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
933                          <&scif_clk>;
934                 clock-names = "fck", "brg_int", "scif_clk";
935                 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
936                        <&dmac1 0x3b>, <&dmac1 0x3c>;
937                 dma-names = "tx", "rx", "tx", "rx";
938                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
939                 resets = <&cpg 713>;
940                 status = "disabled";
941         };
942
943         icram0: sram@e63a0000 {
944                 compatible = "mmio-sram";
945                 reg = <0 0xe63a0000 0 0x12000>;
946         };
947
948         icram1: sram@e63c0000 {
949                 compatible = "mmio-sram";
950                 reg = <0 0xe63c0000 0 0x1000>;
951                 #address-cells = <1>;
952                 #size-cells = <1>;
953                 ranges = <0 0 0xe63c0000 0x1000>;
954
955                 smp-sram@0 {
956                         compatible = "renesas,smp-sram";
957                         reg = <0 0x10>;
958                 };
959         };
960
961         ether: ethernet@ee700000 {
962                 compatible = "renesas,ether-r8a7791";
963                 reg = <0 0xee700000 0 0x400>;
964                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
965                 clocks = <&cpg CPG_MOD 813>;
966                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
967                 resets = <&cpg 813>;
968                 phy-mode = "rmii";
969                 #address-cells = <1>;
970                 #size-cells = <0>;
971                 status = "disabled";
972         };
973
974         avb: ethernet@e6800000 {
975                 compatible = "renesas,etheravb-r8a7791",
976                              "renesas,etheravb-rcar-gen2";
977                 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
978                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
979                 clocks = <&cpg CPG_MOD 812>;
980                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
981                 resets = <&cpg 812>;
982                 #address-cells = <1>;
983                 #size-cells = <0>;
984                 status = "disabled";
985         };
986
987         sata0: sata@ee300000 {
988                 compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
989                 reg = <0 0xee300000 0 0x2000>;
990                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
991                 clocks = <&cpg CPG_MOD 815>;
992                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
993                 resets = <&cpg 815>;
994                 status = "disabled";
995         };
996
997         sata1: sata@ee500000 {
998                 compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
999                 reg = <0 0xee500000 0 0x2000>;
1000                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1001                 clocks = <&cpg CPG_MOD 814>;
1002                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1003                 resets = <&cpg 814>;
1004                 status = "disabled";
1005         };
1006
1007         hsusb: usb@e6590000 {
1008                 compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs";
1009                 reg = <0 0xe6590000 0 0x100>;
1010                 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1011                 clocks = <&cpg CPG_MOD 704>;
1012                 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1013                        <&usb_dmac1 0>, <&usb_dmac1 1>;
1014                 dma-names = "ch0", "ch1", "ch2", "ch3";
1015                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1016                 resets = <&cpg 704>;
1017                 renesas,buswait = <4>;
1018                 phys = <&usb0 1>;
1019                 phy-names = "usb";
1020                 status = "disabled";
1021         };
1022
1023         usbphy: usb-phy@e6590100 {
1024                 compatible = "renesas,usb-phy-r8a7791",
1025                              "renesas,rcar-gen2-usb-phy";
1026                 reg = <0 0xe6590100 0 0x100>;
1027                 #address-cells = <1>;
1028                 #size-cells = <0>;
1029                 clocks = <&cpg CPG_MOD 704>;
1030                 clock-names = "usbhs";
1031                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1032                 resets = <&cpg 704>;
1033                 status = "disabled";
1034
1035                 usb0: usb-channel@0 {
1036                         reg = <0>;
1037                         #phy-cells = <1>;
1038                 };
1039                 usb2: usb-channel@2 {
1040                         reg = <2>;
1041                         #phy-cells = <1>;
1042                 };
1043         };
1044
1045         vin0: video@e6ef0000 {
1046                 compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
1047                 reg = <0 0xe6ef0000 0 0x1000>;
1048                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1049                 clocks = <&cpg CPG_MOD 811>;
1050                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1051                 resets = <&cpg 811>;
1052                 status = "disabled";
1053         };
1054
1055         vin1: video@e6ef1000 {
1056                 compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
1057                 reg = <0 0xe6ef1000 0 0x1000>;
1058                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1059                 clocks = <&cpg CPG_MOD 810>;
1060                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1061                 resets = <&cpg 810>;
1062                 status = "disabled";
1063         };
1064
1065         vin2: video@e6ef2000 {
1066                 compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
1067                 reg = <0 0xe6ef2000 0 0x1000>;
1068                 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1069                 clocks = <&cpg CPG_MOD 809>;
1070                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1071                 resets = <&cpg 809>;
1072                 status = "disabled";
1073         };
1074
1075         vsp@fe928000 {
1076                 compatible = "renesas,vsp1";
1077                 reg = <0 0xfe928000 0 0x8000>;
1078                 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1079                 clocks = <&cpg CPG_MOD 131>;
1080                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1081                 resets = <&cpg 131>;
1082         };
1083
1084         vsp@fe930000 {
1085                 compatible = "renesas,vsp1";
1086                 reg = <0 0xfe930000 0 0x8000>;
1087                 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1088                 clocks = <&cpg CPG_MOD 128>;
1089                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1090                 resets = <&cpg 128>;
1091         };
1092
1093         vsp@fe938000 {
1094                 compatible = "renesas,vsp1";
1095                 reg = <0 0xfe938000 0 0x8000>;
1096                 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1097                 clocks = <&cpg CPG_MOD 127>;
1098                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1099                 resets = <&cpg 127>;
1100         };
1101
1102         du: display@feb00000 {
1103                 compatible = "renesas,du-r8a7791";
1104                 reg = <0 0xfeb00000 0 0x40000>,
1105                       <0 0xfeb90000 0 0x1c>;
1106                 reg-names = "du", "lvds.0";
1107                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1108                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1109                 clocks = <&cpg CPG_MOD 724>,
1110                          <&cpg CPG_MOD 723>,
1111                          <&cpg CPG_MOD 726>;
1112                 clock-names = "du.0", "du.1", "lvds.0";
1113                 status = "disabled";
1114
1115                 ports {
1116                         #address-cells = <1>;
1117                         #size-cells = <0>;
1118
1119                         port@0 {
1120                                 reg = <0>;
1121                                 du_out_rgb: endpoint {
1122                                 };
1123                         };
1124                         port@1 {
1125                                 reg = <1>;
1126                                 du_out_lvds0: endpoint {
1127                                 };
1128                         };
1129                 };
1130         };
1131
1132         can0: can@e6e80000 {
1133                 compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
1134                 reg = <0 0xe6e80000 0 0x1000>;
1135                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1136                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
1137                          <&can_clk>;
1138                 clock-names = "clkp1", "clkp2", "can_clk";
1139                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1140                 resets = <&cpg 916>;
1141                 status = "disabled";
1142         };
1143
1144         can1: can@e6e88000 {
1145                 compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
1146                 reg = <0 0xe6e88000 0 0x1000>;
1147                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1148                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
1149                          <&can_clk>;
1150                 clock-names = "clkp1", "clkp2", "can_clk";
1151                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1152                 resets = <&cpg 915>;
1153                 status = "disabled";
1154         };
1155
1156         jpu: jpeg-codec@fe980000 {
1157                 compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu";
1158                 reg = <0 0xfe980000 0 0x10300>;
1159                 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1160                 clocks = <&cpg CPG_MOD 106>;
1161                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1162                 resets = <&cpg 106>;
1163         };
1164
1165         /* External root clock */
1166         extal_clk: extal {
1167                 compatible = "fixed-clock";
1168                 #clock-cells = <0>;
1169                 /* This value must be overridden by the board. */
1170                 clock-frequency = <0>;
1171         };
1172
1173         /*
1174          * The external audio clocks are configured as 0 Hz fixed frequency
1175          * clocks by default.
1176          * Boards that provide audio clocks should override them.
1177          */
1178         audio_clk_a: audio_clk_a {
1179                 compatible = "fixed-clock";
1180                 #clock-cells = <0>;
1181                 clock-frequency = <0>;
1182         };
1183         audio_clk_b: audio_clk_b {
1184                 compatible = "fixed-clock";
1185                 #clock-cells = <0>;
1186                 clock-frequency = <0>;
1187         };
1188         audio_clk_c: audio_clk_c {
1189                 compatible = "fixed-clock";
1190                 #clock-cells = <0>;
1191                 clock-frequency = <0>;
1192         };
1193
1194         /* External PCIe clock - can be overridden by the board */
1195         pcie_bus_clk: pcie_bus {
1196                 compatible = "fixed-clock";
1197                 #clock-cells = <0>;
1198                 clock-frequency = <0>;
1199         };
1200
1201         /* External SCIF clock */
1202         scif_clk: scif {
1203                 compatible = "fixed-clock";
1204                 #clock-cells = <0>;
1205                 /* This value must be overridden by the board. */
1206                 clock-frequency = <0>;
1207         };
1208
1209         /* External USB clock - can be overridden by the board */
1210         usb_extal_clk: usb_extal {
1211                 compatible = "fixed-clock";
1212                 #clock-cells = <0>;
1213                 clock-frequency = <48000000>;
1214         };
1215
1216         /* External CAN clock */
1217         can_clk: can {
1218                 compatible = "fixed-clock";
1219                 #clock-cells = <0>;
1220                 /* This value must be overridden by the board. */
1221                 clock-frequency = <0>;
1222         };
1223
1224         cpg: clock-controller@e6150000 {
1225                 compatible = "renesas,r8a7791-cpg-mssr";
1226                 reg = <0 0xe6150000 0 0x1000>;
1227                 clocks = <&extal_clk>, <&usb_extal_clk>;
1228                 clock-names = "extal", "usb_extal";
1229                 #clock-cells = <2>;
1230                 #power-domain-cells = <0>;
1231                 #reset-cells = <1>;
1232         };
1233
1234         rst: reset-controller@e6160000 {
1235                 compatible = "renesas,r8a7791-rst";
1236                 reg = <0 0xe6160000 0 0x0100>;
1237         };
1238
1239         prr: chipid@ff000044 {
1240                 compatible = "renesas,prr";
1241                 reg = <0 0xff000044 0 4>;
1242         };
1243
1244         sysc: system-controller@e6180000 {
1245                 compatible = "renesas,r8a7791-sysc";
1246                 reg = <0 0xe6180000 0 0x0200>;
1247                 #power-domain-cells = <1>;
1248         };
1249
1250         qspi: spi@e6b10000 {
1251                 compatible = "renesas,qspi-r8a7791", "renesas,qspi";
1252                 reg = <0 0xe6b10000 0 0x2c>;
1253                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1254                 clocks = <&cpg CPG_MOD 917>;
1255                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1256                        <&dmac1 0x17>, <&dmac1 0x18>;
1257                 dma-names = "tx", "rx", "tx", "rx";
1258                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1259                 resets = <&cpg 917>;
1260                 num-cs = <1>;
1261                 #address-cells = <1>;
1262                 #size-cells = <0>;
1263                 status = "disabled";
1264         };
1265
1266         msiof0: spi@e6e20000 {
1267                 compatible = "renesas,msiof-r8a7791",
1268                              "renesas,rcar-gen2-msiof";
1269                 reg = <0 0xe6e20000 0 0x0064>;
1270                 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1271                 clocks = <&cpg CPG_MOD 000>;
1272                 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1273                        <&dmac1 0x51>, <&dmac1 0x52>;
1274                 dma-names = "tx", "rx", "tx", "rx";
1275                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1276                 resets = <&cpg 0>;
1277                 #address-cells = <1>;
1278                 #size-cells = <0>;
1279                 status = "disabled";
1280         };
1281
1282         msiof1: spi@e6e10000 {
1283                 compatible = "renesas,msiof-r8a7791",
1284                              "renesas,rcar-gen2-msiof";
1285                 reg = <0 0xe6e10000 0 0x0064>;
1286                 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1287                 clocks = <&cpg CPG_MOD 208>;
1288                 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1289                        <&dmac1 0x55>, <&dmac1 0x56>;
1290                 dma-names = "tx", "rx", "tx", "rx";
1291                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1292                 resets = <&cpg 208>;
1293                 #address-cells = <1>;
1294                 #size-cells = <0>;
1295                 status = "disabled";
1296         };
1297
1298         msiof2: spi@e6e00000 {
1299                 compatible = "renesas,msiof-r8a7791",
1300                              "renesas,rcar-gen2-msiof";
1301                 reg = <0 0xe6e00000 0 0x0064>;
1302                 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1303                 clocks = <&cpg CPG_MOD 205>;
1304                 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1305                        <&dmac1 0x41>, <&dmac1 0x42>;
1306                 dma-names = "tx", "rx", "tx", "rx";
1307                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1308                 resets = <&cpg 205>;
1309                 #address-cells = <1>;
1310                 #size-cells = <0>;
1311                 status = "disabled";
1312         };
1313
1314         xhci: usb@ee000000 {
1315                 compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci";
1316                 reg = <0 0xee000000 0 0xc00>;
1317                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1318                 clocks = <&cpg CPG_MOD 328>;
1319                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1320                 resets = <&cpg 328>;
1321                 phys = <&usb2 1>;
1322                 phy-names = "usb";
1323                 status = "disabled";
1324         };
1325
1326         pci0: pci@ee090000 {
1327                 compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
1328                 device_type = "pci";
1329                 reg = <0 0xee090000 0 0xc00>,
1330                       <0 0xee080000 0 0x1100>;
1331                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1332                 clocks = <&cpg CPG_MOD 703>;
1333                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1334                 resets = <&cpg 703>;
1335                 status = "disabled";
1336
1337                 bus-range = <0 0>;
1338                 #address-cells = <3>;
1339                 #size-cells = <2>;
1340                 #interrupt-cells = <1>;
1341                 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1342                 interrupt-map-mask = <0xff00 0 0 0x7>;
1343                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1344                                  0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1345                                  0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1346
1347                 usb@1,0 {
1348                         reg = <0x800 0 0 0 0>;
1349                         phys = <&usb0 0>;
1350                         phy-names = "usb";
1351                 };
1352
1353                 usb@2,0 {
1354                         reg = <0x1000 0 0 0 0>;
1355                         phys = <&usb0 0>;
1356                         phy-names = "usb";
1357                 };
1358         };
1359
1360         pci1: pci@ee0d0000 {
1361                 compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
1362                 device_type = "pci";
1363                 reg = <0 0xee0d0000 0 0xc00>,
1364                       <0 0xee0c0000 0 0x1100>;
1365                 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1366                 clocks = <&cpg CPG_MOD 703>;
1367                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1368                 resets = <&cpg 703>;
1369                 status = "disabled";
1370
1371                 bus-range = <1 1>;
1372                 #address-cells = <3>;
1373                 #size-cells = <2>;
1374                 #interrupt-cells = <1>;
1375                 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1376                 interrupt-map-mask = <0xff00 0 0 0x7>;
1377                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1378                                  0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1379                                  0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1380
1381                 usb@1,0 {
1382                         reg = <0x10800 0 0 0 0>;
1383                         phys = <&usb2 0>;
1384                         phy-names = "usb";
1385                 };
1386
1387                 usb@2,0 {
1388                         reg = <0x11000 0 0 0 0>;
1389                         phys = <&usb2 0>;
1390                         phy-names = "usb";
1391                 };
1392         };
1393
1394         pciec: pcie@fe000000 {
1395                 compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
1396                 reg = <0 0xfe000000 0 0x80000>;
1397                 #address-cells = <3>;
1398                 #size-cells = <2>;
1399                 bus-range = <0x00 0xff>;
1400                 device_type = "pci";
1401                 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1402                           0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1403                           0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1404                           0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1405                 /* Map all possible DDR as inbound ranges */
1406                 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1407                               0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1408                 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1409                              <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1410                              <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1411                 #interrupt-cells = <1>;
1412                 interrupt-map-mask = <0 0 0 0>;
1413                 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1414                 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1415                 clock-names = "pcie", "pcie_bus";
1416                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1417                 resets = <&cpg 319>;
1418                 status = "disabled";
1419         };
1420
1421         ipmmu_sy0: mmu@e6280000 {
1422                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1423                 reg = <0 0xe6280000 0 0x1000>;
1424                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1425                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1426                 #iommu-cells = <1>;
1427                 status = "disabled";
1428         };
1429
1430         ipmmu_sy1: mmu@e6290000 {
1431                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1432                 reg = <0 0xe6290000 0 0x1000>;
1433                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1434                 #iommu-cells = <1>;
1435                 status = "disabled";
1436         };
1437
1438         ipmmu_ds: mmu@e6740000 {
1439                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1440                 reg = <0 0xe6740000 0 0x1000>;
1441                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1442                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1443                 #iommu-cells = <1>;
1444                 status = "disabled";
1445         };
1446
1447         ipmmu_mp: mmu@ec680000 {
1448                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1449                 reg = <0 0xec680000 0 0x1000>;
1450                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1451                 #iommu-cells = <1>;
1452                 status = "disabled";
1453         };
1454
1455         ipmmu_mx: mmu@fe951000 {
1456                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1457                 reg = <0 0xfe951000 0 0x1000>;
1458                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1459                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1460                 #iommu-cells = <1>;
1461                 status = "disabled";
1462         };
1463
1464         ipmmu_rt: mmu@ffc80000 {
1465                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1466                 reg = <0 0xffc80000 0 0x1000>;
1467                 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1468                 #iommu-cells = <1>;
1469                 status = "disabled";
1470         };
1471
1472         ipmmu_gp: mmu@e62a0000 {
1473                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1474                 reg = <0 0xe62a0000 0 0x1000>;
1475                 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1476                              <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1477                 #iommu-cells = <1>;
1478                 status = "disabled";
1479         };
1480
1481         rcar_sound: sound@ec500000 {
1482                 /*
1483                  * #sound-dai-cells is required
1484                  *
1485                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1486                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1487                  */
1488                 compatible =  "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
1489                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1490                         <0 0xec5a0000 0 0x100>,  /* ADG */
1491                         <0 0xec540000 0 0x1000>, /* SSIU */
1492                         <0 0xec541000 0 0x280>,  /* SSI */
1493                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1494                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1495
1496                 clocks = <&cpg CPG_MOD 1005>,
1497                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1498                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1499                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1500                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1501                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1502                          <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1503                          <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1504                          <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1505                          <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1506                          <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1507                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1508                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1509                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1510                          <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1511                          <&cpg CPG_CORE R8A7791_CLK_M2>;
1512                 clock-names = "ssi-all",
1513                                 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1514                                 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1515                                 "src.9", "src.8", "src.7", "src.6", "src.5",
1516                                 "src.4", "src.3", "src.2", "src.1", "src.0",
1517                                 "ctu.0", "ctu.1",
1518                                 "mix.0", "mix.1",
1519                                 "dvc.0", "dvc.1",
1520                                 "clk_a", "clk_b", "clk_c", "clk_i";
1521                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1522                 resets = <&cpg 1005>,
1523                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1524                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1525                          <&cpg 1014>, <&cpg 1015>;
1526                 reset-names = "ssi-all",
1527                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1528                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1529
1530                 status = "disabled";
1531
1532                 rcar_sound,dvc {
1533                         dvc0: dvc-0 {
1534                                 dmas = <&audma1 0xbc>;
1535                                 dma-names = "tx";
1536                         };
1537                         dvc1: dvc-1 {
1538                                 dmas = <&audma1 0xbe>;
1539                                 dma-names = "tx";
1540                         };
1541                 };
1542
1543                 rcar_sound,mix {
1544                         mix0: mix-0 { };
1545                         mix1: mix-1 { };
1546                 };
1547
1548                 rcar_sound,ctu {
1549                         ctu00: ctu-0 { };
1550                         ctu01: ctu-1 { };
1551                         ctu02: ctu-2 { };
1552                         ctu03: ctu-3 { };
1553                         ctu10: ctu-4 { };
1554                         ctu11: ctu-5 { };
1555                         ctu12: ctu-6 { };
1556                         ctu13: ctu-7 { };
1557                 };
1558
1559                 rcar_sound,src {
1560                         src0: src-0 {
1561                                 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1562                                 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1563                                 dma-names = "rx", "tx";
1564                         };
1565                         src1: src-1 {
1566                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1567                                 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1568                                 dma-names = "rx", "tx";
1569                         };
1570                         src2: src-2 {
1571                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1572                                 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1573                                 dma-names = "rx", "tx";
1574                         };
1575                         src3: src-3 {
1576                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1577                                 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1578                                 dma-names = "rx", "tx";
1579                         };
1580                         src4: src-4 {
1581                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1582                                 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1583                                 dma-names = "rx", "tx";
1584                         };
1585                         src5: src-5 {
1586                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1587                                 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1588                                 dma-names = "rx", "tx";
1589                         };
1590                         src6: src-6 {
1591                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1592                                 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1593                                 dma-names = "rx", "tx";
1594                         };
1595                         src7: src-7 {
1596                                 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1597                                 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1598                                 dma-names = "rx", "tx";
1599                         };
1600                         src8: src-8 {
1601                                 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1602                                 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1603                                 dma-names = "rx", "tx";
1604                         };
1605                         src9: src-9 {
1606                                 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1607                                 dmas = <&audma0 0x97>, <&audma1 0xba>;
1608                                 dma-names = "rx", "tx";
1609                         };
1610                 };
1611
1612                 rcar_sound,ssi {
1613                         ssi0: ssi-0 {
1614                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1615                                 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1616                                 dma-names = "rx", "tx", "rxu", "txu";
1617                         };
1618                         ssi1: ssi-1 {
1619                                  interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1620                                 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1621                                 dma-names = "rx", "tx", "rxu", "txu";
1622                         };
1623                         ssi2: ssi-2 {
1624                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1625                                 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1626                                 dma-names = "rx", "tx", "rxu", "txu";
1627                         };
1628                         ssi3: ssi-3 {
1629                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1630                                 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1631                                 dma-names = "rx", "tx", "rxu", "txu";
1632                         };
1633                         ssi4: ssi-4 {
1634                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1635                                 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1636                                 dma-names = "rx", "tx", "rxu", "txu";
1637                         };
1638                         ssi5: ssi-5 {
1639                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1640                                 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1641                                 dma-names = "rx", "tx", "rxu", "txu";
1642                         };
1643                         ssi6: ssi-6 {
1644                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1645                                 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1646                                 dma-names = "rx", "tx", "rxu", "txu";
1647                         };
1648                         ssi7: ssi-7 {
1649                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1650                                 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1651                                 dma-names = "rx", "tx", "rxu", "txu";
1652                         };
1653                         ssi8: ssi-8 {
1654                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1655                                 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1656                                 dma-names = "rx", "tx", "rxu", "txu";
1657                         };
1658                         ssi9: ssi-9 {
1659                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1660                                 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1661                                 dma-names = "rx", "tx", "rxu", "txu";
1662                         };
1663                 };
1664         };
1665 };