arch/arm/dts/r8a774a1.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a774a1 SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
  11 #include <dt-bindings/power/r8a774a1-sysc.h>
  12
  13 #define CPG_AUDIO_CLK_I         R8A774A1_CLK_S0D4
  14
  15 / {
  16         compatible = "renesas,r8a774a1";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c_dvfs;
  29         };
  30
  31         /*
  32          * The external audio clocks are configured as 0 Hz fixed frequency
  33          * clocks by default.
  34          * Boards that provide audio clocks should override them.
  35          */
  36         audio_clk_a: audio_clk_a {
  37                 compatible = "fixed-clock";
  38                 #clock-cells = <0>;
  39                 clock-frequency = <0>;
  40         };
  41
  42         audio_clk_b: audio_clk_b {
  43                 compatible = "fixed-clock";
  44                 #clock-cells = <0>;
  45                 clock-frequency = <0>;
  46         };
  47
  48         audio_clk_c: audio_clk_c {
  49                 compatible = "fixed-clock";
  50                 #clock-cells = <0>;
  51                 clock-frequency = <0>;
  52         };
  53
  54         /* External CAN clock - to be overridden by boards that provide it */
  55         can_clk: can {
  56                 compatible = "fixed-clock";
  57                 #clock-cells = <0>;
  58                 clock-frequency = <0>;
  59         };
  60
  61         cluster0_opp: opp_table0 {
  62                 compatible = "operating-points-v2";
  63                 opp-shared;
  64
  65                 opp-500000000 {
  66                         opp-hz = /bits/ 64 <500000000>;
  67                         opp-microvolt = <820000>;
  68                         clock-latency-ns = <300000>;
  69                 };
  70                 opp-1000000000 {
  71                         opp-hz = /bits/ 64 <1000000000>;
  72                         opp-microvolt = <820000>;
  73                         clock-latency-ns = <300000>;
  74                 };
  75                 opp-1500000000 {
  76                         opp-hz = /bits/ 64 <1500000000>;
  77                         opp-microvolt = <820000>;
  78                         clock-latency-ns = <300000>;
  79                 };
  80         };
  81
  82         cluster1_opp: opp_table1 {
  83                 compatible = "operating-points-v2";
  84                 opp-shared;
  85
  86                 opp-800000000 {
  87                         opp-hz = /bits/ 64 <800000000>;
  88                         opp-microvolt = <820000>;
  89                         clock-latency-ns = <300000>;
  90                 };
  91                 opp-1000000000 {
  92                         opp-hz = /bits/ 64 <1000000000>;
  93                         opp-microvolt = <820000>;
  94                         clock-latency-ns = <300000>;
  95                 };
  96                 opp-1200000000 {
  97                         opp-hz = /bits/ 64 <1200000000>;
  98                         opp-microvolt = <820000>;
  99                         clock-latency-ns = <300000>;
 100                 };
 101         };
 102
 103         cpus {
 104                 #address-cells = <1>;
 105                 #size-cells = <0>;
 106
 107                 cpu-map {
 108                         cluster0 {
 109                                 core0 {
 110                                         cpu = <&a57_0>;
 111                                 };
 112                                 core1 {
 113                                         cpu = <&a57_1>;
 114                                 };
 115                         };
 116
 117                         cluster1 {
 118                                 core0 {
 119                                         cpu = <&a53_0>;
 120                                 };
 121                                 core1 {
 122                                         cpu = <&a53_1>;
 123                                 };
 124                                 core2 {
 125                                         cpu = <&a53_2>;
 126                                 };
 127                                 core3 {
 128                                         cpu = <&a53_3>;
 129                                 };
 130                         };
 131                 };
 132
 133                 a57_0: cpu@0 {
 134                         compatible = "arm,cortex-a57";
 135                         reg = <0x0>;
 136                         device_type = "cpu";
 137                         power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
 138                         next-level-cache = <&L2_CA57>;
 139                         enable-method = "psci";
 140                         dynamic-power-coefficient = <854>;
 141                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 142                         operating-points-v2 = <&cluster0_opp>;
 143                         capacity-dmips-mhz = <1024>;
 144                         #cooling-cells = <2>;
 145                 };
 146
 147                 a57_1: cpu@1 {
 148                         compatible = "arm,cortex-a57";
 149                         reg = <0x1>;
 150                         device_type = "cpu";
 151                         power-domains = <&sysc R8A774A1_PD_CA57_CPU1>;
 152                         next-level-cache = <&L2_CA57>;
 153                         enable-method = "psci";
 154                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 155                         operating-points-v2 = <&cluster0_opp>;
 156                         capacity-dmips-mhz = <1024>;
 157                         #cooling-cells = <2>;
 158                 };
 159
 160                 a53_0: cpu@100 {
 161                         compatible = "arm,cortex-a53";
 162                         reg = <0x100>;
 163                         device_type = "cpu";
 164                         power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
 165                         next-level-cache = <&L2_CA53>;
 166                         enable-method = "psci";
 167                         #cooling-cells = <2>;
 168                         dynamic-power-coefficient = <277>;
 169                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 170                         operating-points-v2 = <&cluster1_opp>;
 171                         capacity-dmips-mhz = <560>;
 172                 };
 173
 174                 a53_1: cpu@101 {
 175                         compatible = "arm,cortex-a53";
 176                         reg = <0x101>;
 177                         device_type = "cpu";
 178                         power-domains = <&sysc R8A774A1_PD_CA53_CPU1>;
 179                         next-level-cache = <&L2_CA53>;
 180                         enable-method = "psci";
 181                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 182                         operating-points-v2 = <&cluster1_opp>;
 183                         capacity-dmips-mhz = <560>;
 184                 };
 185
 186                 a53_2: cpu@102 {
 187                         compatible = "arm,cortex-a53";
 188                         reg = <0x102>;
 189                         device_type = "cpu";
 190                         power-domains = <&sysc R8A774A1_PD_CA53_CPU2>;
 191                         next-level-cache = <&L2_CA53>;
 192                         enable-method = "psci";
 193                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 194                         operating-points-v2 = <&cluster1_opp>;
 195                         capacity-dmips-mhz = <560>;
 196                 };
 197
 198                 a53_3: cpu@103 {
 199                         compatible = "arm,cortex-a53";
 200                         reg = <0x103>;
 201                         device_type = "cpu";
 202                         power-domains = <&sysc R8A774A1_PD_CA53_CPU3>;
 203                         next-level-cache = <&L2_CA53>;
 204                         enable-method = "psci";
 205                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 206                         operating-points-v2 = <&cluster1_opp>;
 207                         capacity-dmips-mhz = <560>;
 208                 };
 209
 210                 L2_CA57: cache-controller-0 {
 211                         compatible = "cache";
 212                         power-domains = <&sysc R8A774A1_PD_CA57_SCU>;
 213                         cache-unified;
 214                         cache-level = <2>;
 215                 };
 216
 217                 L2_CA53: cache-controller-1 {
 218                         compatible = "cache";
 219                         power-domains = <&sysc R8A774A1_PD_CA53_SCU>;
 220                         cache-unified;
 221                         cache-level = <2>;
 222                 };
 223         };
 224
 225         extal_clk: extal {
 226                 compatible = "fixed-clock";
 227                 #clock-cells = <0>;
 228                 /* This value must be overridden by the board */
 229                 clock-frequency = <0>;
 230         };
 231
 232         extalr_clk: extalr {
 233                 compatible = "fixed-clock";
 234                 #clock-cells = <0>;
 235                 /* This value must be overridden by the board */
 236                 clock-frequency = <0>;
 237         };
 238
 239         /* External PCIe clock - can be overridden by the board */
 240         pcie_bus_clk: pcie_bus {
 241                 compatible = "fixed-clock";
 242                 #clock-cells = <0>;
 243                 clock-frequency = <0>;
 244         };
 245
 246         pmu_a53 {
 247                 compatible = "arm,cortex-a53-pmu";
 248                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 249                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 250                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 251                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 252                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 253         };
 254
 255         pmu_a57 {
 256                 compatible = "arm,cortex-a57-pmu";
 257                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 258                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 259                 interrupt-affinity = <&a57_0>, <&a57_1>;
 260         };
 261
 262         psci {
 263                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 264                 method = "smc";
 265         };
 266
 267         /* External SCIF clock - to be overridden by boards that provide it */
 268         scif_clk: scif {
 269                 compatible = "fixed-clock";
 270                 #clock-cells = <0>;
 271                 clock-frequency = <0>;
 272         };
 273
 274         soc {
 275                 compatible = "simple-bus";
 276                 interrupt-parent = <&gic>;
 277                 #address-cells = <2>;
 278                 #size-cells = <2>;
 279                 ranges;
 280
 281                 rwdt: watchdog@e6020000 {
 282                         compatible = "renesas,r8a774a1-wdt",
 283                                      "renesas,rcar-gen3-wdt";
 284                         reg = <0 0xe6020000 0 0x0c>;
 285                         clocks = <&cpg CPG_MOD 402>;
 286                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 287                         resets = <&cpg 402>;
 288                         status = "disabled";
 289                 };
 290
 291                 gpio0: gpio@e6050000 {
 292                         compatible = "renesas,gpio-r8a774a1",
 293                                      "renesas,rcar-gen3-gpio";
 294                         reg = <0 0xe6050000 0 0x50>;
 295                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 296                         #gpio-cells = <2>;
 297                         gpio-controller;
 298                         gpio-ranges = <&pfc 0 0 16>;
 299                         #interrupt-cells = <2>;
 300                         interrupt-controller;
 301                         clocks = <&cpg CPG_MOD 912>;
 302                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 303                         resets = <&cpg 912>;
 304                 };
 305
 306                 gpio1: gpio@e6051000 {
 307                         compatible = "renesas,gpio-r8a774a1",
 308                                      "renesas,rcar-gen3-gpio";
 309                         reg = <0 0xe6051000 0 0x50>;
 310                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 311                         #gpio-cells = <2>;
 312                         gpio-controller;
 313                         gpio-ranges = <&pfc 0 32 29>;
 314                         #interrupt-cells = <2>;
 315                         interrupt-controller;
 316                         clocks = <&cpg CPG_MOD 911>;
 317                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 318                         resets = <&cpg 911>;
 319                 };
 320
 321                 gpio2: gpio@e6052000 {
 322                         compatible = "renesas,gpio-r8a774a1",
 323                                      "renesas,rcar-gen3-gpio";
 324                         reg = <0 0xe6052000 0 0x50>;
 325                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 326                         #gpio-cells = <2>;
 327                         gpio-controller;
 328                         gpio-ranges = <&pfc 0 64 15>;
 329                         #interrupt-cells = <2>;
 330                         interrupt-controller;
 331                         clocks = <&cpg CPG_MOD 910>;
 332                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 333                         resets = <&cpg 910>;
 334                 };
 335
 336                 gpio3: gpio@e6053000 {
 337                         compatible = "renesas,gpio-r8a774a1",
 338                                      "renesas,rcar-gen3-gpio";
 339                         reg = <0 0xe6053000 0 0x50>;
 340                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 341                         #gpio-cells = <2>;
 342                         gpio-controller;
 343                         gpio-ranges = <&pfc 0 96 16>;
 344                         #interrupt-cells = <2>;
 345                         interrupt-controller;
 346                         clocks = <&cpg CPG_MOD 909>;
 347                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 348                         resets = <&cpg 909>;
 349                 };
 350
 351                 gpio4: gpio@e6054000 {
 352                         compatible = "renesas,gpio-r8a774a1",
 353                                      "renesas,rcar-gen3-gpio";
 354                         reg = <0 0xe6054000 0 0x50>;
 355                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 356                         #gpio-cells = <2>;
 357                         gpio-controller;
 358                         gpio-ranges = <&pfc 0 128 18>;
 359                         #interrupt-cells = <2>;
 360                         interrupt-controller;
 361                         clocks = <&cpg CPG_MOD 908>;
 362                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 363                         resets = <&cpg 908>;
 364                 };
 365
 366                 gpio5: gpio@e6055000 {
 367                         compatible = "renesas,gpio-r8a774a1",
 368                                      "renesas,rcar-gen3-gpio";
 369                         reg = <0 0xe6055000 0 0x50>;
 370                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 371                         #gpio-cells = <2>;
 372                         gpio-controller;
 373                         gpio-ranges = <&pfc 0 160 26>;
 374                         #interrupt-cells = <2>;
 375                         interrupt-controller;
 376                         clocks = <&cpg CPG_MOD 907>;
 377                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 378                         resets = <&cpg 907>;
 379                 };
 380
 381                 gpio6: gpio@e6055400 {
 382                         compatible = "renesas,gpio-r8a774a1",
 383                                      "renesas,rcar-gen3-gpio";
 384                         reg = <0 0xe6055400 0 0x50>;
 385                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 386                         #gpio-cells = <2>;
 387                         gpio-controller;
 388                         gpio-ranges = <&pfc 0 192 32>;
 389                         #interrupt-cells = <2>;
 390                         interrupt-controller;
 391                         clocks = <&cpg CPG_MOD 906>;
 392                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 393                         resets = <&cpg 906>;
 394                 };
 395
 396                 gpio7: gpio@e6055800 {
 397                         compatible = "renesas,gpio-r8a774a1",
 398                                      "renesas,rcar-gen3-gpio";
 399                         reg = <0 0xe6055800 0 0x50>;
 400                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 401                         #gpio-cells = <2>;
 402                         gpio-controller;
 403                         gpio-ranges = <&pfc 0 224 4>;
 404                         #interrupt-cells = <2>;
 405                         interrupt-controller;
 406                         clocks = <&cpg CPG_MOD 905>;
 407                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 408                         resets = <&cpg 905>;
 409                 };
 410
 411                 pfc: pin-controller@e6060000 {
 412                         compatible = "renesas,pfc-r8a774a1";
 413                         reg = <0 0xe6060000 0 0x50c>;
 414                 };
 415
 416                 cmt0: timer@e60f0000 {
 417                         compatible = "renesas,r8a774a1-cmt0",
 418                                      "renesas,rcar-gen3-cmt0";
 419                         reg = <0 0xe60f0000 0 0x1004>;
 420                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 421                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 422                         clocks = <&cpg CPG_MOD 303>;
 423                         clock-names = "fck";
 424                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 425                         resets = <&cpg 303>;
 426                         status = "disabled";
 427                 };
 428
 429                 cmt1: timer@e6130000 {
 430                         compatible = "renesas,r8a774a1-cmt1",
 431                                      "renesas,rcar-gen3-cmt1";
 432                         reg = <0 0xe6130000 0 0x1004>;
 433                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 434                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 435                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 436                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 437                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 438                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 439                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 440                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 441                         clocks = <&cpg CPG_MOD 302>;
 442                         clock-names = "fck";
 443                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 444                         resets = <&cpg 302>;
 445                         status = "disabled";
 446                 };
 447
 448                 cmt2: timer@e6140000 {
 449                         compatible = "renesas,r8a774a1-cmt1",
 450                                      "renesas,rcar-gen3-cmt1";
 451                         reg = <0 0xe6140000 0 0x1004>;
 452                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 453                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 454                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 455                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 456                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 457                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 458                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 459                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 460                         clocks = <&cpg CPG_MOD 301>;
 461                         clock-names = "fck";
 462                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 463                         resets = <&cpg 301>;
 464                         status = "disabled";
 465                 };
 466
 467                 cmt3: timer@e6148000 {
 468                         compatible = "renesas,r8a774a1-cmt1",
 469                                      "renesas,rcar-gen3-cmt1";
 470                         reg = <0 0xe6148000 0 0x1004>;
 471                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 472                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 473                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 474                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 475                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 476                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 477                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 478                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 479                         clocks = <&cpg CPG_MOD 300>;
 480                         clock-names = "fck";
 481                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 482                         resets = <&cpg 300>;
 483                         status = "disabled";
 484                 };
 485
 486                 cpg: clock-controller@e6150000 {
 487                         compatible = "renesas,r8a774a1-cpg-mssr";
 488                         reg = <0 0xe6150000 0 0x0bb0>;
 489                         clocks = <&extal_clk>, <&extalr_clk>;
 490                         clock-names = "extal", "extalr";
 491                         #clock-cells = <2>;
 492                         #power-domain-cells = <0>;
 493                         #reset-cells = <1>;
 494                 };
 495
 496                 rst: reset-controller@e6160000 {
 497                         compatible = "renesas,r8a774a1-rst";
 498                         reg = <0 0xe6160000 0 0x018c>;
 499                 };
 500
 501                 sysc: system-controller@e6180000 {
 502                         compatible = "renesas,r8a774a1-sysc";
 503                         reg = <0 0xe6180000 0 0x0400>;
 504                         #power-domain-cells = <1>;
 505                 };
 506
 507                 tsc: thermal@e6198000 {
 508                         compatible = "renesas,r8a774a1-thermal";
 509                         reg = <0 0xe6198000 0 0x100>,
 510                               <0 0xe61a0000 0 0x100>,
 511                               <0 0xe61a8000 0 0x100>;
 512                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 513                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 514                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 515                         clocks = <&cpg CPG_MOD 522>;
 516                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 517                         resets = <&cpg 522>;
 518                         #thermal-sensor-cells = <1>;
 519                 };
 520
 521                 intc_ex: interrupt-controller@e61c0000 {
 522                         compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
 523                         #interrupt-cells = <2>;
 524                         interrupt-controller;
 525                         reg = <0 0xe61c0000 0 0x200>;
 526                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 527                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 528                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 529                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 530                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 531                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 532                         clocks = <&cpg CPG_MOD 407>;
 533                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 534                         resets = <&cpg 407>;
 535                 };
 536
 537                 tmu0: timer@e61e0000 {
 538                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 539                         reg = <0 0xe61e0000 0 0x30>;
 540                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 541                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 542                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 543                         clocks = <&cpg CPG_MOD 125>;
 544                         clock-names = "fck";
 545                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 546                         resets = <&cpg 125>;
 547                         status = "disabled";
 548                 };
 549
 550                 tmu1: timer@e6fc0000 {
 551                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 552                         reg = <0 0xe6fc0000 0 0x30>;
 553                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 554                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 555                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 556                         clocks = <&cpg CPG_MOD 124>;
 557                         clock-names = "fck";
 558                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 559                         resets = <&cpg 124>;
 560                         status = "disabled";
 561                 };
 562
 563                 tmu2: timer@e6fd0000 {
 564                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 565                         reg = <0 0xe6fd0000 0 0x30>;
 566                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 567                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 568                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 569                         clocks = <&cpg CPG_MOD 123>;
 570                         clock-names = "fck";
 571                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 572                         resets = <&cpg 123>;
 573                         status = "disabled";
 574                 };
 575
 576                 tmu3: timer@e6fe0000 {
 577                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 578                         reg = <0 0xe6fe0000 0 0x30>;
 579                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 580                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 581                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 582                         clocks = <&cpg CPG_MOD 122>;
 583                         clock-names = "fck";
 584                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 585                         resets = <&cpg 122>;
 586                         status = "disabled";
 587                 };
 588
 589                 tmu4: timer@ffc00000 {
 590                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 591                         reg = <0 0xffc00000 0 0x30>;
 592                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 593                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 594                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 595                         clocks = <&cpg CPG_MOD 121>;
 596                         clock-names = "fck";
 597                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 598                         resets = <&cpg 121>;
 599                         status = "disabled";
 600                 };
 601
 602                 i2c0: i2c@e6500000 {
 603                         #address-cells = <1>;
 604                         #size-cells = <0>;
 605                         compatible = "renesas,i2c-r8a774a1",
 606                                      "renesas,rcar-gen3-i2c";
 607                         reg = <0 0xe6500000 0 0x40>;
 608                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 609                         clocks = <&cpg CPG_MOD 931>;
 610                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 611                         resets = <&cpg 931>;
 612                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 613                                <&dmac2 0x91>, <&dmac2 0x90>;
 614                         dma-names = "tx", "rx", "tx", "rx";
 615                         i2c-scl-internal-delay-ns = <110>;
 616                         status = "disabled";
 617                 };
 618
 619                 i2c1: i2c@e6508000 {
 620                         #address-cells = <1>;
 621                         #size-cells = <0>;
 622                         compatible = "renesas,i2c-r8a774a1",
 623                                      "renesas,rcar-gen3-i2c";
 624                         reg = <0 0xe6508000 0 0x40>;
 625                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 626                         clocks = <&cpg CPG_MOD 930>;
 627                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 628                         resets = <&cpg 930>;
 629                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 630                                <&dmac2 0x93>, <&dmac2 0x92>;
 631                         dma-names = "tx", "rx", "tx", "rx";
 632                         i2c-scl-internal-delay-ns = <6>;
 633                         status = "disabled";
 634                 };
 635
 636                 i2c2: i2c@e6510000 {
 637                         #address-cells = <1>;
 638                         #size-cells = <0>;
 639                         compatible = "renesas,i2c-r8a774a1",
 640                                      "renesas,rcar-gen3-i2c";
 641                         reg = <0 0xe6510000 0 0x40>;
 642                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 643                         clocks = <&cpg CPG_MOD 929>;
 644                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 645                         resets = <&cpg 929>;
 646                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 647                                <&dmac2 0x95>, <&dmac2 0x94>;
 648                         dma-names = "tx", "rx", "tx", "rx";
 649                         i2c-scl-internal-delay-ns = <6>;
 650                         status = "disabled";
 651                 };
 652
 653                 i2c3: i2c@e66d0000 {
 654                         #address-cells = <1>;
 655                         #size-cells = <0>;
 656                         compatible = "renesas,i2c-r8a774a1",
 657                                      "renesas,rcar-gen3-i2c";
 658                         reg = <0 0xe66d0000 0 0x40>;
 659                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 660                         clocks = <&cpg CPG_MOD 928>;
 661                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 662                         resets = <&cpg 928>;
 663                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 664                         dma-names = "tx", "rx";
 665                         i2c-scl-internal-delay-ns = <110>;
 666                         status = "disabled";
 667                 };
 668
 669                 i2c4: i2c@e66d8000 {
 670                         #address-cells = <1>;
 671                         #size-cells = <0>;
 672                         compatible = "renesas,i2c-r8a774a1",
 673                                      "renesas,rcar-gen3-i2c";
 674                         reg = <0 0xe66d8000 0 0x40>;
 675                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 676                         clocks = <&cpg CPG_MOD 927>;
 677                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 678                         resets = <&cpg 927>;
 679                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 680                         dma-names = "tx", "rx";
 681                         i2c-scl-internal-delay-ns = <110>;
 682                         status = "disabled";
 683                 };
 684
 685                 i2c5: i2c@e66e0000 {
 686                         #address-cells = <1>;
 687                         #size-cells = <0>;
 688                         compatible = "renesas,i2c-r8a774a1",
 689                                      "renesas,rcar-gen3-i2c";
 690                         reg = <0 0xe66e0000 0 0x40>;
 691                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 692                         clocks = <&cpg CPG_MOD 919>;
 693                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 694                         resets = <&cpg 919>;
 695                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 696                         dma-names = "tx", "rx";
 697                         i2c-scl-internal-delay-ns = <110>;
 698                         status = "disabled";
 699                 };
 700
 701                 i2c6: i2c@e66e8000 {
 702                         #address-cells = <1>;
 703                         #size-cells = <0>;
 704                         compatible = "renesas,i2c-r8a774a1",
 705                                      "renesas,rcar-gen3-i2c";
 706                         reg = <0 0xe66e8000 0 0x40>;
 707                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 708                         clocks = <&cpg CPG_MOD 918>;
 709                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 710                         resets = <&cpg 918>;
 711                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 712                         dma-names = "tx", "rx";
 713                         i2c-scl-internal-delay-ns = <6>;
 714                         status = "disabled";
 715                 };
 716
 717                 i2c_dvfs: i2c@e60b0000 {
 718                         #address-cells = <1>;
 719                         #size-cells = <0>;
 720                         compatible = "renesas,iic-r8a774a1",
 721                                      "renesas,rcar-gen3-iic",
 722                                      "renesas,rmobile-iic";
 723                         reg = <0 0xe60b0000 0 0x425>;
 724                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 725                         clocks = <&cpg CPG_MOD 926>;
 726                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 727                         resets = <&cpg 926>;
 728                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 729                         dma-names = "tx", "rx";
 730                         status = "disabled";
 731                 };
 732
 733                 hscif0: serial@e6540000 {
 734                         compatible = "renesas,hscif-r8a774a1",
 735                                      "renesas,rcar-gen3-hscif",
 736                                      "renesas,hscif";
 737                         reg = <0 0xe6540000 0 0x60>;
 738                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 739                         clocks = <&cpg CPG_MOD 520>,
 740                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 741                                  <&scif_clk>;
 742                         clock-names = "fck", "brg_int", "scif_clk";
 743                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 744                                <&dmac2 0x31>, <&dmac2 0x30>;
 745                         dma-names = "tx", "rx", "tx", "rx";
 746                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 747                         resets = <&cpg 520>;
 748                         status = "disabled";
 749                 };
 750
 751                 hscif1: serial@e6550000 {
 752                         compatible = "renesas,hscif-r8a774a1",
 753                                      "renesas,rcar-gen3-hscif",
 754                                      "renesas,hscif";
 755                         reg = <0 0xe6550000 0 0x60>;
 756                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 757                         clocks = <&cpg CPG_MOD 519>,
 758                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 759                                  <&scif_clk>;
 760                         clock-names = "fck", "brg_int", "scif_clk";
 761                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 762                                <&dmac2 0x33>, <&dmac2 0x32>;
 763                         dma-names = "tx", "rx", "tx", "rx";
 764                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 765                         resets = <&cpg 519>;
 766                         status = "disabled";
 767                 };
 768
 769                 hscif2: serial@e6560000 {
 770                         compatible = "renesas,hscif-r8a774a1",
 771                                      "renesas,rcar-gen3-hscif",
 772                                      "renesas,hscif";
 773                         reg = <0 0xe6560000 0 0x60>;
 774                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 775                         clocks = <&cpg CPG_MOD 518>,
 776                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 777                                  <&scif_clk>;
 778                         clock-names = "fck", "brg_int", "scif_clk";
 779                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 780                                <&dmac2 0x35>, <&dmac2 0x34>;
 781                         dma-names = "tx", "rx", "tx", "rx";
 782                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 783                         resets = <&cpg 518>;
 784                         status = "disabled";
 785                 };
 786
 787                 hscif3: serial@e66a0000 {
 788                         compatible = "renesas,hscif-r8a774a1",
 789                                      "renesas,rcar-gen3-hscif",
 790                                      "renesas,hscif";
 791                         reg = <0 0xe66a0000 0 0x60>;
 792                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 793                         clocks = <&cpg CPG_MOD 517>,
 794                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 795                                  <&scif_clk>;
 796                         clock-names = "fck", "brg_int", "scif_clk";
 797                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 798                         dma-names = "tx", "rx";
 799                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 800                         resets = <&cpg 517>;
 801                         status = "disabled";
 802                 };
 803
 804                 hscif4: serial@e66b0000 {
 805                         compatible = "renesas,hscif-r8a774a1",
 806                                      "renesas,rcar-gen3-hscif",
 807                                      "renesas,hscif";
 808                         reg = <0 0xe66b0000 0 0x60>;
 809                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 810                         clocks = <&cpg CPG_MOD 516>,
 811                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 812                                  <&scif_clk>;
 813                         clock-names = "fck", "brg_int", "scif_clk";
 814                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 815                         dma-names = "tx", "rx";
 816                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 817                         resets = <&cpg 516>;
 818                         status = "disabled";
 819                 };
 820
 821                 hsusb: usb@e6590000 {
 822                         compatible = "renesas,usbhs-r8a774a1",
 823                                      "renesas,rcar-gen3-usbhs";
 824                         reg = <0 0xe6590000 0 0x200>;
 825                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 826                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 827                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 828                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 829                         dma-names = "ch0", "ch1", "ch2", "ch3";
 830                         renesas,buswait = <11>;
 831                         phys = <&usb2_phy0 3>;
 832                         phy-names = "usb";
 833                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 834                         resets = <&cpg 704>, <&cpg 703>;
 835                         status = "disabled";
 836                 };
 837
 838                 usb_dmac0: dma-controller@e65a0000 {
 839                         compatible = "renesas,r8a774a1-usb-dmac",
 840                                      "renesas,usb-dmac";
 841                         reg = <0 0xe65a0000 0 0x100>;
 842                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 843                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 844                         interrupt-names = "ch0", "ch1";
 845                         clocks = <&cpg CPG_MOD 330>;
 846                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 847                         resets = <&cpg 330>;
 848                         #dma-cells = <1>;
 849                         dma-channels = <2>;
 850                 };
 851
 852                 usb_dmac1: dma-controller@e65b0000 {
 853                         compatible = "renesas,r8a774a1-usb-dmac",
 854                                      "renesas,usb-dmac";
 855                         reg = <0 0xe65b0000 0 0x100>;
 856                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 857                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 858                         interrupt-names = "ch0", "ch1";
 859                         clocks = <&cpg CPG_MOD 331>;
 860                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 861                         resets = <&cpg 331>;
 862                         #dma-cells = <1>;
 863                         dma-channels = <2>;
 864                 };
 865
 866                 usb3_phy0: usb-phy@e65ee000 {
 867                         compatible = "renesas,r8a774a1-usb3-phy",
 868                                      "renesas,rcar-gen3-usb3-phy";
 869                         reg = <0 0xe65ee000 0 0x90>;
 870                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 871                                  <&usb_extal_clk>;
 872                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 873                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 874                         resets = <&cpg 328>;
 875                         #phy-cells = <0>;
 876                         status = "disabled";
 877                 };
 878
 879                 dmac0: dma-controller@e6700000 {
 880                         compatible = "renesas,dmac-r8a774a1",
 881                                      "renesas,rcar-dmac";
 882                         reg = <0 0xe6700000 0 0x10000>;
 883                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 884                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 885                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 886                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 887                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 888                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 889                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 890                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 891                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 892                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 893                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 894                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 895                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 896                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 897                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 898                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 899                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 900                         interrupt-names = "error",
 901                                         "ch0", "ch1", "ch2", "ch3",
 902                                         "ch4", "ch5", "ch6", "ch7",
 903                                         "ch8", "ch9", "ch10", "ch11",
 904                                         "ch12", "ch13", "ch14", "ch15";
 905                         clocks = <&cpg CPG_MOD 219>;
 906                         clock-names = "fck";
 907                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 908                         resets = <&cpg 219>;
 909                         #dma-cells = <1>;
 910                         dma-channels = <16>;
 911                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 912                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 913                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 914                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 915                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 916                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 917                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 918                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 919                 };
 920
 921                 dmac1: dma-controller@e7300000 {
 922                         compatible = "renesas,dmac-r8a774a1",
 923                                      "renesas,rcar-dmac";
 924                         reg = <0 0xe7300000 0 0x10000>;
 925                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 926                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 927                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 928                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 929                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 930                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 931                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 932                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 933                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 934                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 935                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 936                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 937                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 938                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 939                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 940                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 941                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 942                         interrupt-names = "error",
 943                                         "ch0", "ch1", "ch2", "ch3",
 944                                         "ch4", "ch5", "ch6", "ch7",
 945                                         "ch8", "ch9", "ch10", "ch11",
 946                                         "ch12", "ch13", "ch14", "ch15";
 947                         clocks = <&cpg CPG_MOD 218>;
 948                         clock-names = "fck";
 949                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 950                         resets = <&cpg 218>;
 951                         #dma-cells = <1>;
 952                         dma-channels = <16>;
 953                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 954                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 955                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 956                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 957                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 958                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 959                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 960                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 961                 };
 962
 963                 dmac2: dma-controller@e7310000 {
 964                         compatible = "renesas,dmac-r8a774a1",
 965                                      "renesas,rcar-dmac";
 966                         reg = <0 0xe7310000 0 0x10000>;
 967                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
 968                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
 969                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
 970                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
 971                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
 972                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
 973                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
 974                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
 975                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
 976                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
 977                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
 978                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
 979                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
 980                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
 981                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
 982                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
 983                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 984                         interrupt-names = "error",
 985                                         "ch0", "ch1", "ch2", "ch3",
 986                                         "ch4", "ch5", "ch6", "ch7",
 987                                         "ch8", "ch9", "ch10", "ch11",
 988                                         "ch12", "ch13", "ch14", "ch15";
 989                         clocks = <&cpg CPG_MOD 217>;
 990                         clock-names = "fck";
 991                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 992                         resets = <&cpg 217>;
 993                         #dma-cells = <1>;
 994                         dma-channels = <16>;
 995                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 996                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 997                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 998                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 999                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1000                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1001                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1002                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1003                 };
1004
1005                 ipmmu_ds0: iommu@e6740000 {
1006                         compatible = "renesas,ipmmu-r8a774a1";
1007                         reg = <0 0xe6740000 0 0x1000>;
1008                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1009                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1010                         #iommu-cells = <1>;
1011                 };
1012
1013                 ipmmu_ds1: iommu@e7740000 {
1014                         compatible = "renesas,ipmmu-r8a774a1";
1015                         reg = <0 0xe7740000 0 0x1000>;
1016                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1017                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1018                         #iommu-cells = <1>;
1019                 };
1020
1021                 ipmmu_hc: iommu@e6570000 {
1022                         compatible = "renesas,ipmmu-r8a774a1";
1023                         reg = <0 0xe6570000 0 0x1000>;
1024                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1025                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1026                         #iommu-cells = <1>;
1027                 };
1028
1029                 ipmmu_mm: iommu@e67b0000 {
1030                         compatible = "renesas,ipmmu-r8a774a1";
1031                         reg = <0 0xe67b0000 0 0x1000>;
1032                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1033                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1034                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1035                         #iommu-cells = <1>;
1036                 };
1037
1038                 ipmmu_mp: iommu@ec670000 {
1039                         compatible = "renesas,ipmmu-r8a774a1";
1040                         reg = <0 0xec670000 0 0x1000>;
1041                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1042                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1043                         #iommu-cells = <1>;
1044                 };
1045
1046                 ipmmu_pv0: iommu@fd800000 {
1047                         compatible = "renesas,ipmmu-r8a774a1";
1048                         reg = <0 0xfd800000 0 0x1000>;
1049                         renesas,ipmmu-main = <&ipmmu_mm 5>;
1050                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1051                         #iommu-cells = <1>;
1052                 };
1053
1054                 ipmmu_pv1: iommu@fd950000 {
1055                         compatible = "renesas,ipmmu-r8a774a1";
1056                         reg = <0 0xfd950000 0 0x1000>;
1057                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1058                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1059                         #iommu-cells = <1>;
1060                 };
1061
1062                 ipmmu_vc0: iommu@fe6b0000 {
1063                         compatible = "renesas,ipmmu-r8a774a1";
1064                         reg = <0 0xfe6b0000 0 0x1000>;
1065                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1066                         power-domains = <&sysc R8A774A1_PD_A3VC>;
1067                         #iommu-cells = <1>;
1068                 };
1069
1070                 ipmmu_vi0: iommu@febd0000 {
1071                         compatible = "renesas,ipmmu-r8a774a1";
1072                         reg = <0 0xfebd0000 0 0x1000>;
1073                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1074                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1075                         #iommu-cells = <1>;
1076                 };
1077
1078                 avb: ethernet@e6800000 {
1079                         compatible = "renesas,etheravb-r8a774a1",
1080                                      "renesas,etheravb-rcar-gen3";
1081                         reg = <0 0xe6800000 0 0x800>;
1082                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1083                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1084                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1085                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1086                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1087                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1088                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1089                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1090                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1091                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1092                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1093                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1094                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1095                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1096                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1097                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1098                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1099                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1100                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1101                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1102                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1103                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1104                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1105                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1106                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1107                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1108                                           "ch4", "ch5", "ch6", "ch7",
1109                                           "ch8", "ch9", "ch10", "ch11",
1110                                           "ch12", "ch13", "ch14", "ch15",
1111                                           "ch16", "ch17", "ch18", "ch19",
1112                                           "ch20", "ch21", "ch22", "ch23",
1113                                           "ch24";
1114                         clocks = <&cpg CPG_MOD 812>;
1115                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1116                         resets = <&cpg 812>;
1117                         phy-mode = "rgmii";
1118                         iommus = <&ipmmu_ds0 16>;
1119                         #address-cells = <1>;
1120                         #size-cells = <0>;
1121                         status = "disabled";
1122                 };
1123
1124                 can0: can@e6c30000 {
1125                         compatible = "renesas,can-r8a774a1",
1126                                      "renesas,rcar-gen3-can";
1127                         reg = <0 0xe6c30000 0 0x1000>;
1128                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1129                         clocks = <&cpg CPG_MOD 916>,
1130                                  <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1131                                  <&can_clk>;
1132                         clock-names = "clkp1", "clkp2", "can_clk";
1133                         assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1134                         assigned-clock-rates = <40000000>;
1135                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1136                         resets = <&cpg 916>;
1137                         status = "disabled";
1138                 };
1139
1140                 can1: can@e6c38000 {
1141                         compatible = "renesas,can-r8a774a1",
1142                                      "renesas,rcar-gen3-can";
1143                         reg = <0 0xe6c38000 0 0x1000>;
1144                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1145                         clocks = <&cpg CPG_MOD 915>,
1146                                  <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1147                                  <&can_clk>;
1148                         clock-names = "clkp1", "clkp2", "can_clk";
1149                         assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1150                         assigned-clock-rates = <40000000>;
1151                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1152                         resets = <&cpg 915>;
1153                         status = "disabled";
1154                 };
1155
1156                 canfd: can@e66c0000 {
1157                         compatible = "renesas,r8a774a1-canfd",
1158                                      "renesas,rcar-gen3-canfd";
1159                         reg = <0 0xe66c0000 0 0x8000>;
1160                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1161                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1162                         clocks = <&cpg CPG_MOD 914>,
1163                                  <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1164                                  <&can_clk>;
1165                         clock-names = "fck", "canfd", "can_clk";
1166                         assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1167                         assigned-clock-rates = <40000000>;
1168                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1169                         resets = <&cpg 914>;
1170                         status = "disabled";
1171
1172                         channel0 {
1173                                 status = "disabled";
1174                         };
1175
1176                         channel1 {
1177                                 status = "disabled";
1178                         };
1179                 };
1180
1181                 pwm0: pwm@e6e30000 {
1182                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1183                         reg = <0 0xe6e30000 0 0x8>;
1184                         #pwm-cells = <2>;
1185                         clocks = <&cpg CPG_MOD 523>;
1186                         resets = <&cpg 523>;
1187                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1188                         status = "disabled";
1189                 };
1190
1191                 pwm1: pwm@e6e31000 {
1192                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1193                         reg = <0 0xe6e31000 0 0x8>;
1194                         #pwm-cells = <2>;
1195                         clocks = <&cpg CPG_MOD 523>;
1196                         resets = <&cpg 523>;
1197                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1198                         status = "disabled";
1199                 };
1200
1201                 pwm2: pwm@e6e32000 {
1202                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1203                         reg = <0 0xe6e32000 0 0x8>;
1204                         #pwm-cells = <2>;
1205                         clocks = <&cpg CPG_MOD 523>;
1206                         resets = <&cpg 523>;
1207                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1208                         status = "disabled";
1209                 };
1210
1211                 pwm3: pwm@e6e33000 {
1212                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1213                         reg = <0 0xe6e33000 0 0x8>;
1214                         #pwm-cells = <2>;
1215                         clocks = <&cpg CPG_MOD 523>;
1216                         resets = <&cpg 523>;
1217                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1218                         status = "disabled";
1219                 };
1220
1221                 pwm4: pwm@e6e34000 {
1222                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1223                         reg = <0 0xe6e34000 0 0x8>;
1224                         #pwm-cells = <2>;
1225                         clocks = <&cpg CPG_MOD 523>;
1226                         resets = <&cpg 523>;
1227                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1228                         status = "disabled";
1229                 };
1230
1231                 pwm5: pwm@e6e35000 {
1232                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1233                         reg = <0 0xe6e35000 0 0x8>;
1234                         #pwm-cells = <2>;
1235                         clocks = <&cpg CPG_MOD 523>;
1236                         resets = <&cpg 523>;
1237                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1238                         status = "disabled";
1239                 };
1240
1241                 pwm6: pwm@e6e36000 {
1242                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1243                         reg = <0 0xe6e36000 0 0x8>;
1244                         #pwm-cells = <2>;
1245                         clocks = <&cpg CPG_MOD 523>;
1246                         resets = <&cpg 523>;
1247                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1248                         status = "disabled";
1249                 };
1250
1251                 scif0: serial@e6e60000 {
1252                         compatible = "renesas,scif-r8a774a1",
1253                                      "renesas,rcar-gen3-scif", "renesas,scif";
1254                         reg = <0 0xe6e60000 0 0x40>;
1255                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1256                         clocks = <&cpg CPG_MOD 207>,
1257                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1258                                  <&scif_clk>;
1259                         clock-names = "fck", "brg_int", "scif_clk";
1260                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1261                                <&dmac2 0x51>, <&dmac2 0x50>;
1262                         dma-names = "tx", "rx", "tx", "rx";
1263                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1264                         resets = <&cpg 207>;
1265                         status = "disabled";
1266                 };
1267
1268                 scif1: serial@e6e68000 {
1269                         compatible = "renesas,scif-r8a774a1",
1270                                      "renesas,rcar-gen3-scif", "renesas,scif";
1271                         reg = <0 0xe6e68000 0 0x40>;
1272                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1273                         clocks = <&cpg CPG_MOD 206>,
1274                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1275                                  <&scif_clk>;
1276                         clock-names = "fck", "brg_int", "scif_clk";
1277                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1278                                <&dmac2 0x53>, <&dmac2 0x52>;
1279                         dma-names = "tx", "rx", "tx", "rx";
1280                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1281                         resets = <&cpg 206>;
1282                         status = "disabled";
1283                 };
1284
1285                 scif2: serial@e6e88000 {
1286                         compatible = "renesas,scif-r8a774a1",
1287                                      "renesas,rcar-gen3-scif", "renesas,scif";
1288                         reg = <0 0xe6e88000 0 0x40>;
1289                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1290                         clocks = <&cpg CPG_MOD 310>,
1291                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1292                                  <&scif_clk>;
1293                         clock-names = "fck", "brg_int", "scif_clk";
1294                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1295                                <&dmac2 0x13>, <&dmac2 0x12>;
1296                         dma-names = "tx", "rx", "tx", "rx";
1297                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1298                         resets = <&cpg 310>;
1299                         status = "disabled";
1300                 };
1301
1302                 scif3: serial@e6c50000 {
1303                         compatible = "renesas,scif-r8a774a1",
1304                                      "renesas,rcar-gen3-scif", "renesas,scif";
1305                         reg = <0 0xe6c50000 0 0x40>;
1306                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1307                         clocks = <&cpg CPG_MOD 204>,
1308                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1309                                  <&scif_clk>;
1310                         clock-names = "fck", "brg_int", "scif_clk";
1311                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1312                         dma-names = "tx", "rx";
1313                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1314                         resets = <&cpg 204>;
1315                         status = "disabled";
1316                 };
1317
1318                 scif4: serial@e6c40000 {
1319                         compatible = "renesas,scif-r8a774a1",
1320                                      "renesas,rcar-gen3-scif", "renesas,scif";
1321                         reg = <0 0xe6c40000 0 0x40>;
1322                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1323                         clocks = <&cpg CPG_MOD 203>,
1324                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1325                                  <&scif_clk>;
1326                         clock-names = "fck", "brg_int", "scif_clk";
1327                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1328                         dma-names = "tx", "rx";
1329                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1330                         resets = <&cpg 203>;
1331                         status = "disabled";
1332                 };
1333
1334                 scif5: serial@e6f30000 {
1335                         compatible = "renesas,scif-r8a774a1",
1336                                      "renesas,rcar-gen3-scif", "renesas,scif";
1337                         reg = <0 0xe6f30000 0 0x40>;
1338                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1339                         clocks = <&cpg CPG_MOD 202>,
1340                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1341                                  <&scif_clk>;
1342                         clock-names = "fck", "brg_int", "scif_clk";
1343                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1344                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1345                         dma-names = "tx", "rx", "tx", "rx";
1346                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1347                         resets = <&cpg 202>;
1348                         status = "disabled";
1349                 };
1350
1351                 msiof0: spi@e6e90000 {
1352                         compatible = "renesas,msiof-r8a774a1",
1353                                      "renesas,rcar-gen3-msiof";
1354                         reg = <0 0xe6e90000 0 0x0064>;
1355                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1356                         clocks = <&cpg CPG_MOD 211>;
1357                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1358                                <&dmac2 0x41>, <&dmac2 0x40>;
1359                         dma-names = "tx", "rx", "tx", "rx";
1360                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1361                         resets = <&cpg 211>;
1362                         #address-cells = <1>;
1363                         #size-cells = <0>;
1364                         status = "disabled";
1365                 };
1366
1367                 msiof1: spi@e6ea0000 {
1368                         compatible = "renesas,msiof-r8a774a1",
1369                                      "renesas,rcar-gen3-msiof";
1370                         reg = <0 0xe6ea0000 0 0x0064>;
1371                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1372                         clocks = <&cpg CPG_MOD 210>;
1373                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1374                                <&dmac2 0x43>, <&dmac2 0x42>;
1375                         dma-names = "tx", "rx", "tx", "rx";
1376                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1377                         resets = <&cpg 210>;
1378                         #address-cells = <1>;
1379                         #size-cells = <0>;
1380                         status = "disabled";
1381                 };
1382
1383                 msiof2: spi@e6c00000 {
1384                         compatible = "renesas,msiof-r8a774a1",
1385                                      "renesas,rcar-gen3-msiof";
1386                         reg = <0 0xe6c00000 0 0x0064>;
1387                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1388                         clocks = <&cpg CPG_MOD 209>;
1389                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1390                         dma-names = "tx", "rx";
1391                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1392                         resets = <&cpg 209>;
1393                         #address-cells = <1>;
1394                         #size-cells = <0>;
1395                         status = "disabled";
1396                 };
1397
1398                 msiof3: spi@e6c10000 {
1399                         compatible = "renesas,msiof-r8a774a1",
1400                                      "renesas,rcar-gen3-msiof";
1401                         reg = <0 0xe6c10000 0 0x0064>;
1402                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1403                         clocks = <&cpg CPG_MOD 208>;
1404                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1405                         dma-names = "tx", "rx";
1406                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1407                         resets = <&cpg 208>;
1408                         #address-cells = <1>;
1409                         #size-cells = <0>;
1410                         status = "disabled";
1411                 };
1412
1413                 vin0: video@e6ef0000 {
1414                         compatible = "renesas,vin-r8a774a1";
1415                         reg = <0 0xe6ef0000 0 0x1000>;
1416                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1417                         clocks = <&cpg CPG_MOD 811>;
1418                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1419                         resets = <&cpg 811>;
1420                         renesas,id = <0>;
1421                         status = "disabled";
1422
1423                         ports {
1424                                 #address-cells = <1>;
1425                                 #size-cells = <0>;
1426
1427                                 port@1 {
1428                                         #address-cells = <1>;
1429                                         #size-cells = <0>;
1430
1431                                         reg = <1>;
1432
1433                                         vin0csi20: endpoint@0 {
1434                                                 reg = <0>;
1435                                                 remote-endpoint = <&csi20vin0>;
1436                                         };
1437                                         vin0csi40: endpoint@2 {
1438                                                 reg = <2>;
1439                                                 remote-endpoint = <&csi40vin0>;
1440                                         };
1441                                 };
1442                         };
1443                 };
1444
1445                 vin1: video@e6ef1000 {
1446                         compatible = "renesas,vin-r8a774a1";
1447                         reg = <0 0xe6ef1000 0 0x1000>;
1448                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1449                         clocks = <&cpg CPG_MOD 810>;
1450                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1451                         resets = <&cpg 810>;
1452                         renesas,id = <1>;
1453                         status = "disabled";
1454
1455                         ports {
1456                                 #address-cells = <1>;
1457                                 #size-cells = <0>;
1458
1459                                 port@1 {
1460                                         #address-cells = <1>;
1461                                         #size-cells = <0>;
1462
1463                                         reg = <1>;
1464
1465                                         vin1csi20: endpoint@0 {
1466                                                 reg = <0>;
1467                                                 remote-endpoint = <&csi20vin1>;
1468                                         };
1469                                         vin1csi40: endpoint@2 {
1470                                                 reg = <2>;
1471                                                 remote-endpoint = <&csi40vin1>;
1472                                         };
1473                                 };
1474                         };
1475                 };
1476
1477                 vin2: video@e6ef2000 {
1478                         compatible = "renesas,vin-r8a774a1";
1479                         reg = <0 0xe6ef2000 0 0x1000>;
1480                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1481                         clocks = <&cpg CPG_MOD 809>;
1482                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1483                         resets = <&cpg 809>;
1484                         renesas,id = <2>;
1485                         status = "disabled";
1486
1487                         ports {
1488                                 #address-cells = <1>;
1489                                 #size-cells = <0>;
1490
1491                                 port@1 {
1492                                         #address-cells = <1>;
1493                                         #size-cells = <0>;
1494
1495                                         reg = <1>;
1496
1497                                         vin2csi20: endpoint@0 {
1498                                                 reg = <0>;
1499                                                 remote-endpoint = <&csi20vin2>;
1500                                         };
1501                                         vin2csi40: endpoint@2 {
1502                                                 reg = <2>;
1503                                                 remote-endpoint = <&csi40vin2>;
1504                                         };
1505                                 };
1506                         };
1507                 };
1508
1509                 vin3: video@e6ef3000 {
1510                         compatible = "renesas,vin-r8a774a1";
1511                         reg = <0 0xe6ef3000 0 0x1000>;
1512                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1513                         clocks = <&cpg CPG_MOD 808>;
1514                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1515                         resets = <&cpg 808>;
1516                         renesas,id = <3>;
1517                         status = "disabled";
1518
1519                         ports {
1520                                 #address-cells = <1>;
1521                                 #size-cells = <0>;
1522
1523                                 port@1 {
1524                                         #address-cells = <1>;
1525                                         #size-cells = <0>;
1526
1527                                         reg = <1>;
1528
1529                                         vin3csi20: endpoint@0 {
1530                                                 reg = <0>;
1531                                                 remote-endpoint = <&csi20vin3>;
1532                                         };
1533                                         vin3csi40: endpoint@2 {
1534                                                 reg = <2>;
1535                                                 remote-endpoint = <&csi40vin3>;
1536                                         };
1537                                 };
1538                         };
1539                 };
1540
1541                 vin4: video@e6ef4000 {
1542                         compatible = "renesas,vin-r8a774a1";
1543                         reg = <0 0xe6ef4000 0 0x1000>;
1544                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1545                         clocks = <&cpg CPG_MOD 807>;
1546                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1547                         resets = <&cpg 807>;
1548                         renesas,id = <4>;
1549                         status = "disabled";
1550
1551                         ports {
1552                                 #address-cells = <1>;
1553                                 #size-cells = <0>;
1554
1555                                 port@1 {
1556                                         #address-cells = <1>;
1557                                         #size-cells = <0>;
1558
1559                                         reg = <1>;
1560
1561                                         vin4csi20: endpoint@0 {
1562                                                 reg = <0>;
1563                                                 remote-endpoint = <&csi20vin4>;
1564                                         };
1565                                         vin4csi40: endpoint@2 {
1566                                                 reg = <2>;
1567                                                 remote-endpoint = <&csi40vin4>;
1568                                         };
1569                                 };
1570                         };
1571                 };
1572
1573                 vin5: video@e6ef5000 {
1574                         compatible = "renesas,vin-r8a774a1";
1575                         reg = <0 0xe6ef5000 0 0x1000>;
1576                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1577                         clocks = <&cpg CPG_MOD 806>;
1578                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1579                         resets = <&cpg 806>;
1580                         renesas,id = <5>;
1581                         status = "disabled";
1582
1583                         ports {
1584                                 #address-cells = <1>;
1585                                 #size-cells = <0>;
1586
1587                                 port@1 {
1588                                         #address-cells = <1>;
1589                                         #size-cells = <0>;
1590
1591                                         reg = <1>;
1592
1593                                         vin5csi20: endpoint@0 {
1594                                                 reg = <0>;
1595                                                 remote-endpoint = <&csi20vin5>;
1596                                         };
1597                                         vin5csi40: endpoint@2 {
1598                                                 reg = <2>;
1599                                                 remote-endpoint = <&csi40vin5>;
1600                                         };
1601                                 };
1602                         };
1603                 };
1604
1605                 vin6: video@e6ef6000 {
1606                         compatible = "renesas,vin-r8a774a1";
1607                         reg = <0 0xe6ef6000 0 0x1000>;
1608                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1609                         clocks = <&cpg CPG_MOD 805>;
1610                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1611                         resets = <&cpg 805>;
1612                         renesas,id = <6>;
1613                         status = "disabled";
1614
1615                         ports {
1616                                 #address-cells = <1>;
1617                                 #size-cells = <0>;
1618
1619                                 port@1 {
1620                                         #address-cells = <1>;
1621                                         #size-cells = <0>;
1622
1623                                         reg = <1>;
1624
1625                                         vin6csi20: endpoint@0 {
1626                                                 reg = <0>;
1627                                                 remote-endpoint = <&csi20vin6>;
1628                                         };
1629                                         vin6csi40: endpoint@2 {
1630                                                 reg = <2>;
1631                                                 remote-endpoint = <&csi40vin6>;
1632                                         };
1633                                 };
1634                         };
1635                 };
1636
1637                 vin7: video@e6ef7000 {
1638                         compatible = "renesas,vin-r8a774a1";
1639                         reg = <0 0xe6ef7000 0 0x1000>;
1640                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1641                         clocks = <&cpg CPG_MOD 804>;
1642                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1643                         resets = <&cpg 804>;
1644                         renesas,id = <7>;
1645                         status = "disabled";
1646
1647                         ports {
1648                                 #address-cells = <1>;
1649                                 #size-cells = <0>;
1650
1651                                 port@1 {
1652                                         #address-cells = <1>;
1653                                         #size-cells = <0>;
1654
1655                                         reg = <1>;
1656
1657                                         vin7csi20: endpoint@0 {
1658                                                 reg = <0>;
1659                                                 remote-endpoint = <&csi20vin7>;
1660                                         };
1661                                         vin7csi40: endpoint@2 {
1662                                                 reg = <2>;
1663                                                 remote-endpoint = <&csi40vin7>;
1664                                         };
1665                                 };
1666                         };
1667                 };
1668
1669                 rcar_sound: sound@ec500000 {
1670                         /*
1671                          * #sound-dai-cells is required
1672                          *
1673                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1674                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1675                          */
1676                         /*
1677                          * #clock-cells is required for audio_clkout0/1/2/3
1678                          *
1679                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1680                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1681                          */
1682                         compatible =  "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
1683                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1684                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1685                                 <0 0xec540000 0 0x1000>, /* SSIU */
1686                                 <0 0xec541000 0 0x280>,  /* SSI */
1687                                 <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1688                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1689
1690                         clocks = <&cpg CPG_MOD 1005>,
1691                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1692                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1693                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1694                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1695                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1696                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1697                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1698                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1699                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1700                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1701                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1702                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1703                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1704                                  <&audio_clk_a>, <&audio_clk_b>,
1705                                  <&audio_clk_c>,
1706                                  <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
1707                         clock-names = "ssi-all",
1708                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1709                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1710                                       "ssi.1", "ssi.0",
1711                                       "src.9", "src.8", "src.7", "src.6",
1712                                       "src.5", "src.4", "src.3", "src.2",
1713                                       "src.1", "src.0",
1714                                       "mix.1", "mix.0",
1715                                       "ctu.1", "ctu.0",
1716                                       "dvc.0", "dvc.1",
1717                                       "clk_a", "clk_b", "clk_c", "clk_i";
1718                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1719                         resets = <&cpg 1005>,
1720                                  <&cpg 1006>, <&cpg 1007>,
1721                                  <&cpg 1008>, <&cpg 1009>,
1722                                  <&cpg 1010>, <&cpg 1011>,
1723                                  <&cpg 1012>, <&cpg 1013>,
1724                                  <&cpg 1014>, <&cpg 1015>;
1725                         reset-names = "ssi-all",
1726                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1727                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1728                                       "ssi.1", "ssi.0";
1729                         status = "disabled";
1730
1731                         rcar_sound,ctu {
1732                                 ctu00: ctu-0 { };
1733                                 ctu01: ctu-1 { };
1734                                 ctu02: ctu-2 { };
1735                                 ctu03: ctu-3 { };
1736                                 ctu10: ctu-4 { };
1737                                 ctu11: ctu-5 { };
1738                                 ctu12: ctu-6 { };
1739                                 ctu13: ctu-7 { };
1740                         };
1741
1742                         rcar_sound,dvc {
1743                                 dvc0: dvc-0 {
1744                                         dmas = <&audma1 0xbc>;
1745                                         dma-names = "tx";
1746                                 };
1747                                 dvc1: dvc-1 {
1748                                         dmas = <&audma1 0xbe>;
1749                                         dma-names = "tx";
1750                                 };
1751                         };
1752
1753                         rcar_sound,mix {
1754                                 mix0: mix-0 { };
1755                                 mix1: mix-1 { };
1756                         };
1757
1758                         rcar_sound,src {
1759                                 src0: src-0 {
1760                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1761                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1762                                         dma-names = "rx", "tx";
1763                                 };
1764                                 src1: src-1 {
1765                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1766                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1767                                         dma-names = "rx", "tx";
1768                                 };
1769                                 src2: src-2 {
1770                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1771                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1772                                         dma-names = "rx", "tx";
1773                                 };
1774                                 src3: src-3 {
1775                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1776                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1777                                         dma-names = "rx", "tx";
1778                                 };
1779                                 src4: src-4 {
1780                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1781                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1782                                         dma-names = "rx", "tx";
1783                                 };
1784                                 src5: src-5 {
1785                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1786                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1787                                         dma-names = "rx", "tx";
1788                                 };
1789                                 src6: src-6 {
1790                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1791                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1792                                         dma-names = "rx", "tx";
1793                                 };
1794                                 src7: src-7 {
1795                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1796                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1797                                         dma-names = "rx", "tx";
1798                                 };
1799                                 src8: src-8 {
1800                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1801                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1802                                         dma-names = "rx", "tx";
1803                                 };
1804                                 src9: src-9 {
1805                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1806                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1807                                         dma-names = "rx", "tx";
1808                                 };
1809                         };
1810
1811                         rcar_sound,ssi {
1812                                 ssi0: ssi-0 {
1813                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1814                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
1815                                         dma-names = "rx", "tx";
1816                                 };
1817                                 ssi1: ssi-1 {
1818                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1819                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
1820                                         dma-names = "rx", "tx";
1821                                 };
1822                                 ssi2: ssi-2 {
1823                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1824                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
1825                                         dma-names = "rx", "tx";
1826                                 };
1827                                 ssi3: ssi-3 {
1828                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1829                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
1830                                         dma-names = "rx", "tx";
1831                                 };
1832                                 ssi4: ssi-4 {
1833                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1834                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
1835                                         dma-names = "rx", "tx";
1836                                 };
1837                                 ssi5: ssi-5 {
1838                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1839                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1840                                         dma-names = "rx", "tx";
1841                                 };
1842                                 ssi6: ssi-6 {
1843                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1844                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1845                                         dma-names = "rx", "tx";
1846                                 };
1847                                 ssi7: ssi-7 {
1848                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1849                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
1850                                         dma-names = "rx", "tx";
1851                                 };
1852                                 ssi8: ssi-8 {
1853                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1854                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
1855                                         dma-names = "rx", "tx";
1856                                 };
1857                                 ssi9: ssi-9 {
1858                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1859                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
1860                                         dma-names = "rx", "tx";
1861                                 };
1862                         };
1863
1864                         rcar_sound,ssiu {
1865                                 ssiu00: ssiu-0 {
1866                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
1867                                         dma-names = "rx", "tx";
1868                                 };
1869                                 ssiu01: ssiu-1 {
1870                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
1871                                         dma-names = "rx", "tx";
1872                                 };
1873                                 ssiu02: ssiu-2 {
1874                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
1875                                         dma-names = "rx", "tx";
1876                                 };
1877                                 ssiu03: ssiu-3 {
1878                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
1879                                         dma-names = "rx", "tx";
1880                                 };
1881                                 ssiu04: ssiu-4 {
1882                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
1883                                         dma-names = "rx", "tx";
1884                                 };
1885                                 ssiu05: ssiu-5 {
1886                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
1887                                         dma-names = "rx", "tx";
1888                                 };
1889                                 ssiu06: ssiu-6 {
1890                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
1891                                         dma-names = "rx", "tx";
1892                                 };
1893                                 ssiu07: ssiu-7 {
1894                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
1895                                         dma-names = "rx", "tx";
1896                                 };
1897                                 ssiu10: ssiu-8 {
1898                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
1899                                         dma-names = "rx", "tx";
1900                                 };
1901                                 ssiu11: ssiu-9 {
1902                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1903                                         dma-names = "rx", "tx";
1904                                 };
1905                                 ssiu12: ssiu-10 {
1906                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
1907                                         dma-names = "rx", "tx";
1908                                 };
1909                                 ssiu13: ssiu-11 {
1910                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
1911                                         dma-names = "rx", "tx";
1912                                 };
1913                                 ssiu14: ssiu-12 {
1914                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
1915                                         dma-names = "rx", "tx";
1916                                 };
1917                                 ssiu15: ssiu-13 {
1918                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1919                                         dma-names = "rx", "tx";
1920                                 };
1921                                 ssiu16: ssiu-14 {
1922                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1923                                         dma-names = "rx", "tx";
1924                                 };
1925                                 ssiu17: ssiu-15 {
1926                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1927                                         dma-names = "rx", "tx";
1928                                 };
1929                                 ssiu20: ssiu-16 {
1930                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
1931                                         dma-names = "rx", "tx";
1932                                 };
1933                                 ssiu21: ssiu-17 {
1934                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
1935                                         dma-names = "rx", "tx";
1936                                 };
1937                                 ssiu22: ssiu-18 {
1938                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1939                                         dma-names = "rx", "tx";
1940                                 };
1941                                 ssiu23: ssiu-19 {
1942                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1943                                         dma-names = "rx", "tx";
1944                                 };
1945                                 ssiu24: ssiu-20 {
1946                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1947                                         dma-names = "rx", "tx";
1948                                 };
1949                                 ssiu25: ssiu-21 {
1950                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1951                                         dma-names = "rx", "tx";
1952                                 };
1953                                 ssiu26: ssiu-22 {
1954                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
1955                                         dma-names = "rx", "tx";
1956                                 };
1957                                 ssiu27: ssiu-23 {
1958                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1959                                         dma-names = "rx", "tx";
1960                                 };
1961                                 ssiu30: ssiu-24 {
1962                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
1963                                         dma-names = "rx", "tx";
1964                                 };
1965                                 ssiu31: ssiu-25 {
1966                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
1967                                         dma-names = "rx", "tx";
1968                                 };
1969                                 ssiu32: ssiu-26 {
1970                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
1971                                         dma-names = "rx", "tx";
1972                                 };
1973                                 ssiu33: ssiu-27 {
1974                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
1975                                         dma-names = "rx", "tx";
1976                                 };
1977                                 ssiu34: ssiu-28 {
1978                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
1979                                         dma-names = "rx", "tx";
1980                                 };
1981                                 ssiu35: ssiu-29 {
1982                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
1983                                         dma-names = "rx", "tx";
1984                                 };
1985                                 ssiu36: ssiu-30 {
1986                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1987                                         dma-names = "rx", "tx";
1988                                 };
1989                                 ssiu37: ssiu-31 {
1990                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1991                                         dma-names = "rx", "tx";
1992                                 };
1993                                 ssiu40: ssiu-32 {
1994                                         dmas =  <&audma0 0x71>, <&audma1 0x72>;
1995                                         dma-names = "rx", "tx";
1996                                 };
1997                                 ssiu41: ssiu-33 {
1998                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
1999                                         dma-names = "rx", "tx";
2000                                 };
2001                                 ssiu42: ssiu-34 {
2002                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2003                                         dma-names = "rx", "tx";
2004                                 };
2005                                 ssiu43: ssiu-35 {
2006                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2007                                         dma-names = "rx", "tx";
2008                                 };
2009                                 ssiu44: ssiu-36 {
2010                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2011                                         dma-names = "rx", "tx";
2012                                 };
2013                                 ssiu45: ssiu-37 {
2014                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2015                                         dma-names = "rx", "tx";
2016                                 };
2017                                 ssiu46: ssiu-38 {
2018                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2019                                         dma-names = "rx", "tx";
2020                                 };
2021                                 ssiu47: ssiu-39 {
2022                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2023                                         dma-names = "rx", "tx";
2024                                 };
2025                                 ssiu50: ssiu-40 {
2026                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2027                                         dma-names = "rx", "tx";
2028                                 };
2029                                 ssiu60: ssiu-41 {
2030                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2031                                         dma-names = "rx", "tx";
2032                                 };
2033                                 ssiu70: ssiu-42 {
2034                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2035                                         dma-names = "rx", "tx";
2036                                 };
2037                                 ssiu80: ssiu-43 {
2038                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2039                                         dma-names = "rx", "tx";
2040                                 };
2041                                 ssiu90: ssiu-44 {
2042                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2043                                         dma-names = "rx", "tx";
2044                                 };
2045                                 ssiu91: ssiu-45 {
2046                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2047                                         dma-names = "rx", "tx";
2048                                 };
2049                                 ssiu92: ssiu-46 {
2050                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2051                                         dma-names = "rx", "tx";
2052                                 };
2053                                 ssiu93: ssiu-47 {
2054                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2055                                         dma-names = "rx", "tx";
2056                                 };
2057                                 ssiu94: ssiu-48 {
2058                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2059                                         dma-names = "rx", "tx";
2060                                 };
2061                                 ssiu95: ssiu-49 {
2062                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2063                                         dma-names = "rx", "tx";
2064                                 };
2065                                 ssiu96: ssiu-50 {
2066                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2067                                         dma-names = "rx", "tx";
2068                                 };
2069                                 ssiu97: ssiu-51 {
2070                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2071                                         dma-names = "rx", "tx";
2072                                 };
2073                         };
2074                 };
2075
2076                 audma0: dma-controller@ec700000 {
2077                         compatible = "renesas,dmac-r8a774a1",
2078                                      "renesas,rcar-dmac";
2079                         reg = <0 0xec700000 0 0x10000>;
2080                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2081                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2082                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2083                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2084                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2085                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2086                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2087                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2088                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2089                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2090                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2091                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2092                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2093                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2094                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2095                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2096                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2097                         interrupt-names = "error",
2098                                         "ch0", "ch1", "ch2", "ch3",
2099                                         "ch4", "ch5", "ch6", "ch7",
2100                                         "ch8", "ch9", "ch10", "ch11",
2101                                         "ch12", "ch13", "ch14", "ch15";
2102                         clocks = <&cpg CPG_MOD 502>;
2103                         clock-names = "fck";
2104                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2105                         resets = <&cpg 502>;
2106                         #dma-cells = <1>;
2107                         dma-channels = <16>;
2108                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2109                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2110                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2111                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2112                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2113                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2114                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2115                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2116                 };
2117
2118                 audma1: dma-controller@ec720000 {
2119                         compatible = "renesas,dmac-r8a774a1",
2120                                      "renesas,rcar-dmac";
2121                         reg = <0 0xec720000 0 0x10000>;
2122                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2123                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2124                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2125                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2126                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2127                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2128                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2129                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2130                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2131                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2132                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2133                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2134                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2135                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2136                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2137                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2138                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2139                         interrupt-names = "error",
2140                                         "ch0", "ch1", "ch2", "ch3",
2141                                         "ch4", "ch5", "ch6", "ch7",
2142                                         "ch8", "ch9", "ch10", "ch11",
2143                                         "ch12", "ch13", "ch14", "ch15";
2144                         clocks = <&cpg CPG_MOD 501>;
2145                         clock-names = "fck";
2146                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2147                         resets = <&cpg 501>;
2148                         #dma-cells = <1>;
2149                         dma-channels = <16>;
2150                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2151                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2152                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2153                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2154                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2155                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2156                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2157                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2158                 };
2159
2160                 xhci0: usb@ee000000 {
2161                         compatible = "renesas,xhci-r8a774a1",
2162                                      "renesas,rcar-gen3-xhci";
2163                         reg = <0 0xee000000 0 0xc00>;
2164                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2165                         clocks = <&cpg CPG_MOD 328>;
2166                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2167                         resets = <&cpg 328>;
2168                         status = "disabled";
2169                 };
2170
2171                 usb3_peri0: usb@ee020000 {
2172                         compatible = "renesas,r8a774a1-usb3-peri",
2173                                      "renesas,rcar-gen3-usb3-peri";
2174                         reg = <0 0xee020000 0 0x400>;
2175                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2176                         clocks = <&cpg CPG_MOD 328>;
2177                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2178                         resets = <&cpg 328>;
2179                         status = "disabled";
2180                 };
2181
2182                 ohci0: usb@ee080000 {
2183                         compatible = "generic-ohci";
2184                         reg = <0 0xee080000 0 0x100>;
2185                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2186                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2187                         phys = <&usb2_phy0 1>;
2188                         phy-names = "usb";
2189                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2190                         resets = <&cpg 703>, <&cpg 704>;
2191                         status = "disabled";
2192                 };
2193
2194                 ohci1: usb@ee0a0000 {
2195                         compatible = "generic-ohci";
2196                         reg = <0 0xee0a0000 0 0x100>;
2197                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2198                         clocks = <&cpg CPG_MOD 702>;
2199                         phys = <&usb2_phy1 1>;
2200                         phy-names = "usb";
2201                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2202                         resets = <&cpg 702>;
2203                         status = "disabled";
2204                 };
2205
2206                 ehci0: usb@ee080100 {
2207                         compatible = "generic-ehci";
2208                         reg = <0 0xee080100 0 0x100>;
2209                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2210                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2211                         phys = <&usb2_phy0 2>;
2212                         phy-names = "usb";
2213                         companion = <&ohci0>;
2214                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2215                         resets = <&cpg 703>, <&cpg 704>;
2216                         status = "disabled";
2217                 };
2218
2219                 ehci1: usb@ee0a0100 {
2220                         compatible = "generic-ehci";
2221                         reg = <0 0xee0a0100 0 0x100>;
2222                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2223                         clocks = <&cpg CPG_MOD 702>;
2224                         phys = <&usb2_phy1 2>;
2225                         phy-names = "usb";
2226                         companion = <&ohci1>;
2227                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2228                         resets = <&cpg 702>;
2229                         status = "disabled";
2230                 };
2231
2232                 usb2_phy0: usb-phy@ee080200 {
2233                         compatible = "renesas,usb2-phy-r8a774a1",
2234                                      "renesas,rcar-gen3-usb2-phy";
2235                         reg = <0 0xee080200 0 0x700>;
2236                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2237                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2238                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2239                         resets = <&cpg 703>, <&cpg 704>;
2240                         #phy-cells = <1>;
2241                         status = "disabled";
2242                 };
2243
2244                 usb2_phy1: usb-phy@ee0a0200 {
2245                         compatible = "renesas,usb2-phy-r8a774a1",
2246                                      "renesas,rcar-gen3-usb2-phy";
2247                         reg = <0 0xee0a0200 0 0x700>;
2248                         clocks = <&cpg CPG_MOD 702>;
2249                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2250                         resets = <&cpg 702>;
2251                         #phy-cells = <1>;
2252                         status = "disabled";
2253                 };
2254
2255                 sdhi0: mmc@ee100000 {
2256                         compatible = "renesas,sdhi-r8a774a1",
2257                                      "renesas,rcar-gen3-sdhi";
2258                         reg = <0 0xee100000 0 0x2000>;
2259                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2260                         clocks = <&cpg CPG_MOD 314>;
2261                         max-frequency = <200000000>;
2262                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2263                         resets = <&cpg 314>;
2264                         status = "disabled";
2265                 };
2266
2267                 sdhi1: mmc@ee120000 {
2268                         compatible = "renesas,sdhi-r8a774a1",
2269                                      "renesas,rcar-gen3-sdhi";
2270                         reg = <0 0xee120000 0 0x2000>;
2271                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2272                         clocks = <&cpg CPG_MOD 313>;
2273                         max-frequency = <200000000>;
2274                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2275                         resets = <&cpg 313>;
2276                         status = "disabled";
2277                 };
2278
2279                 sdhi2: mmc@ee140000 {
2280                         compatible = "renesas,sdhi-r8a774a1",
2281                                      "renesas,rcar-gen3-sdhi";
2282                         reg = <0 0xee140000 0 0x2000>;
2283                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2284                         clocks = <&cpg CPG_MOD 312>;
2285                         max-frequency = <200000000>;
2286                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2287                         resets = <&cpg 312>;
2288                         status = "disabled";
2289                 };
2290
2291                 sdhi3: mmc@ee160000 {
2292                         compatible = "renesas,sdhi-r8a774a1",
2293                                      "renesas,rcar-gen3-sdhi";
2294                         reg = <0 0xee160000 0 0x2000>;
2295                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2296                         clocks = <&cpg CPG_MOD 311>;
2297                         max-frequency = <200000000>;
2298                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2299                         resets = <&cpg 311>;
2300                         status = "disabled";
2301                 };
2302
2303                 gic: interrupt-controller@f1010000 {
2304                         compatible = "arm,gic-400";
2305                         #interrupt-cells = <3>;
2306                         #address-cells = <0>;
2307                         interrupt-controller;
2308                         reg = <0x0 0xf1010000 0 0x1000>,
2309                               <0x0 0xf1020000 0 0x20000>,
2310                               <0x0 0xf1040000 0 0x20000>,
2311                               <0x0 0xf1060000 0 0x20000>;
2312                         interrupts = <GIC_PPI 9
2313                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2314                         clocks = <&cpg CPG_MOD 408>;
2315                         clock-names = "clk";
2316                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2317                         resets = <&cpg 408>;
2318                 };
2319
2320                 pciec0: pcie@fe000000 {
2321                         compatible = "renesas,pcie-r8a774a1",
2322                                      "renesas,pcie-rcar-gen3";
2323                         reg = <0 0xfe000000 0 0x80000>;
2324                         #address-cells = <3>;
2325                         #size-cells = <2>;
2326                         bus-range = <0x00 0xff>;
2327                         device_type = "pci";
2328                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2329                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2330                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2331                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2332                         /* Map all possible DDR as inbound ranges */
2333                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2334                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2335                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2336                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2337                         #interrupt-cells = <1>;
2338                         interrupt-map-mask = <0 0 0 0>;
2339                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2340                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2341                         clock-names = "pcie", "pcie_bus";
2342                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2343                         resets = <&cpg 319>;
2344                         status = "disabled";
2345                 };
2346
2347                 pciec1: pcie@ee800000 {
2348                         compatible = "renesas,pcie-r8a774a1",
2349                                      "renesas,pcie-rcar-gen3";
2350                         reg = <0 0xee800000 0 0x80000>;
2351                         #address-cells = <3>;
2352                         #size-cells = <2>;
2353                         bus-range = <0x00 0xff>;
2354                         device_type = "pci";
2355                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2356                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2357                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2358                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2359                         /* Map all possible DDR as inbound ranges */
2360                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2361                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2362                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2363                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2364                         #interrupt-cells = <1>;
2365                         interrupt-map-mask = <0 0 0 0>;
2366                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2367                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2368                         clock-names = "pcie", "pcie_bus";
2369                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2370                         resets = <&cpg 318>;
2371                         status = "disabled";
2372                 };
2373
2374                 fdp1@fe940000 {
2375                         compatible = "renesas,fdp1";
2376                         reg = <0 0xfe940000 0 0x2400>;
2377                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2378                         clocks = <&cpg CPG_MOD 119>;
2379                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2380                         resets = <&cpg 119>;
2381                         renesas,fcp = <&fcpf0>;
2382                 };
2383
2384                 fcpf0: fcp@fe950000 {
2385                         compatible = "renesas,fcpf";
2386                         reg = <0 0xfe950000 0 0x200>;
2387                         clocks = <&cpg CPG_MOD 615>;
2388                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2389                         resets = <&cpg 615>;
2390                 };
2391
2392                 fcpvb0: fcp@fe96f000 {
2393                         compatible = "renesas,fcpv";
2394                         reg = <0 0xfe96f000 0 0x200>;
2395                         clocks = <&cpg CPG_MOD 607>;
2396                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2397                         resets = <&cpg 607>;
2398                 };
2399
2400                 fcpvd0: fcp@fea27000 {
2401                         compatible = "renesas,fcpv";
2402                         reg = <0 0xfea27000 0 0x200>;
2403                         clocks = <&cpg CPG_MOD 603>;
2404                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2405                         resets = <&cpg 603>;
2406                         iommus = <&ipmmu_vi0 8>;
2407                 };
2408
2409                 fcpvd1: fcp@fea2f000 {
2410                         compatible = "renesas,fcpv";
2411                         reg = <0 0xfea2f000 0 0x200>;
2412                         clocks = <&cpg CPG_MOD 602>;
2413                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2414                         resets = <&cpg 602>;
2415                         iommus = <&ipmmu_vi0 9>;
2416                 };
2417
2418                 fcpvd2: fcp@fea37000 {
2419                         compatible = "renesas,fcpv";
2420                         reg = <0 0xfea37000 0 0x200>;
2421                         clocks = <&cpg CPG_MOD 601>;
2422                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2423                         resets = <&cpg 601>;
2424                         iommus = <&ipmmu_vi0 10>;
2425                 };
2426
2427                 fcpvi0: fcp@fe9af000 {
2428                         compatible = "renesas,fcpv";
2429                         reg = <0 0xfe9af000 0 0x200>;
2430                         clocks = <&cpg CPG_MOD 611>;
2431                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2432                         resets = <&cpg 611>;
2433                         iommus = <&ipmmu_vc0 19>;
2434                 };
2435
2436                 vspb: vsp@fe960000 {
2437                         compatible = "renesas,vsp2";
2438                         reg = <0 0xfe960000 0 0x8000>;
2439                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2440                         clocks = <&cpg CPG_MOD 626>;
2441                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2442                         resets = <&cpg 626>;
2443
2444                         renesas,fcp = <&fcpvb0>;
2445                 };
2446
2447                 vspd0: vsp@fea20000 {
2448                         compatible = "renesas,vsp2";
2449                         reg = <0 0xfea20000 0 0x5000>;
2450                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2451                         clocks = <&cpg CPG_MOD 623>;
2452                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2453                         resets = <&cpg 623>;
2454
2455                         renesas,fcp = <&fcpvd0>;
2456                 };
2457
2458                 vspd1: vsp@fea28000 {
2459                         compatible = "renesas,vsp2";
2460                         reg = <0 0xfea28000 0 0x5000>;
2461                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2462                         clocks = <&cpg CPG_MOD 622>;
2463                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2464                         resets = <&cpg 622>;
2465
2466                         renesas,fcp = <&fcpvd1>;
2467                 };
2468
2469                 vspd2: vsp@fea30000 {
2470                         compatible = "renesas,vsp2";
2471                         reg = <0 0xfea30000 0 0x5000>;
2472                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2473                         clocks = <&cpg CPG_MOD 621>;
2474                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2475                         resets = <&cpg 621>;
2476
2477                         renesas,fcp = <&fcpvd2>;
2478                 };
2479
2480                 vspi0: vsp@fe9a0000 {
2481                         compatible = "renesas,vsp2";
2482                         reg = <0 0xfe9a0000 0 0x8000>;
2483                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2484                         clocks = <&cpg CPG_MOD 631>;
2485                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2486                         resets = <&cpg 631>;
2487
2488                         renesas,fcp = <&fcpvi0>;
2489                 };
2490
2491                 csi20: csi2@fea80000 {
2492                         compatible = "renesas,r8a774a1-csi2";
2493                         reg = <0 0xfea80000 0 0x10000>;
2494                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2495                         clocks = <&cpg CPG_MOD 714>;
2496                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2497                         resets = <&cpg 714>;
2498                         status = "disabled";
2499
2500                         ports {
2501                                 #address-cells = <1>;
2502                                 #size-cells = <0>;
2503
2504                                 port@1 {
2505                                         #address-cells = <1>;
2506                                         #size-cells = <0>;
2507
2508                                         reg = <1>;
2509
2510                                         csi20vin0: endpoint@0 {
2511                                                 reg = <0>;
2512                                                 remote-endpoint = <&vin0csi20>;
2513                                         };
2514                                         csi20vin1: endpoint@1 {
2515                                                 reg = <1>;
2516                                                 remote-endpoint = <&vin1csi20>;
2517                                         };
2518                                         csi20vin2: endpoint@2 {
2519                                                 reg = <2>;
2520                                                 remote-endpoint = <&vin2csi20>;
2521                                         };
2522                                         csi20vin3: endpoint@3 {
2523                                                 reg = <3>;
2524                                                 remote-endpoint = <&vin3csi20>;
2525                                         };
2526                                         csi20vin4: endpoint@4 {
2527                                                 reg = <4>;
2528                                                 remote-endpoint = <&vin4csi20>;
2529                                         };
2530                                         csi20vin5: endpoint@5 {
2531                                                 reg = <5>;
2532                                                 remote-endpoint = <&vin5csi20>;
2533                                         };
2534                                         csi20vin6: endpoint@6 {
2535                                                 reg = <6>;
2536                                                 remote-endpoint = <&vin6csi20>;
2537                                         };
2538                                         csi20vin7: endpoint@7 {
2539                                                 reg = <7>;
2540                                                 remote-endpoint = <&vin7csi20>;
2541                                         };
2542                                 };
2543                         };
2544                 };
2545
2546                 csi40: csi2@feaa0000 {
2547                         compatible = "renesas,r8a774a1-csi2";
2548                         reg = <0 0xfeaa0000 0 0x10000>;
2549                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2550                         clocks = <&cpg CPG_MOD 716>;
2551                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2552                         resets = <&cpg 716>;
2553                         status = "disabled";
2554
2555                         ports {
2556                                 #address-cells = <1>;
2557                                 #size-cells = <0>;
2558
2559                                 port@1 {
2560                                         #address-cells = <1>;
2561                                         #size-cells = <0>;
2562
2563                                         reg = <1>;
2564
2565                                         csi40vin0: endpoint@0 {
2566                                                 reg = <0>;
2567                                                 remote-endpoint = <&vin0csi40>;
2568                                         };
2569                                         csi40vin1: endpoint@1 {
2570                                                 reg = <1>;
2571                                                 remote-endpoint = <&vin1csi40>;
2572                                         };
2573                                         csi40vin2: endpoint@2 {
2574                                                 reg = <2>;
2575                                                 remote-endpoint = <&vin2csi40>;
2576                                         };
2577                                         csi40vin3: endpoint@3 {
2578                                                 reg = <3>;
2579                                                 remote-endpoint = <&vin3csi40>;
2580                                         };
2581                                         csi40vin4: endpoint@4 {
2582                                                 reg = <4>;
2583                                                 remote-endpoint = <&vin4csi40>;
2584                                         };
2585                                         csi40vin5: endpoint@5 {
2586                                                 reg = <5>;
2587                                                 remote-endpoint = <&vin5csi40>;
2588                                         };
2589                                         csi40vin6: endpoint@6 {
2590                                                 reg = <6>;
2591                                                 remote-endpoint = <&vin6csi40>;
2592                                         };
2593                                         csi40vin7: endpoint@7 {
2594                                                 reg = <7>;
2595                                                 remote-endpoint = <&vin7csi40>;
2596                                         };
2597                                 };
2598
2599                         };
2600                 };
2601
2602                 hdmi0: hdmi@fead0000 {
2603                         compatible = "renesas,r8a774a1-hdmi",
2604                                      "renesas,rcar-gen3-hdmi";
2605                         reg = <0 0xfead0000 0 0x10000>;
2606                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2607                         clocks = <&cpg CPG_MOD 729>,
2608                                  <&cpg CPG_CORE R8A774A1_CLK_HDMI>;
2609                         clock-names = "iahb", "isfr";
2610                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2611                         resets = <&cpg 729>;
2612                         status = "disabled";
2613
2614                         ports {
2615                                 #address-cells = <1>;
2616                                 #size-cells = <0>;
2617                                 port@0 {
2618                                         reg = <0>;
2619                                         dw_hdmi0_in: endpoint {
2620                                                 remote-endpoint = <&du_out_hdmi0>;
2621                                         };
2622                                 };
2623                                 port@1 {
2624                                         reg = <1>;
2625                                 };
2626                                 port@2 {
2627                                         /* HDMI sound */
2628                                         reg = <2>;
2629                                 };
2630                         };
2631                 };
2632
2633                 du: display@feb00000 {
2634                         compatible = "renesas,du-r8a774a1";
2635                         reg = <0 0xfeb00000 0 0x70000>;
2636                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2637                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2638                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2639                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2640                                  <&cpg CPG_MOD 722>;
2641                         clock-names = "du.0", "du.1", "du.2";
2642                         resets = <&cpg 724>, <&cpg 722>;
2643                         reset-names = "du.0", "du.2";
2644                         status = "disabled";
2645
2646                         renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2647
2648                         ports {
2649                                 #address-cells = <1>;
2650                                 #size-cells = <0>;
2651
2652                                 port@0 {
2653                                         reg = <0>;
2654                                         du_out_rgb: endpoint {
2655                                         };
2656                                 };
2657                                 port@1 {
2658                                         reg = <1>;
2659                                         du_out_hdmi0: endpoint {
2660                                                 remote-endpoint = <&dw_hdmi0_in>;
2661                                         };
2662                                 };
2663                                 port@2 {
2664                                         reg = <2>;
2665                                         du_out_lvds0: endpoint {
2666                                                 remote-endpoint = <&lvds0_in>;
2667                                         };
2668                                 };
2669                         };
2670                 };
2671
2672                 lvds0: lvds@feb90000 {
2673                         compatible = "renesas,r8a774a1-lvds";
2674                         reg = <0 0xfeb90000 0 0x14>;
2675                         clocks = <&cpg CPG_MOD 727>;
2676                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2677                         resets = <&cpg 727>;
2678                         status = "disabled";
2679
2680                         ports {
2681                                 #address-cells = <1>;
2682                                 #size-cells = <0>;
2683
2684                                 port@0 {
2685                                         reg = <0>;
2686                                         lvds0_in: endpoint {
2687                                                 remote-endpoint = <&du_out_lvds0>;
2688                                         };
2689                                 };
2690                                 port@1 {
2691                                         reg = <1>;
2692                                         lvds0_out: endpoint {
2693                                         };
2694                                 };
2695                         };
2696                 };
2697
2698                 prr: chipid@fff00044 {
2699                         compatible = "renesas,prr";
2700                         reg = <0 0xfff00044 0 4>;
2701                 };
2702         };
2703
2704         thermal-zones {
2705                 sensor_thermal1: sensor-thermal1 {
2706                         polling-delay-passive = <250>;
2707                         polling-delay = <1000>;
2708                         thermal-sensors = <&tsc 0>;
2709                         sustainable-power = <3874>;
2710
2711                         trips {
2712                                 sensor1_crit: sensor1-crit {
2713                                         temperature = <120000>;
2714                                         hysteresis = <1000>;
2715                                         type = "critical";
2716                                 };
2717                         };
2718                 };
2719
2720                 sensor_thermal2: sensor-thermal2 {
2721                         polling-delay-passive = <250>;
2722                         polling-delay = <1000>;
2723                         thermal-sensors = <&tsc 1>;
2724                         sustainable-power = <3874>;
2725
2726                         trips {
2727                                 sensor2_crit: sensor2-crit {
2728                                         temperature = <120000>;
2729                                         hysteresis = <1000>;
2730                                         type = "critical";
2731                                 };
2732                         };
2733                 };
2734
2735                 sensor_thermal3: sensor-thermal3 {
2736                         polling-delay-passive = <250>;
2737                         polling-delay = <1000>;
2738                         thermal-sensors = <&tsc 2>;
2739                         sustainable-power = <3874>;
2740
2741                         cooling-maps {
2742                                 map0 {
2743                                         trip = <&target>;
2744                                         cooling-device = <&a57_0 0 2>;
2745                                         contribution = <1024>;
2746                                 };
2747                                 map1 {
2748                                         trip = <&target>;
2749                                         cooling-device = <&a53_0 0 2>;
2750                                         contribution = <1024>;
2751                                 };
2752                         };
2753                         trips {
2754                                 target: trip-point1 {
2755                                         temperature = <100000>;
2756                                         hysteresis = <1000>;
2757                                         type = "passive";
2758                                 };
2759
2760                                 sensor3_crit: sensor3-crit {
2761                                         temperature = <120000>;
2762                                         hysteresis = <1000>;
2763                                         type = "critical";
2764                                 };
2765                         };
2766                 };
2767         };
2768
2769         timer {
2770                 compatible = "arm,armv8-timer";
2771                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2772                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2773                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2774                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2775         };
2776
2777         /* External USB clocks - can be overridden by the board */
2778         usb3s0_clk: usb3s0 {
2779                 compatible = "fixed-clock";
2780                 #clock-cells = <0>;
2781                 clock-frequency = <0>;
2782         };
2783
2784         usb_extal_clk: usb_extal {
2785                 compatible = "fixed-clock";
2786                 #clock-cells = <0>;
2787                 clock-frequency = <0>;
2788         };
2789 };