ARM: dts: Fix node status to "okay" on TI boards
[platform/kernel/u-boot.git] / arch / arm / dts / omap3-igep0020-common.dtsi
1 /*
2  * Common Device Tree Source for IGEPv2
3  *
4  * Copyright (C) 2014 Javier Martinez Canillas <javier@osg.samsung.com>
5  * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include "omap3-igep.dtsi"
13 #include "omap-gpmc-smsc9221.dtsi"
14
15 / {
16
17         leds {
18                 pinctrl-names = "default";
19                 pinctrl-0 = <&leds_pins>;
20                 compatible = "gpio-leds";
21
22                 boot {
23                          label = "omap3:green:boot";
24                          gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
25                          default-state = "on";
26                 };
27
28                 user0 {
29                          label = "omap3:red:user0";
30                          gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
31                          default-state = "off";
32                 };
33
34                 user1 {
35                          label = "omap3:red:user1";
36                          gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
37                          default-state = "off";
38                 };
39
40                 user2 {
41                         label = "omap3:green:user1";
42                         gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;
43                 };
44         };
45
46         /* HS USB Port 1 Power */
47         hsusb1_power: hsusb1_power_reg {
48                 compatible = "regulator-fixed";
49                 regulator-name = "hsusb1_vbus";
50                 regulator-min-microvolt = <3300000>;
51                 regulator-max-microvolt = <3300000>;
52                 gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>;  /* GPIO LEDA */
53                 startup-delay-us = <70000>;
54         };
55
56         /* HS USB Host PHY on PORT 1 */
57         hsusb1_phy: hsusb1_phy {
58                 compatible = "usb-nop-xceiv";
59                 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
60                 vcc-supply = <&hsusb1_power>;
61                 #phy-cells = <0>;
62         };
63
64         tfp410: encoder {
65                 compatible = "ti,tfp410";
66                 powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
67
68                 ports {
69                         #address-cells = <1>;
70                         #size-cells = <0>;
71
72                         port@0 {
73                                 reg = <0>;
74
75                                 tfp410_in: endpoint {
76                                         remote-endpoint = <&dpi_out>;
77                                 };
78                         };
79
80                         port@1 {
81                                 reg = <1>;
82
83                                 tfp410_out: endpoint {
84                                         remote-endpoint = <&dvi_connector_in>;
85                                 };
86                         };
87                 };
88         };
89
90         dvi0: connector {
91                 compatible = "dvi-connector";
92                 label = "dvi";
93
94                 digital;
95
96                 ddc-i2c-bus = <&i2c3>;
97
98                 port {
99                         dvi_connector_in: endpoint {
100                                 remote-endpoint = <&tfp410_out>;
101                         };
102                 };
103         };
104 };
105
106 &omap3_pmx_core {
107         pinctrl-names = "default";
108         pinctrl-0 = <
109                 &tfp410_pins
110                 &dss_dpi_pins
111         >;
112
113         tfp410_pins: pinmux_tfp410_pins {
114                 pinctrl-single,pins = <
115                         OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4)   /* hdq_sio.gpio_170 */
116                 >;
117         };
118
119         dss_dpi_pins: pinmux_dss_dpi_pins {
120                 pinctrl-single,pins = <
121                         OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
122                         OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
123                         OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
124                         OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
125                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
126                         OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
127                         OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
128                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
129                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
130                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
131                         OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
132                         OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
133                         OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
134                         OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
135                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
136                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
137                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
138                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
139                         OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
140                         OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
141                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
142                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
143                         OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
144                         OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
145                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
146                         OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
147                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
148                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
149                 >;
150         };
151
152         uart2_pins: pinmux_uart2_pins {
153                 pinctrl-single,pins = <
154                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)        /* uart2_cts.uart2_cts */
155                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)       /* uart2_rts .uart2_rts*/
156                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)       /* uart2_tx.uart2_tx */
157                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)        /* uart2_rx.uart2_rx */
158                 >;
159         };
160
161         smsc9221_pins: pinmux_smsc9221_pins {
162                 pinctrl-single,pins = <
163                         OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4)        /* mcspi1_cs2.gpio_176 */
164                 >;
165         };
166 };
167
168 &omap3_pmx_core2 {
169         pinctrl-names = "default";
170         pinctrl-0 = <
171                 &hsusbb1_pins
172         >;
173
174         hsusbb1_pins: pinmux_hsusbb1_pins {
175                 pinctrl-single,pins = <
176                         OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3)            /* etk_ctl.hsusb1_clk */
177                         OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3)            /* etk_clk.hsusb1_stp */
178                         OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d8.hsusb1_dir */
179                         OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d9.hsusb1_nxt */
180                         OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d0.hsusb1_data0 */
181                         OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d1.hsusb1_data1 */
182                         OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d2.hsusb1_data2 */
183                         OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d3.hsusb1_data7 */
184                         OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d4.hsusb1_data4 */
185                         OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d5.hsusb1_data5 */
186                         OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d6.hsusb1_data6 */
187                         OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d7.hsusb1_data3 */
188                 >;
189         };
190
191         leds_pins: pinmux_leds_pins {
192                 pinctrl-single,pins = <
193                         OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
194                         OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
195                         OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
196                 >;
197         };
198
199         mmc1_wp_pins: pinmux_mmc1_cd_pins {
200                 pinctrl-single,pins = <
201                         OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT | MUX_MODE4)   /* etk_d15.gpio_29 */
202                 >;
203         };
204 };
205
206 &i2c3 {
207         clock-frequency = <100000>;
208
209         /*
210          * Display monitor features are burnt in the EEPROM
211          * as EDID data.
212          */
213         eeprom@50 {
214                 compatible = "ti,eeprom";
215                 reg = <0x50>;
216         };
217 };
218
219 &gpmc {
220         ranges = <0 0 0x30000000 0x01000000>,   /* CS0: 16MB for NAND */
221                  <5 0 0x2c000000 0x01000000>;   /* CS5: 16MB for ethernet */
222
223         ethernet@gpmc {
224                 pinctrl-names = "default";
225                 pinctrl-0 = <&smsc9221_pins>;
226                 reg = <5 0 0xff>;
227                 interrupt-parent = <&gpio6>;
228                 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
229         };
230 };
231
232 &uart2 {
233         pinctrl-names = "default";
234         pinctrl-0 = <&uart2_pins>;
235 };
236
237 &usbhshost {
238         port1-mode = "ehci-phy";
239 };
240
241 &usbhsehci {
242         phys = <&hsusb1_phy>;
243 };
244
245 &vpll2 {
246         /* Needed for DSS */
247         regulator-name = "vdds_dsi";
248 };
249
250 &dss {
251         status = "okay";
252
253         port {
254                 dpi_out: endpoint {
255                         remote-endpoint = <&tfp410_in>;
256                         data-lines = <24>;
257                 };
258         };
259 };
260
261 &mmc1 {
262         pinctrl-0 = <&mmc1_pins &mmc1_wp_pins>;
263         wp-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; /* gpio_29 */
264 };