arch/arm/dts/omap3-devkit8000.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Author: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
   4  */
   5 /dts-v1/;
   6
   7 #include "omap34xx.dtsi"
   8 / {
   9         model = "TimLL OMAP3 Devkit8000";
  10         compatible = "timll,omap3-devkit8000", "ti,omap3430", "ti,omap3";
  11
  12         aliases {
  13                 display1 = &dvi0;
  14                 display2 = &tv0;
  15         };
  16
  17         memory@80000000 {
  18                 device_type = "memory";
  19                 reg = <0x80000000 0x10000000>;  /* 256 MB */
  20         };
  21
  22         leds {
  23                 compatible = "gpio-leds";
  24
  25                 heartbeat {
  26                         label = "devkit8000::led1";
  27                         gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>;   /* 186 -> LED1 */
  28                         default-state = "on";
  29                         linux,default-trigger = "heartbeat";
  30                 };
  31
  32                 mmc {
  33                         label = "devkit8000::led2";
  34                         gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>;    /* 163 -> LED2 */
  35                         default-state = "on";
  36                         linux,default-trigger = "none";
  37                 };
  38
  39                 usr {
  40                         label = "devkit8000::led3";
  41                         gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;    /* 164 -> LED3 */
  42                         default-state = "on";
  43                         linux,default-trigger = "usr";
  44                 };
  45
  46                 pmu_stat {
  47                         label = "devkit8000::pmu_stat";
  48                         gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
  49                 };
  50         };
  51
  52         sound {
  53                 compatible = "ti,omap-twl4030";
  54                 ti,model = "devkit8000";
  55
  56                 ti,mcbsp = <&mcbsp2>;
  57                 ti,audio-routing =
  58                         "Ext Spk", "PREDRIVEL",
  59                         "Ext Spk", "PREDRIVER",
  60                         "MAINMIC", "Main Mic",
  61                         "Main Mic", "Mic Bias 1";
  62         };
  63
  64         tfp410: encoder0 {
  65                 compatible = "ti,tfp410";
  66                 powerdown-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
  67
  68                 ports {
  69                         #address-cells = <1>;
  70                         #size-cells = <0>;
  71
  72                         port@0 {
  73                                 reg = <0>;
  74
  75                                 tfp410_in: endpoint {
  76                                         remote-endpoint = <&dpi_dvi_out>;
  77                                 };
  78                         };
  79
  80                         port@1 {
  81                                 reg = <1>;
  82
  83                                 tfp410_out: endpoint {
  84                                         remote-endpoint = <&dvi_connector_in>;
  85                                 };
  86                         };
  87                 };
  88         };
  89
  90         dvi0: connector0 {
  91                 compatible = "dvi-connector";
  92                 label = "dvi";
  93
  94                 digital;
  95
  96                 ddc-i2c-bus = <&i2c2>;
  97
  98                 port {
  99                         dvi_connector_in: endpoint {
 100                                 remote-endpoint = <&tfp410_out>;
 101                         };
 102                 };
 103         };
 104
 105         tv0: connector1 {
 106                 compatible = "svideo-connector";
 107                 label = "tv";
 108
 109                 port {
 110                         tv_connector_in: endpoint {
 111                                 remote-endpoint = <&venc_out>;
 112                         };
 113                 };
 114         };
 115 };
 116
 117 &i2c1 {
 118         clock-frequency = <2600000>;
 119
 120         twl: twl@48 {
 121                 reg = <0x48>;
 122                 interrupts = <7>;       /* SYS_NIRQ cascaded to intc */
 123
 124                 twl_audio: audio {
 125                         compatible = "ti,twl4030-audio";
 126                         codec {
 127                         };
 128                 };
 129         };
 130 };
 131
 132 &i2c2 {
 133         clock-frequency = <400000>;
 134 };
 135
 136 &i2c3 {
 137         status = "disabled";
 138 };
 139
 140 #include "twl4030.dtsi"
 141 #include "twl4030_omap3.dtsi"
 142
 143 &mmc1 {
 144         vmmc-supply = <&vmmc1>;
 145         vqmmc-supply = <&vsim>;
 146         bus-width = <8>;
 147 };
 148
 149 &mmc2 {
 150         status = "disabled";
 151 };
 152
 153 &mmc3 {
 154         status = "disabled";
 155 };
 156
 157 &twl_gpio {
 158         ti,use-leds;
 159         /*
 160          * pulldowns:
 161          * BIT(1), BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
 162          * BIT(15), BIT(16), BIT(17)
 163          */
 164         ti,pulldowns = <0x03a1c6>;
 165 };
 166
 167 &wdt2 {
 168         status = "disabled";
 169 };
 170
 171 &mcbsp2 {
 172         status = "okay";
 173 };
 174
 175 &gpmc {
 176         ranges = <0 0 0x30000000 0x1000000      /* CS0: 16MB for NAND */
 177                   6 0 0x2c000000 0x1000000>;    /* CS6: 16MB for DM9000 */
 178
 179         nand@0,0 {
 180                 compatible = "ti,omap2-nand";
 181                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 182                 interrupt-parent = <&gpmc>;
 183                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 184                              <1 IRQ_TYPE_NONE>; /* termcount */
 185                 nand-bus-width = <16>;
 186                 gpmc,device-width = <2>;
 187                 ti,nand-ecc-opt = "sw";
 188
 189                 gpmc,sync-clk-ps = <0>;
 190                 gpmc,cs-on-ns = <0>;
 191                 gpmc,cs-rd-off-ns = <44>;
 192                 gpmc,cs-wr-off-ns = <44>;
 193                 gpmc,adv-on-ns = <6>;
 194                 gpmc,adv-rd-off-ns = <34>;
 195                 gpmc,adv-wr-off-ns = <44>;
 196                 gpmc,we-off-ns = <40>;
 197                 gpmc,oe-off-ns = <54>;
 198                 gpmc,access-ns = <64>;
 199                 gpmc,rd-cycle-ns = <82>;
 200                 gpmc,wr-cycle-ns = <82>;
 201                 gpmc,wr-access-ns = <40>;
 202                 gpmc,wr-data-mux-bus-ns = <0>;
 203
 204                 #address-cells = <1>;
 205                 #size-cells = <1>;
 206
 207                 x-loader@0 {
 208                         label = "X-Loader";
 209                         reg = <0 0x80000>;
 210                 };
 211
 212                 bootloaders@80000 {
 213                         label = "U-Boot";
 214                         reg = <0x80000 0x1e0000>;
 215                 };
 216
 217                 bootloaders_env@260000 {
 218                         label = "U-Boot Env";
 219                         reg = <0x260000 0x20000>;
 220                 };
 221
 222                 kernel@280000 {
 223                         label = "Kernel";
 224                         reg = <0x280000 0x400000>;
 225                 };
 226
 227                 filesystem@680000 {
 228                         label = "File System";
 229                         reg = <0x680000 0xf980000>;
 230                 };
 231         };
 232
 233         ethernet@6,0 {
 234                 compatible = "davicom,dm9000";
 235                 reg =  <6 0x000 2
 236                         6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */
 237                 bank-width = <2>;
 238                 interrupt-parent = <&gpio1>;
 239                 interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
 240                 davicom,no-eeprom;
 241
 242                 gpmc,mux-add-data = <0>;
 243                 gpmc,device-width = <1>;
 244                 gpmc,wait-pin = <0>;
 245                 gpmc,cycle2cycle-samecsen;
 246                 gpmc,cycle2cycle-diffcsen;
 247
 248                 gpmc,cs-on-ns = <6>;
 249                 gpmc,cs-rd-off-ns = <180>;
 250                 gpmc,cs-wr-off-ns = <180>;
 251                 gpmc,adv-on-ns = <0>;
 252                 gpmc,adv-rd-off-ns = <18>;
 253                 gpmc,adv-wr-off-ns = <48>;
 254                 gpmc,oe-on-ns = <54>;
 255                 gpmc,oe-off-ns = <168>;
 256                 gpmc,we-on-ns = <54>;
 257                 gpmc,we-off-ns = <168>;
 258                 gpmc,rd-cycle-ns = <186>;
 259                 gpmc,wr-cycle-ns = <186>;
 260                 gpmc,access-ns = <144>;
 261                 gpmc,page-burst-access-ns = <24>;
 262                 gpmc,bus-turnaround-ns = <90>;
 263                 gpmc,cycle2cycle-delay-ns = <90>;
 264                 gpmc,wait-monitoring-ns = <0>;
 265                 gpmc,clk-activation-ns = <0>;
 266                 gpmc,wr-data-mux-bus-ns = <0>;
 267                 gpmc,wr-access-ns = <0>;
 268         };
 269 };
 270
 271 &omap3_pmx_core {
 272         dss_dpi_pins: pinmux_dss_dpi_pins {
 273                 pinctrl-single,pins = <
 274                         OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)       /* dss_pclk.dss_pclk */
 275                         OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)       /* dss_hsync.dss_hsync */
 276                         OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)       /* dss_vsync.dss_vsync */
 277                         OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)       /* dss_acbias.dss_acbias */
 278                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)       /* dss_data0.dss_data0 */
 279                         OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)       /* dss_data1.dss_data1 */
 280                         OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)       /* dss_data2.dss_data2 */
 281                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)       /* dss_data3.dss_data3 */
 282                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)       /* dss_data4.dss_data4 */
 283                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)       /* dss_data5.dss_data5 */
 284                         OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)       /* dss_data6.dss_data6 */
 285                         OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)       /* dss_data7.dss_data7 */
 286                         OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)       /* dss_data8.dss_data8 */
 287                         OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)       /* dss_data9.dss_data9 */
 288                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)       /* dss_data10.dss_data10 */
 289                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)       /* dss_data11.dss_data11 */
 290                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)       /* dss_data12.dss_data12 */
 291                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)       /* dss_data13.dss_data13 */
 292                         OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)       /* dss_data14.dss_data14 */
 293                         OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)       /* dss_data15.dss_data15 */
 294                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)       /* dss_data16.dss_data16 */
 295                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)       /* dss_data17.dss_data17 */
 296                         OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)       /* dss_data18.dss_data18 */
 297                         OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)       /* dss_data19.dss_data19 */
 298                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)       /* dss_data20.dss_data20 */
 299                         OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)       /* dss_data21.dss_data21 */
 300                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)       /* dss_data22.dss_data22 */
 301                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)       /* dss_data23.dss_data23 */
 302                 >;
 303         };
 304 };
 305
 306 &vpll1 {
 307         /* Needed for DSS */
 308         regulator-name = "vdds_dsi";
 309
 310         regulator-min-microvolt = <1800000>;
 311         regulator-max-microvolt = <1800000>;
 312 };
 313
 314 &dss {
 315         status = "okay";
 316
 317         pinctrl-names = "default";
 318         pinctrl-0 = <&dss_dpi_pins>;
 319
 320         vdds_dsi-supply = <&vpll1>;
 321         vdda_dac-supply = <&vdac>;
 322
 323         port {
 324                 #address-cells = <1>;
 325                 #size-cells = <0>;
 326                 dpi_dvi_out: endpoint@0 {
 327                         reg = <0>;
 328                         remote-endpoint = <&tfp410_in>;
 329                         data-lines = <24>;
 330                 };
 331
 332                 endpoint@1 {
 333                         reg = <1>;
 334                 };
 335         };
 336 };
 337
 338 &venc {
 339         status = "okay";
 340
 341         vdda-supply = <&vdac>;
 342
 343         port {
 344                 venc_out: endpoint {
 345                         remote-endpoint = <&tv_connector_in>;
 346                         ti,channels = <2>;
 347                 };
 348         };
 349 };