arch/arm/dts/nuvoton-npcm7xx-u-boot.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         interrupt-parent = <&gic>;
   7
   8         wdt-reboot {
   9                 compatible = "wdt-reboot";
  10                 wdt = <&watchdog0>;
  11         };
  12
  13         ahb {
  14                 udc0:udc@f0830100 {
  15                         compatible = "nuvoton,npcm750-udc";
  16                         reg = <0xf0830100 0x200
  17                                0xfffd0000 0x800>;
  18                         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
  19                         resets = <&rstc NPCM7XX_RESET_IPSRST3 NPCM7XX_RESET_UDC0>;
  20                         status = "disabled";
  21                         clocks = <&clk NPCM7XX_CLK_SU>;
  22                         clock-names = "clk_usb_bridge";
  23                 };
  24
  25                 udc1:udc@f0831100 {
  26                         compatible = "nuvoton,npcm750-udc";
  27                         reg = <0xf0831100 0x200
  28                                0xfffd0800 0x800>;
  29                         interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
  30                         status = "disabled";
  31                         clocks = <&clk NPCM7XX_CLK_SU>;
  32                         clock-names = "clk_usb_bridge";
  33                 };
  34
  35                 udc2: udc@f0832100 {
  36                         compatible = "nuvoton,npcm750-udc";
  37                         reg = <0xf0832100 0x200
  38                                0xfffd1000 0x800>;
  39                         interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
  40                         status = "disabled";
  41                         clocks = <&clk NPCM7XX_CLK_SU>;
  42                         clock-names = "clk_usb_bridge";
  43                 };
  44
  45                 udc3: udc@f0833100 {
  46                         compatible = "nuvoton,npcm750-udc";
  47                         reg = <0xf0833100 0x200
  48                                0xfffd1800 0x800>;
  49                         interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
  50                         status = "disabled";
  51                         clocks = <&clk NPCM7XX_CLK_SU>;
  52                         clock-names = "clk_usb_bridge";
  53                 };
  54
  55                 udc4: udc@f0834100 {
  56                         compatible = "nuvoton,npcm750-udc";
  57                         reg = <0xf0834100 0x200
  58                                0xfffd2000 0x800>;
  59                         interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
  60                         status = "disabled";
  61                         clocks = <&clk NPCM7XX_CLK_SU>;
  62                         clock-names = "clk_usb_bridge";
  63                 };
  64
  65                 udc5: udc@f0835100 {
  66                         compatible = "nuvoton,npcm750-udc";
  67                         reg = <0xf0835100 0x200
  68                                0xfffd2800 0x800>;
  69                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
  70                         status = "disabled";
  71                         clocks = <&clk NPCM7XX_CLK_SU>;
  72                         clock-names = "clk_usb_bridge";
  73                 };
  74
  75                 udc6: udc@f0836100 {
  76                         compatible = "nuvoton,npcm750-udc";
  77                         reg = <0xf0836100 0x200
  78                                0xfffd3000 0x800>;
  79                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
  80                         status = "disabled";
  81                         clocks = <&clk NPCM7XX_CLK_SU>;
  82                         clock-names = "clk_usb_bridge";
  83                 };
  84
  85                 udc7: udc@f0837100 {
  86                         compatible = "nuvoton,npcm750-udc";
  87                         reg = <0xf0837100 0x200
  88                                0xfffd3800 0x800>;
  89                         interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
  90                         status = "disabled";
  91                         clocks = <&clk NPCM7XX_CLK_SU>;
  92                         clock-names = "clk_usb_bridge";
  93                 };
  94
  95                 udc8: udc@f0838100 {
  96                         compatible = "nuvoton,npcm750-udc";
  97                         reg = <0xf0838100 0x200
  98                                0xfffd4000 0x800>;
  99                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 100                         status = "disabled";
 101                         clocks = <&clk NPCM7XX_CLK_SU>;
 102                         clock-names = "clk_usb_bridge";
 103                 };
 104
 105                 udc9: udc@f0839100 {
 106                         compatible = "nuvoton,npcm750-udc";
 107                         reg = <0xf0839100 0x200
 108                                0xfffd4800 0x800>;
 109                         interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
 110                         status = "disabled";
 111                         clocks = <&clk NPCM7XX_CLK_SU>;
 112                         clock-names = "clk_usb_bridge";
 113                 };
 114
 115                 emc0: eth@f0825000 {
 116                         device_type = "network";
 117                         compatible = "nuvoton,npcm750-emc";
 118                         reg = <0xf0825000 0x1000>;
 119                         phy-mode = "rmii";
 120                         id = <0>;
 121                         syscon-gcr = <&gcr>;
 122                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 123                                         <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 124                         clocks = <&clk NPCM7XX_CLK_AHB>;
 125                         clock-names = "clk_emc";
 126                         resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_EMC1>;
 127                         pinctrl-names = "default";
 128                         pinctrl-0 = <&r1_pins
 129                                         &r1md_pins>;
 130                         status = "disabled";
 131                 };
 132
 133                 ohci1: ohci@f0807000 {
 134                         compatible = "nuvoton,npcm750-ohci";
 135                         reg = <0xf0807000 0x1000>;
 136                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 137                         resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_USB_HOST>;
 138                         status = "disabled";
 139                 };
 140
 141                 usbphy {
 142                         compatible = "simple-bus", "nuvoton,npcm750-usb-phy";
 143                         #address-cells = <1>;
 144                         #size-cells = <0>;
 145                         syscon = <&gcr>;
 146                         usbphy1: usbphy1 {
 147                                 compatible = "nuvoton,npcm750-usb-phy";
 148                                 #phy-cells = <1>;
 149                                 reg = <1>;
 150                                 resets = <&rstc NPCM7XX_RESET_IPSRST3 NPCM7XX_RESET_USB_PHY_1>;
 151                                 status = "disabled";
 152                         };
 153                         usbphy2: usbphy2 {
 154                                 compatible = "nuvoton,npcm750-usb-phy";
 155                                 #phy-cells = <1>;
 156                                 reg = <2>;
 157                                 resets =<&rstc NPCM7XX_RESET_IPSRST3 NPCM7XX_RESET_USB_PHY_2>;
 158                                 status = "disabled";
 159                         };
 160                 };
 161
 162                 sdhci0: sdhci0@f0842000 {
 163                         compatible = "nuvoton,npcm750-sdhci";
 164                         reg = <0xf0842000 0x200>;
 165                         index = <0x0>;
 166                         bus-width = <0x8>;
 167                         cap-mmc-highspeed;
 168                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 169                         clocks = <&clk NPCM7XX_CLK_SDHC>;
 170                         clock-frequency = <50000000>;
 171                         pinctrl-names = "default";
 172                         pinctrl-0 = <&mmc_pins
 173                                 &mmc8_pins>;
 174                         status = "disabled";
 175                 };
 176
 177                 sdhci1: sdhci1@f0840000 {
 178                         compatible = "nuvoton,npcm750-sdhci";
 179                         reg = <0xf0840000 0x2000>;
 180                         index = <0x1>;
 181                         bus-width = <0x4>;
 182                         cap-mmc-highspeed;
 183                         pinctrl-names = "default";
 184                         pinctrl-0 = <&sd1_pins>;
 185                         status = "disabled";
 186                 };
 187
 188                 aes: aes@f0858000 {
 189                         compatible = "nuvoton,npcm750-aes";
 190                         reg = <0xf0858000 0x1000>;
 191                         clocks = <&clk NPCM7XX_CLK_AHB>;
 192                         clock-names = "clk_ahb";
 193                         status = "disabled";
 194                 };
 195
 196                 sha: sha@f085a000 {
 197                         compatible = "nuvoton,npcm750-sha";
 198                         reg = <0xf085a000 0x1000>;
 199                         clocks = <&clk NPCM7XX_CLK_AHB>;
 200                         clock-names = "clk_ahb";
 201                         status = "disabled";
 202                 };
 203
 204                 //ehci1
 205                 usb@f0806000 {
 206                         resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_USB_HOST>;
 207                 };
 208
 209                 apb {
 210                         otp:otp@189000 {
 211                                 compatible = "nuvoton,npcm750-otp";
 212                                 reg = <0x189000 0x1000
 213                                            0x18a000 0x1000>;
 214                                 status = "disabled";
 215                                 clocks = <&clk NPCM7XX_CLK_APB4>;
 216                                 clock-names = "clk_apb4";
 217                         };
 218
 219                         rng@b000 {
 220                                 clocks = <&clk NPCM7XX_CLK_APB1>;
 221                         };
 222                         gpio_0: gpio0@10000 {
 223                                 compatible = "nuvoton,npcm-gpio";
 224                                 reg = <0x10000 0xB0>;
 225                                 #gpio-cells = <2>;
 226                                 gpio-controller;
 227                                 gpio-bank-name = "gpio0";
 228                         };
 229
 230                         gpio_1: gpio1@11000 {
 231                                 compatible = "nuvoton,npcm-gpio";
 232                                 reg = <0x11000 0xB0>;
 233                                 #gpio-cells = <2>;
 234                                 gpio-controller;
 235                                 gpio-bank-name = "gpio1";
 236                         };
 237
 238                         gpio_2: gpio2@12000 {
 239                                 compatible = "nuvoton,npcm-gpio";
 240                                 reg = <0x12000 0xB0>;
 241                                 #gpio-cells = <2>;
 242                                 gpio-controller;
 243                                 gpio-bank-name = "gpio2";
 244                         };
 245                         gpio_3: gpio3@13000 {
 246                                 compatible = "nuvoton,npcm-gpio";
 247                                 reg = <0x13000 0xB0>;
 248                                 #gpio-cells = <2>;
 249                                 gpio-controller;
 250                                 gpio-bank-name = "gpio3";
 251                         };
 252
 253                         gpio_4: gpio4@14000 {
 254                                 compatible = "nuvoton,npcm-gpio";
 255                                 reg = <0x14000 0xB0>;
 256                                 #gpio-cells = <2>;
 257                                 gpio-controller;
 258                                 gpio-bank-name = "gpio4";
 259                         };
 260
 261                         gpio_5: gpio5@15000 {
 262                                 compatible = "nuvoton,npcm-gpio";
 263                                 reg = <0x15000 0xB0>;
 264                                 #gpio-cells = <2>;
 265                                 gpio-controller;
 266                                 gpio-bank-name = "gpio5";
 267                         };
 268
 269                         gpio_6: gpio6@16000 {
 270                                 compatible = "nuvoton,npcm-gpio";
 271                                 reg = <0x16000 0xB0>;
 272                                 #gpio-cells = <2>;
 273                                 gpio-controller;
 274                                 gpio-bank-name = "gpio6";
 275                         };
 276                         gpio_7: gpio7@17000 {
 277                                 compatible = "nuvoton,npcm-gpio";
 278                                 reg = <0x17000 0xB0>;
 279                                 #gpio-cells = <2>;
 280                                 gpio-controller;
 281                                 gpio-bank-name = "gpio7";
 282                         };
 283
 284                 };
 285         };
 286 };
 287