2 * Copyright (C) 2018 MediaTek Inc.
3 * Author: Ryder Lee <ryder.lee@mediatek.com>
5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 #include "mt7623-u-boot.dtsi"
13 model = "UniElec U7623-02 eMMC";
14 compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
17 device_type = "memory";
18 reg = <0 0x80000000 0 0x20000000>;
26 reg_1p8v: regulator-1p8v {
27 compatible = "regulator-fixed";
28 regulator-name = "fixed-1.8V";
29 regulator-min-microvolt = <1800000>;
30 regulator-max-microvolt = <1800000>;
35 reg_3p3v: regulator-3p3v {
36 compatible = "regulator-fixed";
37 regulator-name = "fixed-3.3V";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
44 reg_5v: regulator-5v {
45 compatible = "regulator-fixed";
46 regulator-name = "fixed-5V";
47 regulator-min-microvolt = <5000000>;
48 regulator-max-microvolt = <5000000>;
54 compatible = "gpio-leds";
57 label = "u7623-01:green:led3";
58 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
59 default-state = "off";
63 label = "u7623-01:green:led4";
64 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
65 default-state = "off";
72 mediatek,gmac-id = <0>;
74 mediatek,switch = "mt7530";
84 pinctrl-names = "default";
85 pinctrl-0 = <&mmc0_pins_default>;
88 max-frequency = <50000000>;
90 vmmc-supply = <®_3p3v>;
91 vqmmc-supply = <®_1p8v>;
96 ephy_default: ephy_default {
99 groups = "mdc_mdio", "ephy";
103 pins = "G2_TXEN", "G2_TXD0", "G2_TXD1", "G2_TXD2",
104 "G2_TXD3", "G2_TXC", "G2_RXC", "G2_RXD0",
105 "G2_RXD1", "G2_RXD2", "G2_RXD3", "G2_RXDV",
107 drive-strength = <12>;
108 mediatek,tdsel = <5>;
112 mmc0_pins_default: mmc0default {
119 pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
120 "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
121 "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
137 pcie_default: pcie-default {
140 groups = "pcie0_0_perst", "pcie1_0_perst";
144 uart0_pins_a: uart0-default {
147 groups = "uart0_0_txd_rxd";
151 uart1_pins_a: uart1-default {
154 groups = "uart1_0_txd_rxd";
158 uart2_pins_a: uart2-default {
161 groups = "uart2_0_txd_rxd";
165 uart2_pins_b: uart2-alt {
168 groups = "uart2_1_txd_rxd";
174 pinctrl-names = "default";
175 pinctrl-0 = <&pcie_default>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&uart0_pins_a>;
202 pinctrl-names = "default";
203 pinctrl-0 = <&uart1_pins_a>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&uart2_pins_b>;