Merge tag 'u-boot-stm32-20210113' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
[platform/kernel/u-boot.git] / arch / arm / dts / meson-gxm.dtsi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Copyright (c) 2016 Endless Computers, Inc.
4  * Author: Carlo Caione <carlo@endlessm.com>
5  */
6
7 #include "meson-gxl.dtsi"
8
9 / {
10         compatible = "amlogic,meson-gxm";
11
12         cpus {
13                 cpu-map {
14                         cluster0 {
15                                 core0 {
16                                         cpu = <&cpu0>;
17                                 };
18                                 core1 {
19                                         cpu = <&cpu1>;
20                                 };
21                                 core2 {
22                                         cpu = <&cpu2>;
23                                 };
24                                 core3 {
25                                         cpu = <&cpu3>;
26                                 };
27                         };
28
29                         cluster1 {
30                                 core0 {
31                                         cpu = <&cpu4>;
32                                 };
33                                 core1 {
34                                         cpu = <&cpu5>;
35                                 };
36                                 core2 {
37                                         cpu = <&cpu6>;
38                                 };
39                                 core3 {
40                                         cpu = <&cpu7>;
41                                 };
42                         };
43                 };
44
45                 cpu4: cpu@100 {
46                         device_type = "cpu";
47                         compatible = "arm,cortex-a53";
48                         reg = <0x0 0x100>;
49                         enable-method = "psci";
50                         next-level-cache = <&l2>;
51                         clocks = <&scpi_dvfs 1>;
52                         #cooling-cells = <2>;
53                 };
54
55                 cpu5: cpu@101 {
56                         device_type = "cpu";
57                         compatible = "arm,cortex-a53";
58                         reg = <0x0 0x101>;
59                         enable-method = "psci";
60                         next-level-cache = <&l2>;
61                         clocks = <&scpi_dvfs 1>;
62                         #cooling-cells = <2>;
63                 };
64
65                 cpu6: cpu@102 {
66                         device_type = "cpu";
67                         compatible = "arm,cortex-a53";
68                         reg = <0x0 0x102>;
69                         enable-method = "psci";
70                         next-level-cache = <&l2>;
71                         clocks = <&scpi_dvfs 1>;
72                         #cooling-cells = <2>;
73                 };
74
75                 cpu7: cpu@103 {
76                         device_type = "cpu";
77                         compatible = "arm,cortex-a53";
78                         reg = <0x0 0x103>;
79                         enable-method = "psci";
80                         next-level-cache = <&l2>;
81                         clocks = <&scpi_dvfs 1>;
82                         #cooling-cells = <2>;
83                 };
84         };
85
86         gpu_opp_table: opp-table {
87                 compatible = "operating-points-v2";
88
89                 opp-125000000 {
90                         opp-hz = /bits/ 64 <125000000>;
91                         opp-microvolt = <950000>;
92                 };
93                 opp-250000000 {
94                         opp-hz = /bits/ 64 <250000000>;
95                         opp-microvolt = <950000>;
96                 };
97                 opp-285714285 {
98                         opp-hz = /bits/ 64 <285714285>;
99                         opp-microvolt = <950000>;
100                 };
101                 opp-400000000 {
102                         opp-hz = /bits/ 64 <400000000>;
103                         opp-microvolt = <950000>;
104                 };
105                 opp-500000000 {
106                         opp-hz = /bits/ 64 <500000000>;
107                         opp-microvolt = <950000>;
108                 };
109                 opp-666666666 {
110                         opp-hz = /bits/ 64 <666666666>;
111                         opp-microvolt = <950000>;
112                 };
113         };
114 };
115
116 &apb {
117         usb2_phy2: phy@78040 {
118                 compatible = "amlogic,meson-gxl-usb2-phy";
119                 #phy-cells = <0>;
120                 reg = <0x0 0x78040 0x0 0x20>;
121                 clocks = <&clkc CLKID_USB>;
122                 clock-names = "phy";
123                 resets = <&reset RESET_USB_OTG>;
124                 reset-names = "phy";
125                 status = "okay";
126         };
127
128         mali: gpu@c0000 {
129                 compatible = "amlogic,meson-gxm-mali", "arm,mali-t820";
130                 reg = <0x0 0xc0000 0x0 0x40000>;
131                 interrupt-parent = <&gic>;
132                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
133                              <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
134                              <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
135                 interrupt-names = "job", "mmu", "gpu";
136                 clocks = <&clkc CLKID_MALI>;
137                 resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>;
138                 operating-points-v2 = <&gpu_opp_table>;
139         };
140 };
141
142 &clkc_AO {
143         compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc";
144 };
145
146 &cpu_cooling_maps {
147         map0 {
148                 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
149                                  <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
150                                  <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
151                                  <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
152                                  <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
153                                  <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
154                                  <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
155                                  <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
156         };
157
158         map1 {
159                 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
160                                  <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
161                                  <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
162                                  <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
163                                  <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
164                                  <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
165                                  <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
166                                  <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
167         };
168 };
169
170 &saradc {
171         compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
172 };
173
174 &scpi_dvfs {
175         clock-indices = <0 1>;
176         clock-output-names = "vbig", "vlittle";
177 };
178
179 &vpu {
180         compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
181 };
182
183 &hdmi_tx {
184         compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
185 };
186
187 &usb {
188         compatible = "amlogic,meson-gxm-usb-ctrl";
189
190         phy-names = "usb2-phy0", "usb2-phy1", "usb2-phy2";
191         phys = <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>;
192 };
193
194 &vdec {
195         compatible = "amlogic,gxm-vdec", "amlogic,gx-vdec";
196 };