1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
25 simplefb_cvbs: framebuffer-cvbs {
26 compatible = "amlogic,simple-framebuffer",
28 amlogic,pipeline = "vpu-cvbs";
29 clocks = <&clkc CLKID_HDMI>,
30 <&clkc CLKID_HTX_PCLK>,
31 <&clkc CLKID_VPU_INTR>;
35 simplefb_hdmi: framebuffer-hdmi {
36 compatible = "amlogic,simple-framebuffer",
38 amlogic,pipeline = "vpu-hdmi";
39 clocks = <&clkc CLKID_HDMI>,
40 <&clkc CLKID_HTX_PCLK>,
41 <&clkc CLKID_VPU_INTR>;
47 compatible = "amlogic,meson-gxbb-efuse";
48 clocks = <&clkc CLKID_EFUSE>;
52 secure-monitor = <&sm>;
56 compatible = "arm,psci-1.0";
65 /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
66 secmon_reserved: secmon@5000000 {
67 reg = <0x0 0x05000000 0x0 0x300000>;
72 compatible = "shared-dma-pool";
74 size = <0x0 0x10000000>;
75 alignment = <0x0 0x400000>;
81 compatible = "amlogic,meson-gxbb-sm";
85 compatible = "simple-bus";
91 compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
92 reg = <0x0 0xfc000000 0x0 0x400000
93 0x0 0xff648000 0x0 0x2000
94 0x0 0xfc400000 0x0 0x200000>;
95 reg-names = "elbi", "cfg", "config";
96 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
97 #interrupt-cells = <1>;
98 interrupt-map-mask = <0 0 0 0>;
99 interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
100 bus-range = <0x0 0xff>;
101 #address-cells = <3>;
104 ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000
105 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
107 clocks = <&clkc CLKID_PCIE_PHY
108 &clkc CLKID_PCIE_COMB
109 &clkc CLKID_PCIE_PLL>;
110 clock-names = "general",
113 resets = <&reset RESET_PCIE_CTRL_A>,
114 <&reset RESET_PCIE_APB>;
115 reset-names = "port",
118 phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
124 cpu_thermal: cpu-thermal {
125 polling-delay = <1000>;
126 polling-delay-passive = <100>;
127 thermal-sensors = <&cpu_temp>;
130 cpu_passive: cpu-passive {
131 temperature = <85000>; /* millicelsius */
132 hysteresis = <2000>; /* millicelsius */
137 temperature = <95000>; /* millicelsius */
138 hysteresis = <2000>; /* millicelsius */
142 cpu_critical: cpu-critical {
143 temperature = <110000>; /* millicelsius */
144 hysteresis = <2000>; /* millicelsius */
150 ddr_thermal: ddr-thermal {
151 polling-delay = <1000>;
152 polling-delay-passive = <100>;
153 thermal-sensors = <&ddr_temp>;
156 ddr_passive: ddr-passive {
157 temperature = <85000>; /* millicelsius */
158 hysteresis = <2000>; /* millicelsius */
162 ddr_critical: ddr-critical {
163 temperature = <110000>; /* millicelsius */
164 hysteresis = <2000>; /* millicelsius */
171 trip = <&ddr_passive>;
172 cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
178 ethmac: ethernet@ff3f0000 {
179 compatible = "amlogic,meson-axg-dwmac",
182 reg = <0x0 0xff3f0000 0x0 0x10000>,
183 <0x0 0xff634540 0x0 0x8>;
184 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
185 interrupt-names = "macirq";
186 clocks = <&clkc CLKID_ETH>,
187 <&clkc CLKID_FCLK_DIV2>,
189 clock-names = "stmmaceth", "clkin0", "clkin1";
190 rx-fifo-depth = <4096>;
191 tx-fifo-depth = <2048>;
195 #address-cells = <1>;
197 compatible = "snps,dwmac-mdio";
202 compatible = "simple-bus";
203 reg = <0x0 0xff600000 0x0 0x200000>;
204 #address-cells = <2>;
206 ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
209 compatible = "amlogic,meson-g12a-dw-hdmi";
210 reg = <0x0 0x0 0x0 0x10000>;
211 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
212 resets = <&reset RESET_HDMITX_CAPB3>,
213 <&reset RESET_HDMITX_PHY>,
214 <&reset RESET_HDMITX>;
215 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
216 clocks = <&clkc CLKID_HDMI>,
217 <&clkc CLKID_HTX_PCLK>,
218 <&clkc CLKID_VPU_INTR>;
219 clock-names = "isfr", "iahb", "venci";
220 #address-cells = <1>;
222 #sound-dai-cells = <0>;
226 hdmi_tx_venc_port: port@0 {
229 hdmi_tx_in: endpoint {
230 remote-endpoint = <&hdmi_tx_out>;
235 hdmi_tx_tmds_port: port@1 {
240 apb_efuse: bus@30000 {
241 compatible = "simple-bus";
242 reg = <0x0 0x30000 0x0 0x2000>;
243 #address-cells = <2>;
245 ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
248 compatible = "amlogic,meson-rng";
249 reg = <0x0 0x218 0x0 0x4>;
253 acodec: audio-controller@32000 {
254 compatible = "amlogic,t9015";
255 reg = <0x0 0x32000 0x0 0x14>;
256 #sound-dai-cells = <0>;
257 sound-name-prefix = "ACODEC";
258 clocks = <&clkc CLKID_AUDIO_CODEC>;
259 clock-names = "pclk";
260 resets = <&reset RESET_AUDIO_CODEC>;
265 compatible = "simple-bus";
266 reg = <0x0 0x34400 0x0 0x400>;
267 #address-cells = <2>;
269 ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
271 periphs_pinctrl: pinctrl@40 {
272 compatible = "amlogic,meson-g12a-periphs-pinctrl";
273 #address-cells = <2>;
278 reg = <0x0 0x40 0x0 0x4c>,
280 <0x0 0x120 0x0 0x18>,
281 <0x0 0x2c0 0x0 0x40>,
282 <0x0 0x340 0x0 0x1c>;
290 gpio-ranges = <&periphs_pinctrl 0 0 86>;
293 cec_ao_a_h_pins: cec_ao_a_h {
295 groups = "cec_ao_a_h";
296 function = "cec_ao_a_h";
301 cec_ao_b_h_pins: cec_ao_b_h {
303 groups = "cec_ao_b_h";
304 function = "cec_ao_b_h";
309 emmc_ctrl_pins: emmc-ctrl {
314 drive-strength-microamp = <4000>;
321 drive-strength-microamp = <4000>;
325 emmc_data_4b_pins: emmc-data-4b {
327 groups = "emmc_nand_d0",
333 drive-strength-microamp = <4000>;
337 emmc_data_8b_pins: emmc-data-8b {
339 groups = "emmc_nand_d0",
349 drive-strength-microamp = <4000>;
353 emmc_ds_pins: emmc-ds {
355 groups = "emmc_nand_ds";
358 drive-strength-microamp = <4000>;
362 emmc_clk_gate_pins: emmc_clk_gate {
365 function = "gpio_periphs";
367 drive-strength-microamp = <4000>;
371 hdmitx_ddc_pins: hdmitx_ddc {
373 groups = "hdmitx_sda",
377 drive-strength-microamp = <4000>;
381 hdmitx_hpd_pins: hdmitx_hpd {
383 groups = "hdmitx_hpd_in";
390 i2c0_sda_c_pins: i2c0-sda-c {
392 groups = "i2c0_sda_c";
395 drive-strength-microamp = <3000>;
400 i2c0_sck_c_pins: i2c0-sck-c {
402 groups = "i2c0_sck_c";
405 drive-strength-microamp = <3000>;
409 i2c0_sda_z0_pins: i2c0-sda-z0 {
411 groups = "i2c0_sda_z0";
414 drive-strength-microamp = <3000>;
418 i2c0_sck_z1_pins: i2c0-sck-z1 {
420 groups = "i2c0_sck_z1";
423 drive-strength-microamp = <3000>;
427 i2c0_sda_z7_pins: i2c0-sda-z7 {
429 groups = "i2c0_sda_z7";
432 drive-strength-microamp = <3000>;
436 i2c0_sda_z8_pins: i2c0-sda-z8 {
438 groups = "i2c0_sda_z8";
441 drive-strength-microamp = <3000>;
445 i2c1_sda_x_pins: i2c1-sda-x {
447 groups = "i2c1_sda_x";
450 drive-strength-microamp = <3000>;
454 i2c1_sck_x_pins: i2c1-sck-x {
456 groups = "i2c1_sck_x";
459 drive-strength-microamp = <3000>;
463 i2c1_sda_h2_pins: i2c1-sda-h2 {
465 groups = "i2c1_sda_h2";
468 drive-strength-microamp = <3000>;
472 i2c1_sck_h3_pins: i2c1-sck-h3 {
474 groups = "i2c1_sck_h3";
477 drive-strength-microamp = <3000>;
481 i2c1_sda_h6_pins: i2c1-sda-h6 {
483 groups = "i2c1_sda_h6";
486 drive-strength-microamp = <3000>;
490 i2c1_sck_h7_pins: i2c1-sck-h7 {
492 groups = "i2c1_sck_h7";
495 drive-strength-microamp = <3000>;
499 i2c2_sda_x_pins: i2c2-sda-x {
501 groups = "i2c2_sda_x";
504 drive-strength-microamp = <3000>;
508 i2c2_sck_x_pins: i2c2-sck-x {
510 groups = "i2c2_sck_x";
513 drive-strength-microamp = <3000>;
517 i2c2_sda_z_pins: i2c2-sda-z {
519 groups = "i2c2_sda_z";
522 drive-strength-microamp = <3000>;
526 i2c2_sck_z_pins: i2c2-sck-z {
528 groups = "i2c2_sck_z";
531 drive-strength-microamp = <3000>;
535 i2c3_sda_h_pins: i2c3-sda-h {
537 groups = "i2c3_sda_h";
540 drive-strength-microamp = <3000>;
544 i2c3_sck_h_pins: i2c3-sck-h {
546 groups = "i2c3_sck_h";
549 drive-strength-microamp = <3000>;
553 i2c3_sda_a_pins: i2c3-sda-a {
555 groups = "i2c3_sda_a";
558 drive-strength-microamp = <3000>;
562 i2c3_sck_a_pins: i2c3-sck-a {
564 groups = "i2c3_sck_a";
567 drive-strength-microamp = <3000>;
571 mclk0_a_pins: mclk0-a {
576 drive-strength-microamp = <3000>;
580 mclk1_a_pins: mclk1-a {
585 drive-strength-microamp = <3000>;
589 mclk1_x_pins: mclk1-x {
594 drive-strength-microamp = <3000>;
598 mclk1_z_pins: mclk1-z {
603 drive-strength-microamp = <3000>;
618 pdm_din0_a_pins: pdm-din0-a {
620 groups = "pdm_din0_a";
626 pdm_din0_c_pins: pdm-din0-c {
628 groups = "pdm_din0_c";
634 pdm_din0_x_pins: pdm-din0-x {
636 groups = "pdm_din0_x";
642 pdm_din0_z_pins: pdm-din0-z {
644 groups = "pdm_din0_z";
650 pdm_din1_a_pins: pdm-din1-a {
652 groups = "pdm_din1_a";
658 pdm_din1_c_pins: pdm-din1-c {
660 groups = "pdm_din1_c";
666 pdm_din1_x_pins: pdm-din1-x {
668 groups = "pdm_din1_x";
674 pdm_din1_z_pins: pdm-din1-z {
676 groups = "pdm_din1_z";
682 pdm_din2_a_pins: pdm-din2-a {
684 groups = "pdm_din2_a";
690 pdm_din2_c_pins: pdm-din2-c {
692 groups = "pdm_din2_c";
698 pdm_din2_x_pins: pdm-din2-x {
700 groups = "pdm_din2_x";
706 pdm_din2_z_pins: pdm-din2-z {
708 groups = "pdm_din2_z";
714 pdm_din3_a_pins: pdm-din3-a {
716 groups = "pdm_din3_a";
722 pdm_din3_c_pins: pdm-din3-c {
724 groups = "pdm_din3_c";
730 pdm_din3_x_pins: pdm-din3-x {
732 groups = "pdm_din3_x";
738 pdm_din3_z_pins: pdm-din3-z {
740 groups = "pdm_din3_z";
746 pdm_dclk_a_pins: pdm-dclk-a {
748 groups = "pdm_dclk_a";
751 drive-strength-microamp = <500>;
755 pdm_dclk_c_pins: pdm-dclk-c {
757 groups = "pdm_dclk_c";
760 drive-strength-microamp = <500>;
764 pdm_dclk_x_pins: pdm-dclk-x {
766 groups = "pdm_dclk_x";
769 drive-strength-microamp = <500>;
773 pdm_dclk_z_pins: pdm-dclk-z {
775 groups = "pdm_dclk_z";
778 drive-strength-microamp = <500>;
790 pwm_b_x7_pins: pwm-b-x7 {
798 pwm_b_x19_pins: pwm-b-x19 {
800 groups = "pwm_b_x19";
806 pwm_c_c_pins: pwm-c-c {
814 pwm_c_x5_pins: pwm-c-x5 {
822 pwm_c_x8_pins: pwm-c-x8 {
830 pwm_d_x3_pins: pwm-d-x3 {
838 pwm_d_x6_pins: pwm-d-x6 {
854 pwm_f_x_pins: pwm-f-x {
862 pwm_f_h_pins: pwm-f-h {
870 sdcard_c_pins: sdcard_c {
872 groups = "sdcard_d0_c",
879 drive-strength-microamp = <4000>;
883 groups = "sdcard_clk_c";
886 drive-strength-microamp = <4000>;
890 sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
893 function = "gpio_periphs";
895 drive-strength-microamp = <4000>;
899 sdcard_z_pins: sdcard_z {
901 groups = "sdcard_d0_z",
908 drive-strength-microamp = <4000>;
912 groups = "sdcard_clk_z";
915 drive-strength-microamp = <4000>;
919 sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
922 function = "gpio_periphs";
924 drive-strength-microamp = <4000>;
938 drive-strength-microamp = <4000>;
942 sdio_clk_gate_pins: sdio_clk_gate {
945 function = "gpio_periphs";
947 drive-strength-microamp = <4000>;
951 spdif_in_a10_pins: spdif-in-a10 {
953 groups = "spdif_in_a10";
954 function = "spdif_in";
959 spdif_in_a12_pins: spdif-in-a12 {
961 groups = "spdif_in_a12";
962 function = "spdif_in";
967 spdif_in_h_pins: spdif-in-h {
969 groups = "spdif_in_h";
970 function = "spdif_in";
975 spdif_out_h_pins: spdif-out-h {
977 groups = "spdif_out_h";
978 function = "spdif_out";
979 drive-strength-microamp = <500>;
984 spdif_out_a11_pins: spdif-out-a11 {
986 groups = "spdif_out_a11";
987 function = "spdif_out";
988 drive-strength-microamp = <500>;
993 spdif_out_a13_pins: spdif-out-a13 {
995 groups = "spdif_out_a13";
996 function = "spdif_out";
997 drive-strength-microamp = <500>;
1002 spicc0_x_pins: spicc0-x {
1004 groups = "spi0_mosi_x",
1008 drive-strength-microamp = <4000>;
1013 spicc0_ss0_x_pins: spicc0-ss0-x {
1015 groups = "spi0_ss0_x";
1017 drive-strength-microamp = <4000>;
1022 spicc0_c_pins: spicc0-c {
1024 groups = "spi0_mosi_c",
1029 drive-strength-microamp = <4000>;
1034 spicc1_pins: spicc1 {
1036 groups = "spi1_mosi",
1040 drive-strength-microamp = <4000>;
1044 spicc1_ss0_pins: spicc1-ss0 {
1046 groups = "spi1_ss0";
1048 drive-strength-microamp = <4000>;
1053 tdm_a_din0_pins: tdm-a-din0 {
1055 groups = "tdm_a_din0";
1062 tdm_a_din1_pins: tdm-a-din1 {
1064 groups = "tdm_a_din1";
1070 tdm_a_dout0_pins: tdm-a-dout0 {
1072 groups = "tdm_a_dout0";
1075 drive-strength-microamp = <3000>;
1079 tdm_a_dout1_pins: tdm-a-dout1 {
1081 groups = "tdm_a_dout1";
1084 drive-strength-microamp = <3000>;
1088 tdm_a_fs_pins: tdm-a-fs {
1090 groups = "tdm_a_fs";
1093 drive-strength-microamp = <3000>;
1097 tdm_a_sclk_pins: tdm-a-sclk {
1099 groups = "tdm_a_sclk";
1102 drive-strength-microamp = <3000>;
1106 tdm_a_slv_fs_pins: tdm-a-slv-fs {
1108 groups = "tdm_a_slv_fs";
1115 tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
1117 groups = "tdm_a_slv_sclk";
1123 tdm_b_din0_pins: tdm-b-din0 {
1125 groups = "tdm_b_din0";
1131 tdm_b_din1_pins: tdm-b-din1 {
1133 groups = "tdm_b_din1";
1139 tdm_b_din2_pins: tdm-b-din2 {
1141 groups = "tdm_b_din2";
1147 tdm_b_din3_a_pins: tdm-b-din3-a {
1149 groups = "tdm_b_din3_a";
1155 tdm_b_din3_h_pins: tdm-b-din3-h {
1157 groups = "tdm_b_din3_h";
1163 tdm_b_dout0_pins: tdm-b-dout0 {
1165 groups = "tdm_b_dout0";
1168 drive-strength-microamp = <3000>;
1172 tdm_b_dout1_pins: tdm-b-dout1 {
1174 groups = "tdm_b_dout1";
1177 drive-strength-microamp = <3000>;
1181 tdm_b_dout2_pins: tdm-b-dout2 {
1183 groups = "tdm_b_dout2";
1186 drive-strength-microamp = <3000>;
1190 tdm_b_dout3_a_pins: tdm-b-dout3-a {
1192 groups = "tdm_b_dout3_a";
1195 drive-strength-microamp = <3000>;
1199 tdm_b_dout3_h_pins: tdm-b-dout3-h {
1201 groups = "tdm_b_dout3_h";
1204 drive-strength-microamp = <3000>;
1208 tdm_b_fs_pins: tdm-b-fs {
1210 groups = "tdm_b_fs";
1213 drive-strength-microamp = <3000>;
1217 tdm_b_sclk_pins: tdm-b-sclk {
1219 groups = "tdm_b_sclk";
1222 drive-strength-microamp = <3000>;
1226 tdm_b_slv_fs_pins: tdm-b-slv-fs {
1228 groups = "tdm_b_slv_fs";
1234 tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
1236 groups = "tdm_b_slv_sclk";
1242 tdm_c_din0_a_pins: tdm-c-din0-a {
1244 groups = "tdm_c_din0_a";
1250 tdm_c_din0_z_pins: tdm-c-din0-z {
1252 groups = "tdm_c_din0_z";
1258 tdm_c_din1_a_pins: tdm-c-din1-a {
1260 groups = "tdm_c_din1_a";
1266 tdm_c_din1_z_pins: tdm-c-din1-z {
1268 groups = "tdm_c_din1_z";
1274 tdm_c_din2_a_pins: tdm-c-din2-a {
1276 groups = "tdm_c_din2_a";
1282 eth_leds_pins: eth-leds {
1284 groups = "eth_link_led",
1293 groups = "eth_mdio",
1303 drive-strength-microamp = <4000>;
1308 eth_rgmii_pins: eth-rgmii {
1310 groups = "eth_rxd2_rgmii",
1316 drive-strength-microamp = <4000>;
1321 tdm_c_din2_z_pins: tdm-c-din2-z {
1323 groups = "tdm_c_din2_z";
1329 tdm_c_din3_a_pins: tdm-c-din3-a {
1331 groups = "tdm_c_din3_a";
1337 tdm_c_din3_z_pins: tdm-c-din3-z {
1339 groups = "tdm_c_din3_z";
1345 tdm_c_dout0_a_pins: tdm-c-dout0-a {
1347 groups = "tdm_c_dout0_a";
1350 drive-strength-microamp = <3000>;
1354 tdm_c_dout0_z_pins: tdm-c-dout0-z {
1356 groups = "tdm_c_dout0_z";
1359 drive-strength-microamp = <3000>;
1363 tdm_c_dout1_a_pins: tdm-c-dout1-a {
1365 groups = "tdm_c_dout1_a";
1368 drive-strength-microamp = <3000>;
1372 tdm_c_dout1_z_pins: tdm-c-dout1-z {
1374 groups = "tdm_c_dout1_z";
1377 drive-strength-microamp = <3000>;
1381 tdm_c_dout2_a_pins: tdm-c-dout2-a {
1383 groups = "tdm_c_dout2_a";
1386 drive-strength-microamp = <3000>;
1390 tdm_c_dout2_z_pins: tdm-c-dout2-z {
1392 groups = "tdm_c_dout2_z";
1395 drive-strength-microamp = <3000>;
1399 tdm_c_dout3_a_pins: tdm-c-dout3-a {
1401 groups = "tdm_c_dout3_a";
1404 drive-strength-microamp = <3000>;
1408 tdm_c_dout3_z_pins: tdm-c-dout3-z {
1410 groups = "tdm_c_dout3_z";
1413 drive-strength-microamp = <3000>;
1417 tdm_c_fs_a_pins: tdm-c-fs-a {
1419 groups = "tdm_c_fs_a";
1422 drive-strength-microamp = <3000>;
1426 tdm_c_fs_z_pins: tdm-c-fs-z {
1428 groups = "tdm_c_fs_z";
1431 drive-strength-microamp = <3000>;
1435 tdm_c_sclk_a_pins: tdm-c-sclk-a {
1437 groups = "tdm_c_sclk_a";
1440 drive-strength-microamp = <3000>;
1444 tdm_c_sclk_z_pins: tdm-c-sclk-z {
1446 groups = "tdm_c_sclk_z";
1449 drive-strength-microamp = <3000>;
1453 tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
1455 groups = "tdm_c_slv_fs_a";
1461 tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
1463 groups = "tdm_c_slv_fs_z";
1469 tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
1471 groups = "tdm_c_slv_sclk_a";
1477 tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
1479 groups = "tdm_c_slv_sclk_z";
1485 uart_a_pins: uart-a {
1487 groups = "uart_a_tx",
1489 function = "uart_a";
1494 uart_a_cts_rts_pins: uart-a-cts-rts {
1496 groups = "uart_a_cts",
1498 function = "uart_a";
1503 uart_b_pins: uart-b {
1505 groups = "uart_b_tx",
1507 function = "uart_b";
1512 uart_c_pins: uart-c {
1514 groups = "uart_c_tx",
1516 function = "uart_c";
1521 uart_c_cts_rts_pins: uart-c-cts-rts {
1523 groups = "uart_c_cts",
1525 function = "uart_c";
1532 cpu_temp: temperature-sensor@34800 {
1533 compatible = "amlogic,g12a-cpu-thermal",
1534 "amlogic,g12a-thermal";
1535 reg = <0x0 0x34800 0x0 0x50>;
1536 interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
1537 clocks = <&clkc CLKID_TS>;
1538 #thermal-sensor-cells = <0>;
1539 amlogic,ao-secure = <&sec_AO>;
1542 ddr_temp: temperature-sensor@34c00 {
1543 compatible = "amlogic,g12a-ddr-thermal",
1544 "amlogic,g12a-thermal";
1545 reg = <0x0 0x34c00 0x0 0x50>;
1546 interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
1547 clocks = <&clkc CLKID_TS>;
1548 #thermal-sensor-cells = <0>;
1549 amlogic,ao-secure = <&sec_AO>;
1552 usb2_phy0: phy@36000 {
1553 compatible = "amlogic,g12a-usb2-phy";
1554 reg = <0x0 0x36000 0x0 0x2000>;
1556 clock-names = "xtal";
1557 resets = <&reset RESET_USB_PHY20>;
1558 reset-names = "phy";
1563 compatible = "simple-bus";
1564 reg = <0x0 0x38000 0x0 0x400>;
1565 #address-cells = <2>;
1567 ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
1569 canvas: video-lut@48 {
1570 compatible = "amlogic,canvas";
1571 reg = <0x0 0x48 0x0 0x14>;
1575 usb2_phy1: phy@3a000 {
1576 compatible = "amlogic,g12a-usb2-phy";
1577 reg = <0x0 0x3a000 0x0 0x2000>;
1579 clock-names = "xtal";
1580 resets = <&reset RESET_USB_PHY21>;
1581 reset-names = "phy";
1586 compatible = "simple-bus";
1587 reg = <0x0 0x3c000 0x0 0x1400>;
1588 #address-cells = <2>;
1590 ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
1592 hhi: system-controller@0 {
1593 compatible = "amlogic,meson-gx-hhi-sysctrl",
1594 "simple-mfd", "syscon";
1595 reg = <0 0 0 0x400>;
1597 clkc: clock-controller {
1598 compatible = "amlogic,g12a-clkc";
1601 clock-names = "xtal";
1604 pwrc: power-controller {
1605 compatible = "amlogic,meson-g12a-pwrc";
1606 #power-domain-cells = <1>;
1607 amlogic,ao-sysctrl = <&rti>;
1608 resets = <&reset RESET_VIU>,
1609 <&reset RESET_VENC>,
1610 <&reset RESET_VCBUS>,
1611 <&reset RESET_BT656>,
1612 <&reset RESET_RDMA>,
1613 <&reset RESET_VENCI>,
1614 <&reset RESET_VENCP>,
1615 <&reset RESET_VDAC>,
1616 <&reset RESET_VDI6>,
1617 <&reset RESET_VENCL>,
1618 <&reset RESET_VID_LOCK>;
1619 reset-names = "viu", "venc", "vcbus", "bt656",
1620 "rdma", "venci", "vencp", "vdac",
1621 "vdi6", "vencl", "vid_lock";
1622 clocks = <&clkc CLKID_VPU>,
1624 clock-names = "vpu", "vapb";
1626 * VPU clocking is provided by two identical clock paths
1627 * VPU_0 and VPU_1 muxed to a single clock by a glitch
1628 * free mux to safely change frequency while running.
1629 * Same for VAPB but with a final gate after the glitch free mux.
1631 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1632 <&clkc CLKID_VPU_0>,
1633 <&clkc CLKID_VPU>, /* Glitch free mux */
1634 <&clkc CLKID_VAPB_0_SEL>,
1635 <&clkc CLKID_VAPB_0>,
1636 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1637 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1638 <0>, /* Do Nothing */
1639 <&clkc CLKID_VPU_0>,
1640 <&clkc CLKID_FCLK_DIV4>,
1641 <0>, /* Do Nothing */
1642 <&clkc CLKID_VAPB_0>;
1643 assigned-clock-rates = <0>, /* Do Nothing */
1645 <0>, /* Do Nothing */
1646 <0>, /* Do Nothing */
1648 <0>; /* Do Nothing */
1653 usb3_pcie_phy: phy@46000 {
1654 compatible = "amlogic,g12a-usb3-pcie-phy";
1655 reg = <0x0 0x46000 0x0 0x2000>;
1656 clocks = <&clkc CLKID_PCIE_PLL>;
1657 clock-names = "ref_clk";
1658 resets = <&reset RESET_PCIE_PHY>;
1659 reset-names = "phy";
1660 assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1661 assigned-clock-rates = <100000000>;
1665 eth_phy: mdio-multiplexer@4c000 {
1666 compatible = "amlogic,g12a-mdio-mux";
1667 reg = <0x0 0x4c000 0x0 0xa4>;
1668 clocks = <&clkc CLKID_ETH_PHY>,
1670 <&clkc CLKID_MPLL_50M>;
1671 clock-names = "pclk", "clkin0", "clkin1";
1672 mdio-parent-bus = <&mdio0>;
1673 #address-cells = <1>;
1678 #address-cells = <1>;
1684 #address-cells = <1>;
1687 internal_ephy: ethernet_phy@8 {
1688 compatible = "ethernet-phy-id0180.3301",
1689 "ethernet-phy-ieee802.3-c22";
1690 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
1698 aobus: bus@ff800000 {
1699 compatible = "simple-bus";
1700 reg = <0x0 0xff800000 0x0 0x100000>;
1701 #address-cells = <2>;
1703 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1706 compatible = "amlogic,meson-gx-ao-sysctrl",
1707 "simple-mfd", "syscon";
1708 reg = <0x0 0x0 0x0 0x100>;
1709 #address-cells = <2>;
1711 ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
1713 clkc_AO: clock-controller {
1714 compatible = "amlogic,meson-g12a-aoclkc";
1717 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1718 clock-names = "xtal", "mpeg-clk";
1721 ao_pinctrl: pinctrl@14 {
1722 compatible = "amlogic,meson-g12a-aobus-pinctrl";
1723 #address-cells = <2>;
1728 reg = <0x0 0x14 0x0 0x8>,
1730 <0x0 0x24 0x0 0x14>;
1736 gpio-ranges = <&ao_pinctrl 0 0 15>;
1739 i2c_ao_sck_pins: i2c_ao_sck_pins {
1741 groups = "i2c_ao_sck";
1742 function = "i2c_ao";
1744 drive-strength-microamp = <3000>;
1748 i2c_ao_sda_pins: i2c_ao_sda {
1750 groups = "i2c_ao_sda";
1751 function = "i2c_ao";
1753 drive-strength-microamp = <3000>;
1757 i2c_ao_sck_e_pins: i2c_ao_sck_e {
1759 groups = "i2c_ao_sck_e";
1760 function = "i2c_ao";
1762 drive-strength-microamp = <3000>;
1766 i2c_ao_sda_e_pins: i2c_ao_sda_e {
1768 groups = "i2c_ao_sda_e";
1769 function = "i2c_ao";
1771 drive-strength-microamp = <3000>;
1775 mclk0_ao_pins: mclk0-ao {
1777 groups = "mclk0_ao";
1778 function = "mclk0_ao";
1780 drive-strength-microamp = <3000>;
1784 tdm_ao_b_din0_pins: tdm-ao-b-din0 {
1786 groups = "tdm_ao_b_din0";
1787 function = "tdm_ao_b";
1792 spdif_ao_out_pins: spdif-ao-out {
1794 groups = "spdif_ao_out";
1795 function = "spdif_ao_out";
1796 drive-strength-microamp = <500>;
1801 tdm_ao_b_din1_pins: tdm-ao-b-din1 {
1803 groups = "tdm_ao_b_din1";
1804 function = "tdm_ao_b";
1809 tdm_ao_b_din2_pins: tdm-ao-b-din2 {
1811 groups = "tdm_ao_b_din2";
1812 function = "tdm_ao_b";
1817 tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
1819 groups = "tdm_ao_b_dout0";
1820 function = "tdm_ao_b";
1822 drive-strength-microamp = <3000>;
1826 tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
1828 groups = "tdm_ao_b_dout1";
1829 function = "tdm_ao_b";
1831 drive-strength-microamp = <3000>;
1835 tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
1837 groups = "tdm_ao_b_dout2";
1838 function = "tdm_ao_b";
1840 drive-strength-microamp = <3000>;
1844 tdm_ao_b_fs_pins: tdm-ao-b-fs {
1846 groups = "tdm_ao_b_fs";
1847 function = "tdm_ao_b";
1849 drive-strength-microamp = <3000>;
1853 tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
1855 groups = "tdm_ao_b_sclk";
1856 function = "tdm_ao_b";
1858 drive-strength-microamp = <3000>;
1862 tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
1864 groups = "tdm_ao_b_slv_fs";
1865 function = "tdm_ao_b";
1870 tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
1872 groups = "tdm_ao_b_slv_sclk";
1873 function = "tdm_ao_b";
1878 uart_ao_a_pins: uart-a-ao {
1880 groups = "uart_ao_a_tx",
1882 function = "uart_ao_a";
1887 uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts {
1889 groups = "uart_ao_a_cts",
1891 function = "uart_ao_a";
1896 pwm_a_e_pins: pwm-a-e {
1899 function = "pwm_a_e";
1904 pwm_ao_a_pins: pwm-ao-a {
1906 groups = "pwm_ao_a";
1907 function = "pwm_ao_a";
1912 pwm_ao_b_pins: pwm-ao-b {
1914 groups = "pwm_ao_b";
1915 function = "pwm_ao_b";
1920 pwm_ao_c_4_pins: pwm-ao-c-4 {
1922 groups = "pwm_ao_c_4";
1923 function = "pwm_ao_c";
1928 pwm_ao_c_6_pins: pwm-ao-c-6 {
1930 groups = "pwm_ao_c_6";
1931 function = "pwm_ao_c";
1936 pwm_ao_d_5_pins: pwm-ao-d-5 {
1938 groups = "pwm_ao_d_5";
1939 function = "pwm_ao_d";
1944 pwm_ao_d_10_pins: pwm-ao-d-10 {
1946 groups = "pwm_ao_d_10";
1947 function = "pwm_ao_d";
1952 pwm_ao_d_e_pins: pwm-ao-d-e {
1954 groups = "pwm_ao_d_e";
1955 function = "pwm_ao_d";
1959 remote_input_ao_pins: remote-input-ao {
1961 groups = "remote_ao_input";
1962 function = "remote_ao_input";
1970 compatible = "amlogic,meson-vrtc";
1971 reg = <0x0 0x000a8 0x0 0x4>;
1975 compatible = "amlogic,meson-gx-ao-cec";
1976 reg = <0x0 0x00100 0x0 0x14>;
1977 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
1978 clocks = <&clkc_AO CLKID_AO_CEC>;
1979 clock-names = "core";
1980 status = "disabled";
1983 sec_AO: ao-secure@140 {
1984 compatible = "amlogic,meson-gx-ao-secure", "syscon";
1985 reg = <0x0 0x140 0x0 0x140>;
1986 amlogic,has-chip-id;
1990 compatible = "amlogic,meson-g12a-ao-cec";
1991 reg = <0x0 0x00280 0x0 0x1c>;
1992 interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
1993 clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>;
1994 clock-names = "oscin";
1995 status = "disabled";
1998 pwm_AO_cd: pwm@2000 {
1999 compatible = "amlogic,meson-g12a-ao-pwm-cd";
2000 reg = <0x0 0x2000 0x0 0x20>;
2002 status = "disabled";
2005 uart_AO: serial@3000 {
2006 compatible = "amlogic,meson-gx-uart",
2007 "amlogic,meson-ao-uart";
2008 reg = <0x0 0x3000 0x0 0x18>;
2009 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
2010 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
2011 clock-names = "xtal", "pclk", "baud";
2012 status = "disabled";
2015 uart_AO_B: serial@4000 {
2016 compatible = "amlogic,meson-gx-uart",
2017 "amlogic,meson-ao-uart";
2018 reg = <0x0 0x4000 0x0 0x18>;
2019 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
2020 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
2021 clock-names = "xtal", "pclk", "baud";
2022 status = "disabled";
2026 compatible = "amlogic,meson-axg-i2c";
2027 status = "disabled";
2028 reg = <0x0 0x05000 0x0 0x20>;
2029 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
2030 #address-cells = <1>;
2032 clocks = <&clkc CLKID_I2C>;
2035 pwm_AO_ab: pwm@7000 {
2036 compatible = "amlogic,meson-g12a-ao-pwm-ab";
2037 reg = <0x0 0x7000 0x0 0x20>;
2039 status = "disabled";
2043 compatible = "amlogic,meson-gxbb-ir";
2044 reg = <0x0 0x8000 0x0 0x20>;
2045 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
2046 status = "disabled";
2050 compatible = "amlogic,meson-g12a-saradc",
2051 "amlogic,meson-saradc";
2052 reg = <0x0 0x9000 0x0 0x48>;
2053 #io-channel-cells = <1>;
2054 interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
2056 <&clkc_AO CLKID_AO_SAR_ADC>,
2057 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
2058 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
2059 clock-names = "clkin", "core", "adc_clk", "adc_sel";
2060 status = "disabled";
2064 vdec: video-decoder@ff620000 {
2065 compatible = "amlogic,g12a-vdec";
2066 reg = <0x0 0xff620000 0x0 0x10000>,
2067 <0x0 0xffd0e180 0x0 0xe4>;
2068 reg-names = "dos", "esparser";
2069 interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
2070 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
2071 interrupt-names = "vdec", "esparser";
2073 amlogic,ao-sysctrl = <&rti>;
2074 amlogic,canvas = <&canvas>;
2076 clocks = <&clkc CLKID_PARSER>,
2078 <&clkc CLKID_VDEC_1>,
2079 <&clkc CLKID_VDEC_HEVC>,
2080 <&clkc CLKID_VDEC_HEVCF>;
2081 clock-names = "dos_parser", "dos", "vdec_1",
2082 "vdec_hevc", "vdec_hevcf";
2083 resets = <&reset RESET_PARSER>;
2084 reset-names = "esparser";
2088 compatible = "amlogic,meson-g12a-vpu";
2089 reg = <0x0 0xff900000 0x0 0x100000>,
2090 <0x0 0xff63c000 0x0 0x1000>;
2091 reg-names = "vpu", "hhi";
2092 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
2093 #address-cells = <1>;
2095 amlogic,canvas = <&canvas>;
2097 /* CVBS VDAC output port */
2098 cvbs_vdac_port: port@0 {
2102 /* HDMI-TX output port */
2103 hdmi_tx_port: port@1 {
2106 hdmi_tx_out: endpoint {
2107 remote-endpoint = <&hdmi_tx_in>;
2112 gic: interrupt-controller@ffc01000 {
2113 compatible = "arm,gic-400";
2114 reg = <0x0 0xffc01000 0 0x1000>,
2115 <0x0 0xffc02000 0 0x2000>,
2116 <0x0 0xffc04000 0 0x2000>,
2117 <0x0 0xffc06000 0 0x2000>;
2118 interrupt-controller;
2119 interrupts = <GIC_PPI 9
2120 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2121 #interrupt-cells = <3>;
2122 #address-cells = <0>;
2125 cbus: bus@ffd00000 {
2126 compatible = "simple-bus";
2127 reg = <0x0 0xffd00000 0x0 0x100000>;
2128 #address-cells = <2>;
2130 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
2132 reset: reset-controller@1004 {
2133 compatible = "amlogic,meson-axg-reset";
2134 reg = <0x0 0x1004 0x0 0x9c>;
2138 gpio_intc: interrupt-controller@f080 {
2139 compatible = "amlogic,meson-g12a-gpio-intc",
2140 "amlogic,meson-gpio-intc";
2141 reg = <0x0 0xf080 0x0 0x10>;
2142 interrupt-controller;
2143 #interrupt-cells = <2>;
2144 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
2148 compatible = "amlogic,meson-g12a-spicc";
2149 reg = <0x0 0x13000 0x0 0x44>;
2150 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
2151 clocks = <&clkc CLKID_SPICC0>,
2152 <&clkc CLKID_SPICC0_SCLK>;
2153 clock-names = "core", "pclk";
2154 #address-cells = <1>;
2156 status = "disabled";
2160 compatible = "amlogic,meson-g12a-spicc";
2161 reg = <0x0 0x15000 0x0 0x44>;
2162 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
2163 clocks = <&clkc CLKID_SPICC1>,
2164 <&clkc CLKID_SPICC1_SCLK>;
2165 clock-names = "core", "pclk";
2166 #address-cells = <1>;
2168 status = "disabled";
2172 compatible = "amlogic,meson-gxbb-spifc";
2173 status = "disabled";
2174 reg = <0x0 0x14000 0x0 0x80>;
2175 #address-cells = <1>;
2177 clocks = <&clkc CLKID_CLK81>;
2181 compatible = "amlogic,meson-g12a-ee-pwm";
2182 reg = <0x0 0x19000 0x0 0x20>;
2184 status = "disabled";
2188 compatible = "amlogic,meson-g12a-ee-pwm";
2189 reg = <0x0 0x1a000 0x0 0x20>;
2191 status = "disabled";
2195 compatible = "amlogic,meson-g12a-ee-pwm";
2196 reg = <0x0 0x1b000 0x0 0x20>;
2198 status = "disabled";
2202 compatible = "amlogic,meson-axg-i2c";
2203 status = "disabled";
2204 reg = <0x0 0x1c000 0x0 0x20>;
2205 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
2206 #address-cells = <1>;
2208 clocks = <&clkc CLKID_I2C>;
2212 compatible = "amlogic,meson-axg-i2c";
2213 status = "disabled";
2214 reg = <0x0 0x1d000 0x0 0x20>;
2215 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
2216 #address-cells = <1>;
2218 clocks = <&clkc CLKID_I2C>;
2222 compatible = "amlogic,meson-axg-i2c";
2223 status = "disabled";
2224 reg = <0x0 0x1e000 0x0 0x20>;
2225 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
2226 #address-cells = <1>;
2228 clocks = <&clkc CLKID_I2C>;
2232 compatible = "amlogic,meson-axg-i2c";
2233 status = "disabled";
2234 reg = <0x0 0x1f000 0x0 0x20>;
2235 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
2236 #address-cells = <1>;
2238 clocks = <&clkc CLKID_I2C>;
2241 clk_msr: clock-measure@18000 {
2242 compatible = "amlogic,meson-g12a-clk-measure";
2243 reg = <0x0 0x18000 0x0 0x10>;
2246 uart_C: serial@22000 {
2247 compatible = "amlogic,meson-gx-uart";
2248 reg = <0x0 0x22000 0x0 0x18>;
2249 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
2250 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2251 clock-names = "xtal", "pclk", "baud";
2252 status = "disabled";
2255 uart_B: serial@23000 {
2256 compatible = "amlogic,meson-gx-uart";
2257 reg = <0x0 0x23000 0x0 0x18>;
2258 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
2259 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2260 clock-names = "xtal", "pclk", "baud";
2261 status = "disabled";
2264 uart_A: serial@24000 {
2265 compatible = "amlogic,meson-gx-uart";
2266 reg = <0x0 0x24000 0x0 0x18>;
2267 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
2268 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2269 clock-names = "xtal", "pclk", "baud";
2270 status = "disabled";
2274 sd_emmc_a: sd@ffe03000 {
2275 compatible = "amlogic,meson-axg-mmc";
2276 reg = <0x0 0xffe03000 0x0 0x800>;
2277 interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
2278 status = "disabled";
2279 clocks = <&clkc CLKID_SD_EMMC_A>,
2280 <&clkc CLKID_SD_EMMC_A_CLK0>,
2281 <&clkc CLKID_FCLK_DIV2>;
2282 clock-names = "core", "clkin0", "clkin1";
2283 resets = <&reset RESET_SD_EMMC_A>;
2286 sd_emmc_b: sd@ffe05000 {
2287 compatible = "amlogic,meson-axg-mmc";
2288 reg = <0x0 0xffe05000 0x0 0x800>;
2289 interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
2290 status = "disabled";
2291 clocks = <&clkc CLKID_SD_EMMC_B>,
2292 <&clkc CLKID_SD_EMMC_B_CLK0>,
2293 <&clkc CLKID_FCLK_DIV2>;
2294 clock-names = "core", "clkin0", "clkin1";
2295 resets = <&reset RESET_SD_EMMC_B>;
2298 sd_emmc_c: mmc@ffe07000 {
2299 compatible = "amlogic,meson-axg-mmc";
2300 reg = <0x0 0xffe07000 0x0 0x800>;
2301 interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
2302 status = "disabled";
2303 clocks = <&clkc CLKID_SD_EMMC_C>,
2304 <&clkc CLKID_SD_EMMC_C_CLK0>,
2305 <&clkc CLKID_FCLK_DIV2>;
2306 clock-names = "core", "clkin0", "clkin1";
2307 resets = <&reset RESET_SD_EMMC_C>;
2311 status = "disabled";
2312 compatible = "amlogic,meson-g12a-usb-ctrl";
2313 reg = <0x0 0xffe09000 0x0 0xa0>;
2314 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2315 #address-cells = <2>;
2319 clocks = <&clkc CLKID_USB>;
2320 resets = <&reset RESET_USB>;
2324 phys = <&usb2_phy0>, <&usb2_phy1>,
2325 <&usb3_pcie_phy PHY_TYPE_USB3>;
2326 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
2328 dwc2: usb@ff400000 {
2329 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
2330 reg = <0x0 0xff400000 0x0 0x40000>;
2331 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
2332 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2333 clock-names = "otg";
2334 phys = <&usb2_phy1>;
2335 phy-names = "usb2-phy";
2336 dr_mode = "peripheral";
2337 g-rx-fifo-size = <192>;
2338 g-np-tx-fifo-size = <128>;
2339 g-tx-fifo-size = <128 128 16 16 16>;
2342 dwc3: usb@ff500000 {
2343 compatible = "snps,dwc3";
2344 reg = <0x0 0xff500000 0x0 0x100000>;
2345 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
2347 snps,dis_u2_susphy_quirk;
2348 snps,quirk-frame-length-adjustment;
2349 snps,parkmode-disable-ss-quirk;
2353 mali: gpu@ffe40000 {
2354 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
2355 reg = <0x0 0xffe40000 0x0 0x40000>;
2356 interrupt-parent = <&gic>;
2357 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
2358 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
2359 <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
2360 interrupt-names = "job", "mmu", "gpu";
2361 clocks = <&clkc CLKID_MALI>;
2362 resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
2365 * Mali clocking is provided by two identical clock paths
2366 * MALI_0 and MALI_1 muxed to a single clock by a glitch
2367 * free mux to safely change frequency while running.
2369 assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
2370 <&clkc CLKID_MALI_0>,
2371 <&clkc CLKID_MALI>; /* Glitch free mux */
2372 assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>,
2373 <0>, /* Do Nothing */
2374 <&clkc CLKID_MALI_0>;
2375 assigned-clock-rates = <0>, /* Do Nothing */
2377 <0>; /* Do Nothing */
2378 #cooling-cells = <2>;
2383 compatible = "arm,armv8-timer";
2384 interrupts = <GIC_PPI 13
2385 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2387 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2389 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2391 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
2392 arm,no-tick-in-suspend;
2396 compatible = "fixed-clock";
2397 clock-frequency = <24000000>;
2398 clock-output-names = "xtal";