arch/arm/dts/keystone-k2hk-evm.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Keystone 2 Kepler/Hawking EVM device tree
   4  *
   5  * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
   6  */
   7 /dts-v1/;
   8
   9 #include "keystone.dtsi"
  10 #include "keystone-k2hk.dtsi"
  11
  12 / {
  13         compatible =  "ti,k2hk-evm","ti,keystone";
  14         model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
  15
  16         soc {
  17                 clocks {
  18                         refclksys: refclksys {
  19                                 #clock-cells = <0>;
  20                                 compatible = "fixed-clock";
  21                                 clock-frequency = <122880000>;
  22                                 clock-output-names = "refclk-sys";
  23                         };
  24
  25                         refclkpass: refclkpass {
  26                                 #clock-cells = <0>;
  27                                 compatible = "fixed-clock";
  28                                 clock-frequency = <122880000>;
  29                                 clock-output-names = "refclk-pass";
  30                         };
  31
  32                         refclkarm: refclkarm {
  33                                 #clock-cells = <0>;
  34                                 compatible = "fixed-clock";
  35                                 clock-frequency = <125000000>;
  36                                 clock-output-names = "refclk-arm";
  37                         };
  38
  39                         refclkddr3a: refclkddr3a {
  40                                 #clock-cells = <0>;
  41                                 compatible = "fixed-clock";
  42                                 clock-frequency = <100000000>;
  43                                 clock-output-names = "refclk-ddr3a";
  44                         };
  45
  46                         refclkddr3b: refclkddr3b {
  47                                 #clock-cells = <0>;
  48                                 compatible = "fixed-clock";
  49                                 clock-frequency = <100000000>;
  50                                 clock-output-names = "refclk-ddr3b";
  51                         };
  52                 };
  53         };
  54
  55         leds {
  56                 compatible = "gpio-leds";
  57                 debug1_1 {
  58                         label = "keystone:green:debug1";
  59                         gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
  60                 };
  61
  62                 debug1_2 {
  63                         label = "keystone:red:debug1";
  64                         gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
  65                 };
  66
  67                 debug2 {
  68                         label = "keystone:blue:debug2";
  69                         gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
  70                 };
  71
  72                 debug3 {
  73                         label = "keystone:blue:debug3";
  74                         gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
  75                 };
  76         };
  77 };
  78
  79 &usb_phy {
  80         status = "okay";
  81 };
  82
  83 &usb {
  84         status = "okay";
  85 };
  86
  87 &aemif {
  88         cs0 {
  89                 #address-cells = <2>;
  90                 #size-cells = <1>;
  91                 clock-ranges;
  92                 ranges;
  93
  94                 ti,cs-chipselect = <0>;
  95                 /* all timings in nanoseconds */
  96                 ti,cs-min-turnaround-ns = <12>;
  97                 ti,cs-read-hold-ns = <6>;
  98                 ti,cs-read-strobe-ns = <23>;
  99                 ti,cs-read-setup-ns = <9>;
 100                 ti,cs-write-hold-ns = <8>;
 101                 ti,cs-write-strobe-ns = <23>;
 102                 ti,cs-write-setup-ns = <8>;
 103
 104                 nand@0,0 {
 105                         compatible = "ti,keystone-nand","ti,davinci-nand";
 106                         #address-cells = <1>;
 107                         #size-cells = <1>;
 108                         reg = <0 0 0x4000000
 109                                1 0 0x0000100>;
 110
 111                         ti,davinci-chipselect = <0>;
 112                         ti,davinci-mask-ale = <0x2000>;
 113                         ti,davinci-mask-cle = <0x4000>;
 114                         ti,davinci-mask-chipsel = <0>;
 115                         nand-ecc-mode = "hw";
 116                         ti,davinci-ecc-bits = <4>;
 117                         nand-on-flash-bbt;
 118
 119                         partition@0 {
 120                                 label = "u-boot";
 121                                 reg = <0x0 0x100000>;
 122                                 read-only;
 123                         };
 124
 125                         partition@100000 {
 126                                 label = "params";
 127                                 reg = <0x100000 0x80000>;
 128                                 read-only;
 129                         };
 130
 131                         partition@180000 {
 132                                 label = "ubifs";
 133                                 reg = <0x180000 0x1fe80000>;
 134                         };
 135                 };
 136         };
 137 };
 138
 139 &i2c0 {
 140         dtt@50 {
 141                 compatible = "at,24c1024";
 142                 reg = <0x50>;
 143         };
 144 };
 145
 146 &spi0 {
 147         status = "okay";
 148         nor_flash: n25q128a11@0 {
 149                 #address-cells = <1>;
 150                 #size-cells = <1>;
 151                 compatible = "Micron,n25q128a11", "jedec,spi-nor";
 152                 spi-max-frequency = <54000000>;
 153                 m25p,fast-read;
 154                 reg = <0>;
 155
 156                 partition@0 {
 157                         label = "u-boot-spl";
 158                         reg = <0x0 0x80000>;
 159                         read-only;
 160                 };
 161
 162                 partition@1 {
 163                         label = "misc";
 164                         reg = <0x80000 0xf80000>;
 165                 };
 166         };
 167 };
 168
 169 &mdio {
 170         status = "okay";
 171         ethphy0: ethernet-phy@0 {
 172                 compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
 173                 reg = <0>;
 174         };
 175
 176         ethphy1: ethernet-phy@1 {
 177                 compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
 178                 reg = <1>;
 179         };
 180 };