1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
5 * Link to Common Processor Board: https://www.ti.com/lit/zip/sprr439
10 #include "k3-j721s2-som-p0.dtsi"
11 #include <dt-bindings/net/ti-dp83867.h>
14 compatible = "ti,j721s2-evm", "ti,j721s2";
15 model = "Texas Instruments J721S2 EVM";
18 stdout-path = "serial2:115200n8";
19 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
23 serial2 = &main_uart8;
31 evm_12v0: fixedregulator-evm12v0 {
33 compatible = "regulator-fixed";
34 regulator-name = "evm_12v0";
35 regulator-min-microvolt = <12000000>;
36 regulator-max-microvolt = <12000000>;
41 vsys_3v3: fixedregulator-vsys3v3 {
42 /* Output of LM5140 */
43 compatible = "regulator-fixed";
44 regulator-name = "vsys_3v3";
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
47 vin-supply = <&evm_12v0>;
52 vsys_5v0: fixedregulator-vsys5v0 {
53 /* Output of LM5140 */
54 compatible = "regulator-fixed";
55 regulator-name = "vsys_5v0";
56 regulator-min-microvolt = <5000000>;
57 regulator-max-microvolt = <5000000>;
58 vin-supply = <&evm_12v0>;
63 vdd_mmc1: fixedregulator-sd {
64 /* Output of TPS22918 */
65 compatible = "regulator-fixed";
66 regulator-name = "vdd_mmc1";
67 regulator-min-microvolt = <3300000>;
68 regulator-max-microvolt = <3300000>;
71 vin-supply = <&vsys_3v3>;
72 gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
75 vdd_sd_dv: gpio-regulator-TLV71033 {
76 /* Output of TLV71033 */
77 compatible = "regulator-gpio";
78 regulator-name = "tlv71033";
79 pinctrl-names = "default";
80 pinctrl-0 = <&vdd_sd_dv_pins_default>;
81 regulator-min-microvolt = <1800000>;
82 regulator-max-microvolt = <3300000>;
84 vin-supply = <&vsys_5v0>;
85 gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>;
86 states = <1800000 0x0>,
90 transceiver1: can-phy1 {
91 compatible = "ti,tcan1043";
93 max-bitrate = <5000000>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
96 standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>;
97 enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
100 transceiver2: can-phy2 {
101 compatible = "ti,tcan1042";
103 max-bitrate = <5000000>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
106 standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
112 main_uart8_pins_default: main-uart8-pins-default {
113 pinctrl-single,pins = <
114 J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */
115 J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
116 J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
117 J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
121 main_i2c3_pins_default: main-i2c3-pins-default {
122 pinctrl-single,pins = <
123 J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */
124 J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */
128 main_mmc1_pins_default: main-mmc1-pins-default {
129 pinctrl-single,pins = <
130 J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
131 J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
132 J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
133 J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
134 J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
135 J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
136 J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
137 J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
141 vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
142 pinctrl-single,pins = <
143 J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
149 mcu_cpsw_pins_default: mcu-cpsw-pins-default {
150 pinctrl-single,pins = <
151 J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
152 J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
153 J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
154 J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
155 J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
156 J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
157 J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
158 J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
159 J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
160 J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
161 J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
162 J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
166 mcu_mdio_pins_default: mcu-mdio-pins-default {
167 pinctrl-single,pins = <
168 J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
169 J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
173 mcu_mcan0_pins_default: mcu-mcan0-pins-default {
174 pinctrl-single,pins = <
175 J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */
176 J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */
180 mcu_mcan1_pins_default: mcu-mcan1-pins-default {
181 pinctrl-single,pins = <
182 J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */
183 J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX */
187 mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
188 pinctrl-single,pins = <
189 J721S2_WKUP_IOPAD(0x0c0, PIN_INPUT, 7) /* (D26) WKUP_GPIO0_0 */
190 J721S2_WKUP_IOPAD(0x0a8, PIN_INPUT, 7) /* (B25) MCU_SPI0_D1.WKUP_GPIO0_69 */
194 mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default {
195 pinctrl-single,pins = <
196 J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */
254 pinctrl-names = "default";
255 pinctrl-0 = <&main_uart8_pins_default>;
256 /* Shared with TFA on this platform */
257 power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
265 clock-frequency = <400000>;
268 compatible = "ti,tca6416";
272 gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ",
273 "PCIE_2L_EP_RST_EN", "PCIE_1L_MODE_SEL", "PCIE_1L_PERSTZ",
274 "PCIE_1L_RC_RSTZ", "PCIE_1L_EP_RST_EN", "PCIE_2L_PRSNT#",
275 "PCIE_1L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3", "EXP_MUX1",
276 "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTz";
280 compatible = "ti,tca6424";
284 gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN",
285 "USBC_MODE_SEL1", "USBC_MODE_SEL0", "MCAN0_EN", "MCAN0_STB#",
286 "MUX_SPAREMUX_SPARE", "MCASP/TRACE_MUX_S0", "MCASP/TRACE_MUX_S1",
287 "MLB_MUX_SEL", "MCAN_MUX_SEL", "MCASP2/SPI3_MUX_SEL", "PCIe_CLKREQn_MUX_SEL",
288 "CDCI2_RSTZ", "ENET_EXP_PWRDN", "ENET_EXP_RESETZ", "ENET_I2CMUX_SEL",
289 "ENET_EXP_SPARE2", "M2PCIE_RTSZ", "USER_INPUT1", "USER_LED1", "USER_LED2";
320 ti,driver-strength-ohm = <50>;
326 pinctrl-0 = <&main_mmc1_pins_default>;
327 pinctrl-names = "default";
329 vmmc-supply = <&vdd_mmc1>;
330 vqmmc-supply = <&vdd_sd_dv>;
334 pinctrl-names = "default";
335 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
339 phy0: ethernet-phy@0 {
341 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
342 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
343 ti,min-output-impedance;
348 phy-mode = "rgmii-rxid";
349 phy-handle = <&phy0>;
353 pinctrl-names = "default";
354 pinctrl-0 = <&mcu_mcan0_pins_default>;
355 phys = <&transceiver1>;
359 pinctrl-names = "default";
360 pinctrl-0 = <&mcu_mcan1_pins_default>;
361 phys = <&transceiver2>;