arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
   4  */
   5
   6 / {
   7         chosen {
   8                 stdout-path = "serial2:115200n8";
   9                 tick-timer = &timer1;
  10         };
  11
  12         aliases {
  13                 serial0 = &wkup_uart0;
  14                 serial1 = &mcu_uart0;
  15                 serial2 = &main_uart8;
  16                 i2c0 = &wkup_i2c0;
  17                 i2c1 = &mcu_i2c0;
  18                 i2c2 = &mcu_i2c1;
  19                 i2c3 = &main_i2c0;
  20                 ethernet0 = &cpsw_port1;
  21         };
  22 };
  23
  24 &wkup_i2c0 {
  25         u-boot,dm-spl;
  26 };
  27
  28 &cbass_main {
  29         u-boot,dm-spl;
  30 };
  31
  32 &main_navss {
  33         u-boot,dm-spl;
  34 };
  35
  36 &cbass_mcu_wakeup {
  37         u-boot,dm-spl;
  38
  39         timer1: timer@40400000 {
  40                 compatible = "ti,omap5430-timer";
  41                 reg = <0x0 0x40400000 0x0 0x80>;
  42                 ti,timer-alwon;
  43                 clock-frequency = <25000000>;
  44                 u-boot,dm-spl;
  45         };
  46
  47         chipid@43000014 {
  48                 u-boot,dm-spl;
  49         };
  50 };
  51
  52 &mcu_navss {
  53         u-boot,dm-spl;
  54 };
  55
  56 &mcu_ringacc {
  57         reg =   <0x0 0x2b800000 0x0 0x400000>,
  58                 <0x0 0x2b000000 0x0 0x400000>,
  59                 <0x0 0x28590000 0x0 0x100>,
  60                 <0x0 0x2a500000 0x0 0x40000>,
  61                 <0x0 0x28440000 0x0 0x40000>;
  62         reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
  63         u-boot,dm-spl;
  64 };
  65
  66 &mcu_udmap {
  67         reg =   <0x0 0x285c0000 0x0 0x100>,
  68                 <0x0 0x284c0000 0x0 0x4000>,
  69                 <0x0 0x2a800000 0x0 0x40000>,
  70                 <0x0 0x284a0000 0x0 0x4000>,
  71                 <0x0 0x2aa00000 0x0 0x40000>,
  72                 <0x0 0x28400000 0x0 0x2000>;
  73         reg-names = "gcfg", "rchan", "rchanrt", "tchan",
  74                     "tchanrt", "rflow";
  75         u-boot,dm-spl;
  76 };
  77
  78 &secure_proxy_main {
  79         u-boot,dm-spl;
  80 };
  81
  82 &sms {
  83         u-boot,dm-spl;
  84         k3_sysreset: sysreset-controller {
  85                 compatible = "ti,sci-sysreset";
  86                 u-boot,dm-spl;
  87         };
  88 };
  89
  90 &main_pmx0 {
  91         u-boot,dm-spl;
  92 };
  93
  94 &main_uart8_pins_default {
  95         u-boot,dm-spl;
  96 };
  97
  98 &main_mmc1_pins_default {
  99         u-boot,dm-spl;
 100 };
 101
 102 &wkup_pmx0 {
 103         u-boot,dm-spl;
 104 };
 105
 106 &k3_pds {
 107         u-boot,dm-spl;
 108 };
 109
 110 &k3_clks {
 111         u-boot,dm-spl;
 112 };
 113
 114 &k3_reset {
 115         u-boot,dm-spl;
 116 };
 117
 118 &main_uart8 {
 119         u-boot,dm-spl;
 120 };
 121
 122 &mcu_uart0 {
 123         u-boot,dm-spl;
 124 };
 125
 126 &wkup_uart0 {
 127         u-boot,dm-spl;
 128 };
 129
 130 &mcu_cpsw {
 131         reg = <0x0 0x46000000 0x0 0x200000>,
 132               <0x0 0x40f00200 0x0 0x8>;
 133         reg-names = "cpsw_nuss", "mac_efuse";
 134         /delete-property/ ranges;
 135
 136         cpsw-phy-sel@40f04040 {
 137                 compatible = "ti,am654-cpsw-phy-sel";
 138                 reg= <0x0 0x40f04040 0x0 0x4>;
 139                 reg-names = "gmii-sel";
 140         };
 141 };
 142
 143 &main_sdhci0 {
 144         u-boot,dm-spl;
 145 };
 146
 147 &main_sdhci1 {
 148         u-boot,dm-spl;
 149 };