arch/arm/dts/k3-j721e-r5-common-proc-board.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "k3-j721e-som-p0.dtsi"
   9 #include "k3-j721e-ddr-evm-lp4-4266.dtsi"
  10 #include "k3-j721e-ddr.dtsi"
  11
  12 / {
  13         aliases {
  14                 remoteproc0 = &sysctrler;
  15                 remoteproc1 = &a72_0;
  16                 remoteproc2 = &main_r5fss0_core0;
  17                 remoteproc3 = &main_r5fss0_core1;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial2:115200n8";
  22                 tick-timer = &timer1;
  23         };
  24
  25         a72_0: a72@0 {
  26                 compatible = "ti,am654-rproc";
  27                 reg = <0x0 0x00a90000 0x0 0x10>;
  28                 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
  29                                 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
  30                 resets = <&k3_reset 202 0>;
  31                 clocks = <&k3_clks 61 1>;
  32                 assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
  33                 assigned-clock-rates = <2000000000>, <200000000>;
  34                 ti,sci = <&dmsc>;
  35                 ti,sci-proc-id = <32>;
  36                 ti,sci-host-id = <10>;
  37                 u-boot,dm-spl;
  38         };
  39
  40         clk_200mhz: dummy_clock_200mhz {
  41                 compatible = "fixed-clock";
  42                 #clock-cells = <0>;
  43                 clock-frequency = <200000000>;
  44                 u-boot,dm-spl;
  45         };
  46
  47         clk_19_2mhz: dummy_clock_19_2mhz {
  48                 compatible = "fixed-clock";
  49                 #clock-cells = <0>;
  50                 clock-frequency = <19200000>;
  51                 u-boot,dm-spl;
  52         };
  53 };
  54
  55 &cbass_mcu_wakeup {
  56         mcu_secproxy: secproxy@28380000 {
  57                 u-boot,dm-spl;
  58                 compatible = "ti,am654-secure-proxy";
  59                 reg = <0x0 0x2a380000 0x0 0x80000>,
  60                       <0x0 0x2a400000 0x0 0x80000>,
  61                       <0x0 0x2a480000 0x0 0x80000>;
  62                 reg-names = "rt", "scfg", "target_data";
  63                 #mbox-cells = <1>;
  64         };
  65
  66         sysctrler: sysctrler {
  67                 u-boot,dm-spl;
  68                 compatible = "ti,am654-system-controller";
  69                 mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
  70                 mbox-names = "tx", "rx";
  71         };
  72
  73         wkup_vtm0: wkup_vtm@42040000 {
  74                 compatible = "ti,am654-vtm", "ti,j721e-avs";
  75                 reg = <0x0 0x42040000 0x0 0x330>;
  76                 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
  77                 #thermal-sensor-cells = <1>;
  78         };
  79
  80         dm_tifs: dm-tifs {
  81                 compatible = "ti,j721e-dm-sci";
  82                 ti,host-id = <3>;
  83                 ti,secure-host;
  84                 mbox-names = "rx", "tx";
  85                 mboxes= <&mcu_secproxy 21>,
  86                         <&mcu_secproxy 23>;
  87                 u-boot,dm-spl;
  88         };
  89 };
  90
  91 &cbass_main {
  92         main_esm: esm@700000 {
  93                 compatible = "ti,j721e-esm";
  94                 reg = <0x0 0x700000 0x0 0x1000>;
  95                 ti,esm-pins = <344>, <345>;
  96                 u-boot,dm-spl;
  97         };
  98 };
  99
 100 &dmsc {
 101         mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
 102         mbox-names = "tx", "rx", "notify";
 103         ti,host-id = <4>;
 104         ti,secure-host;
 105 };
 106
 107 &wkup_pmx0 {
 108         wkup_uart0_pins_default: wkup_uart0_pins_default {
 109                 u-boot,dm-spl;
 110                 pinctrl-single,pins = <
 111                         J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
 112                         J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */
 113                 >;
 114         };
 115
 116         mcu_uart0_pins_default: mcu_uart0_pins_default {
 117                 u-boot,dm-spl;
 118                 pinctrl-single,pins = <
 119                         J721E_WKUP_IOPAD(0xe8, PIN_INPUT, 0) /* (H29) WKUP_GPIO0_14.MCU_UART0_CTSn */
 120                         J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */
 121                         J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */
 122                         J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */
 123                 >;
 124         };
 125
 126         wkup_i2c0_pins_default: wkup-i2c0-pins-default {
 127                 pinctrl-single,pins = <
 128                         J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
 129                         J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
 130                 >;
 131         };
 132
 133         mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
 134                 pinctrl-single,pins = <
 135                         J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
 136                         J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0)  /* MCU_OSPI0_DQS */
 137                         J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* MCU_OSPI0_D0 */
 138                         J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* MCU_OSPI0_D1 */
 139                         J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* MCU_OSPI0_D2 */
 140                         J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* MCU_OSPI0_D3 */
 141                         J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* MCU_OSPI0_D4 */
 142                         J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* MCU_OSPI0_D5 */
 143                         J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* MCU_OSPI0_D6 */
 144                         J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* MCU_OSPI0_D7 */
 145                         J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
 146                 >;
 147         };
 148
 149         mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
 150                 u-boot,dm-spl;
 151                 pinctrl-single,pins = <
 152                         J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
 153                         J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
 154                         J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
 155                         J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
 156                         J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
 157                         J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
 158                         J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
 159                         J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
 160                 >;
 161         };
 162 };
 163
 164 &main_pmx0 {
 165         main_uart0_pins_default: main_uart0_pins_default {
 166                 u-boot,dm-spl;
 167                 pinctrl-single,pins = <
 168                         J721E_IOPAD(0x1d4, PIN_INPUT, 1) /* (Y3) SPI1_CS0.UART0_CTSn */
 169                         J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */
 170                         J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
 171                         J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
 172                 >;
 173         };
 174
 175         main_usbss0_pins_default: main_usbss0_pins_default {
 176                 pinctrl-single,pins = <
 177                         J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
 178                         J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
 179                 >;
 180         };
 181
 182         main_mmc1_pins_default: main_mmc1_pins_default {
 183                 pinctrl-single,pins = <
 184                         J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */
 185                         J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */
 186                         J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
 187                         J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */
 188                         J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
 189                         J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
 190                         J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
 191                         J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
 192                         J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
 193                 >;
 194         };
 195
 196         main_i2c0_pins_default: main-i2c0-pins-default {
 197                 pinctrl-single,pins = <
 198                         J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
 199                         J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
 200                 >;
 201         };
 202 };
 203
 204 &wkup_uart0 {
 205         u-boot,dm-spl;
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&wkup_uart0_pins_default>;
 208         status = "okay";
 209 };
 210
 211 &mcu_uart0 {
 212         /delete-property/ power-domains;
 213         /delete-property/ clocks;
 214         /delete-property/ clock-names;
 215         pinctrl-names = "default";
 216         pinctrl-0 = <&mcu_uart0_pins_default>;
 217         status = "okay";
 218         clock-frequency = <48000000>;
 219 };
 220
 221 &main_uart0 {
 222         pinctrl-names = "default";
 223         pinctrl-0 = <&main_uart0_pins_default>;
 224         status = "okay";
 225         power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
 226 };
 227
 228 &main_sdhci0 {
 229         /delete-property/ power-domains;
 230         /delete-property/ assigned-clocks;
 231         /delete-property/ assigned-clock-parents;
 232         clock-names = "clk_xin";
 233         clocks = <&clk_200mhz>;
 234         ti,driver-strength-ohm = <50>;
 235         non-removable;
 236         bus-width = <8>;
 237 };
 238
 239 &main_sdhci1 {
 240         /delete-property/ power-domains;
 241         /delete-property/ assigned-clocks;
 242         /delete-property/ assigned-clock-parents;
 243         pinctrl-names = "default";
 244         pinctrl-0 = <&main_mmc1_pins_default>;
 245         clock-names = "clk_xin";
 246         clocks = <&clk_200mhz>;
 247         ti,driver-strength-ohm = <50>;
 248 };
 249
 250 &wkup_i2c0 {
 251         u-boot,dm-spl;
 252         tps659413a: tps659413a@48 {
 253                 reg = <0x48>;
 254                 compatible = "ti,tps659413";
 255                 u-boot,dm-spl;
 256                 pinctrl-names = "default";
 257                 pinctrl-0 = <&wkup_i2c0_pins_default>;
 258                 clock-frequency = <400000>;
 259
 260                 regulators: regulators {
 261                         u-boot,dm-spl;
 262                         buck12_reg: buck12 {
 263                                 /*VDD_MPU*/
 264                                 regulator-name = "buck12";
 265                                 regulator-min-microvolt = <800000>;
 266                                 regulator-max-microvolt = <1250000>;
 267                                 regulator-always-on;
 268                                 regulator-boot-on;
 269                                 u-boot,dm-spl;
 270                         };
 271                 };
 272         };
 273 };
 274
 275 &wkup_vtm0 {
 276         vdd-supply-2 = <&buck12_reg>;
 277         u-boot,dm-spl;
 278 };
 279
 280 &usbss0 {
 281         /delete-property/ power-domains;
 282         /delete-property/ assigned-clocks;
 283         /delete-property/ assigned-clock-parents;
 284         clocks = <&clk_19_2mhz>;
 285         clock-names = "usb2_refclk";
 286         pinctrl-names = "default";
 287         pinctrl-0 = <&main_usbss0_pins_default>;
 288         ti,vbus-divider;
 289 };
 290
 291 &main_i2c0 {
 292         pinctrl-names = "default";
 293         pinctrl-0 = <&main_i2c0_pins_default>;
 294         clock-frequency = <400000>;
 295
 296         exp1: gpio@20 {
 297                 compatible = "ti,tca6416";
 298                 reg = <0x20>;
 299                 gpio-controller;
 300                 #gpio-cells = <2>;
 301         };
 302
 303         exp2: gpio@22 {
 304                 compatible = "ti,tca6424";
 305                 reg = <0x22>;
 306                 gpio-controller;
 307                 #gpio-cells = <2>;
 308         };
 309 };
 310
 311 &ospi0 {
 312         pinctrl-names = "default";
 313         pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
 314
 315         reg = <0x0 0x47040000 0x0 0x100>,
 316               <0x0 0x50000000 0x0 0x8000000>;
 317
 318         flash@0{
 319                 compatible = "jedec,spi-nor";
 320                 reg = <0x0>;
 321                 spi-tx-bus-width = <1>;
 322                 spi-rx-bus-width = <8>;
 323                 spi-max-frequency = <50000000>;
 324                 cdns,tshsl-ns = <60>;
 325                 cdns,tsd2d-ns = <60>;
 326                 cdns,tchsh-ns = <60>;
 327                 cdns,tslch-ns = <60>;
 328                 cdns,read-delay = <0>;
 329                 #address-cells = <1>;
 330                 #size-cells = <1>;
 331         };
 332 };
 333
 334 &ospi1 {
 335         pinctrl-names = "default";
 336         pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
 337         u-boot,dm-spl;
 338
 339         reg = <0x0 0x47050000 0x0 0x100>,
 340               <0x0 0x58000000 0x0 0x8000000>;
 341
 342         flash@0{
 343                 compatible = "jedec,spi-nor";
 344                 reg = <0x0>;
 345                 spi-tx-bus-width = <1>;
 346                 spi-rx-bus-width = <4>;
 347                 spi-max-frequency = <40000000>;
 348                 cdns,tshsl-ns = <60>;
 349                 cdns,tsd2d-ns = <60>;
 350                 cdns,tchsh-ns = <60>;
 351                 cdns,tslch-ns = <60>;
 352                 cdns,read-delay = <2>;
 353                 #address-cells = <1>;
 354                 #size-cells = <1>;
 355                 u-boot,dm-spl;
 356         };
 357 };
 358
 359 &mcu_ringacc {
 360         ti,sci = <&dm_tifs>;
 361 };
 362
 363 &mcu_udmap {
 364         ti,sci = <&dm_tifs>;
 365 };