arch/arm/dts/k3-j7200-r5-common-proc-board.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "k3-j7200-som-p0.dtsi"
   9 #include "k3-j7200-ddr-evm-lp4-2666.dtsi"
  10 #include "k3-j721e-ddr.dtsi"
  11
  12 / {
  13         aliases {
  14                 remoteproc0 = &sysctrler;
  15                 remoteproc1 = &a72_0;
  16         };
  17
  18         chosen {
  19                 stdout-path = &main_uart0;
  20                 tick-timer = &timer1;
  21                 firmware-loader = &fs_loader0;
  22         };
  23
  24         fs_loader0: fs_loader@0 {
  25                 u-boot,dm-pre-reloc;
  26                 compatible = "u-boot,fs-loader";
  27         };
  28
  29         a72_0: a72@0 {
  30                 compatible = "ti,am654-rproc";
  31                 reg = <0x0 0x00a90000 0x0 0x10>;
  32                 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
  33                                 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
  34                 resets = <&k3_reset 202 0>;
  35                 clocks = <&k3_clks 61 1>;
  36                 assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
  37                 assigned-clock-rates = <2000000000>, <200000000>;
  38                 ti,sci = <&dmsc>;
  39                 ti,sci-proc-id = <32>;
  40                 ti,sci-host-id = <10>;
  41                 u-boot,dm-spl;
  42         };
  43
  44         clk_200mhz: dummy_clock_200mhz {
  45                 compatible = "fixed-clock";
  46                 #clock-cells = <0>;
  47                 clock-frequency = <200000000>;
  48                 u-boot,dm-spl;
  49         };
  50
  51         clk_19_2mhz: dummy_clock_19_2mhz {
  52                 compatible = "fixed-clock";
  53                 #clock-cells = <0>;
  54                 clock-frequency = <19200000>;
  55                 u-boot,dm-spl;
  56         };
  57 };
  58
  59 &memorycontroller {
  60         power-domains = <&k3_pds 8 TI_SCI_PD_SHARED>,
  61                         <&k3_pds 90 TI_SCI_PD_SHARED>;
  62         clocks = <&k3_clks 8 5>, <&k3_clks 30 9>;
  63 };
  64
  65 &cbass_mcu_wakeup {
  66         mcu_secproxy: secproxy@2a380000 {
  67                 u-boot,dm-spl;
  68                 compatible = "ti,am654-secure-proxy";
  69                 reg = <0x0 0x2a380000 0x0 0x80000>,
  70                       <0x0 0x2a400000 0x0 0x80000>,
  71                       <0x0 0x2a480000 0x0 0x80000>;
  72                 reg-names = "rt", "scfg", "target_data";
  73                 #mbox-cells = <1>;
  74         };
  75
  76         sysctrler: sysctrler {
  77                 u-boot,dm-spl;
  78                 compatible = "ti,am654-system-controller";
  79                 mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
  80                 mbox-names = "tx", "rx";
  81         };
  82
  83         dm_tifs: dm-tifs {
  84                 compatible = "ti,j721e-dm-sci";
  85                 ti,host-id = <3>;
  86                 ti,secure-host;
  87                 mbox-names = "rx", "tx";
  88                 mboxes= <&mcu_secproxy 21>,
  89                         <&mcu_secproxy 23>;
  90                 u-boot,dm-spl;
  91         };
  92
  93         wkup_vtm0: vtm@42040000 {
  94                 compatible = "ti,am654-vtm", "ti,j721e-avs";
  95                 reg = <0x0 0x42040000 0x0 0x330>;
  96                 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
  97                 #thermal-sensor-cells = <1>;
  98         };
  99 };
 100
 101 &dmsc {
 102         mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
 103         mbox-names = "tx", "rx", "notify";
 104         ti,host-id = <4>;
 105         ti,secure-host;
 106 };
 107
 108 &wkup_pmx0 {
 109         u-boot,dm-spl;
 110         wkup_uart0_pins_default: wkup_uart0_pins_default {
 111                 u-boot,dm-spl;
 112                 pinctrl-single,pins = <
 113                         J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */
 114                         J721E_WKUP_IOPAD(0xb4, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */
 115                 >;
 116         };
 117
 118         mcu_uart0_pins_default: mcu_uart0_pins_default {
 119                 u-boot,dm-spl;
 120                 pinctrl-single,pins = <
 121                         J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 0) /* (D20) WKUP_GPIO0_13.MCU_UART0_RXD */
 122                         J721E_WKUP_IOPAD(0xf0, PIN_OUTPUT, 0) /* (D19) WKUP_GPIO0_12.MCU_UART0_TXD */
 123                         J721E_WKUP_IOPAD(0xf8, PIN_INPUT, 0) /* (E20) WKUP_GPIO0_14.MCU_UART0_CTSn */
 124                         J721E_WKUP_IOPAD(0xfc, PIN_OUTPUT, 0) /* (E21) WKUP_GPIO0_15.MCU_UART0_RTSn */
 125                 >;
 126         };
 127
 128         wkup_i2c0_pins_default: wkup-i2c0-pins-default {
 129                 pinctrl-single,pins = <
 130                         J721E_WKUP_IOPAD(0x100, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */
 131                         J721E_WKUP_IOPAD(0x104, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */
 132                 >;
 133         };
 134
 135         mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default {
 136                 pinctrl-single,pins = <
 137                         J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (E20) MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */
 138                         J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C21) MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */
 139                         J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* (F19) MCU_OSPI0_CSn0.MCU_HYPERBUS0_CSn0 */
 140                         J721E_WKUP_IOPAD(0x54, PIN_OUTPUT, 3) /* (E22) MCU_OSPI1_CSn1.MCU_HYPERBUS0_CSn1 */
 141                         J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* (E19) MCU_OSPI0_CSn1.MCU_HYPERBUS0_RESETn */
 142                         J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* (D21) MCU_OSPI0_DQS.MCU_HYPERBUS0_RWDS */
 143                         J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* (D20) MCU_OSPI0_D0.MCU_HYPERBUS0_DQ0 */
 144                         J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* (G19) MCU_OSPI0_D1.MCU_HYPERBUS0_DQ1 */
 145                         J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* (G20) MCU_OSPI0_D2.MCU_HYPERBUS0_DQ2 */
 146                         J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (F20) MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */
 147                         J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* (F21) MCU_OSPI0_D4.MCU_HYPERBUS0_DQ4 */
 148                         J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (E21) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */
 149                         J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (B22) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */
 150                         J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
 151                 >;
 152         };
 153
 154         wkup_gpio_pins_default: wkup-gpio-pins-default {
 155                 pinctrl-single,pins = <
 156                         J721E_WKUP_IOPAD(0xd8, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */
 157                 >;
 158         };
 159 };
 160
 161 &main_pmx0 {
 162         u-boot,dm-spl;
 163
 164         main_uart0_pins_default: main_uart0_pins_default {
 165                 u-boot,dm-spl;
 166                 pinctrl-single,pins = <
 167                         J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
 168                         J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
 169                         J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
 170                         J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
 171                 >;
 172         };
 173
 174         main_i2c0_pins_default: main-i2c0-pins-default {
 175                 u-boot,dm-spl;
 176                 pinctrl-single,pins = <
 177                         J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
 178                         J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
 179                 >;
 180         };
 181
 182         main_mmc1_pins_default: main_mmc1_pins_default {
 183                 pinctrl-single,pins = <
 184                         J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
 185                         J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
 186                         J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
 187                         J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
 188                         J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
 189                         J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
 190                         J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
 191                         J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
 192                 >;
 193         };
 194
 195         main_usbss0_pins_default: main_usbss0_pins_default {
 196                 pinctrl-single,pins = <
 197                         J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
 198                 >;
 199         };
 200 };
 201
 202 &wkup_uart0 {
 203         u-boot,dm-spl;
 204         pinctrl-names = "default";
 205         pinctrl-0 = <&wkup_uart0_pins_default>;
 206         status = "okay";
 207 };
 208
 209 &mcu_uart0 {
 210         /delete-property/ power-domains;
 211         /delete-property/ clocks;
 212         /delete-property/ clock-names;
 213         pinctrl-names = "default";
 214         pinctrl-0 = <&mcu_uart0_pins_default>;
 215         status = "okay";
 216         clock-frequency = <96000000>;
 217 };
 218
 219 &main_uart0 {
 220         status = "okay";
 221         power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
 222         pinctrl-names = "default";
 223         pinctrl-0 = <&main_uart0_pins_default>;
 224         status = "okay";
 225 };
 226
 227 &main_sdhci0 {
 228         /delete-property/ power-domains;
 229         /delete-property/ assigned-clocks;
 230         /delete-property/ assigned-clock-parents;
 231         pinctrl-0 = <&main_mmc1_pins_default>;
 232         pinctrl-names = "default";
 233         clock-names = "clk_xin";
 234         clocks = <&clk_200mhz>;
 235         ti,driver-strength-ohm = <50>;
 236         non-removable;
 237         bus-width = <8>;
 238 };
 239
 240 &main_sdhci1 {
 241         /delete-property/ power-domains;
 242         /delete-property/ assigned-clocks;
 243         /delete-property/ assigned-clock-parents;
 244         clock-names = "clk_xin";
 245         clocks = <&clk_200mhz>;
 246         ti,driver-strength-ohm = <50>;
 247 };
 248
 249 &wkup_i2c0 {
 250         u-boot,dm-spl;
 251         lp876441: lp876441@4c {
 252                 compatible = "ti,lp876441";
 253                 reg = <0x4c>;
 254                 u-boot,dm-spl;
 255                 pinctrl-names = "default";
 256                 pinctrl-0 = <&wkup_i2c0_pins_default>;
 257                 clock-frequency = <400000>;
 258
 259                 regulators: regulators {
 260                         u-boot,dm-spl;
 261                         buck1_reg: buck1 {
 262                                 /*VDD_CPU_AVS_REG*/
 263                                 regulator-name = "buck1";
 264                                 regulator-min-microvolt = <800000>;
 265                                 regulator-max-microvolt = <1250000>;
 266                                 regulator-always-on;
 267                                 regulator-boot-on;
 268                                 u-boot,dm-spl;
 269                         };
 270                 };
 271         };
 272
 273 };
 274
 275 &wkup_vtm0 {
 276         vdd-supply-2 = <&buck1_reg>;
 277         u-boot,dm-spl;
 278 };
 279
 280 &main_i2c0 {
 281         pinctrl-names = "default";
 282         pinctrl-0 = <&main_i2c0_pins_default>;
 283         clock-frequency = <400000>;
 284
 285         exp1: gpio@20 {
 286                 compatible = "ti,tca6416";
 287                 reg = <0x20>;
 288                 gpio-controller;
 289                 #gpio-cells = <2>;
 290         };
 291
 292         exp2: gpio@22 {
 293                 compatible = "ti,tca6424";
 294                 reg = <0x22>;
 295                 gpio-controller;
 296                 #gpio-cells = <2>;
 297         };
 298 };
 299
 300 &usbss0 {
 301         pinctrl-names = "default";
 302         pinctrl-0 = <&main_usbss0_pins_default>;
 303         ti,vbus-divider;
 304         ti,usb2-only;
 305 };
 306
 307 &usb0 {
 308         dr_mode = "otg";
 309         maximum-speed = "high-speed";
 310 };
 311
 312 &hbmc {
 313         status = "okay";
 314         pinctrl-names = "default";
 315         pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
 316         reg = <0x0 0x47040000 0x0 0x100>,
 317               <0x0 0x50000000 0x0 0x8000000>;
 318         ranges = <0x0 0x0 0x0 0x50000000 0x4000000>, /* 64MB Flash on CS0 */
 319                  <0x1 0x0 0x0 0x54000000 0x800000>; /* 8MB flash on CS1 */
 320
 321         flash@0,0 {
 322                 compatible = "cypress,hyperflash", "cfi-flash";
 323                 reg = <0x0 0x0 0x4000000>;
 324         };
 325 };
 326
 327 &mcu_ringacc {
 328         ti,sci = <&dm_tifs>;
 329 };
 330
 331 &mcu_udmap {
 332         ti,sci = <&dm_tifs>;
 333 };
 334 #include "k3-j7200-common-proc-board-u-boot.dtsi"