spi: zynqmp_gqspi: fix set_speed bug on multiple runs
[platform/kernel/u-boot.git] / arch / arm / dts / k3-j7200-common-proc-board.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
4  */
5
6 /dts-v1/;
7
8 #include <dt-bindings/net/ti-dp83867.h>
9 #include "k3-j7200-som-p0.dtsi"
10
11 / {
12         chosen {
13                 stdout-path = "serial2:115200n8";
14                 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
15         };
16
17         aliases {
18                 remoteproc0 = &mcu_r5fss0_core0;
19                 remoteproc1 = &mcu_r5fss0_core1;
20                 remoteproc2 = &main_r5fss0_core0;
21                 remoteproc3 = &main_r5fss0_core1;
22         };
23 };
24
25 &wkup_pmx0 {
26         wkup_i2c0_pins_default: wkup-i2c0-pins-default {
27                 pinctrl-single,pins = <
28                         J721E_WKUP_IOPAD(0x100, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */
29                         J721E_WKUP_IOPAD(0x104, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */
30                 >;
31         };
32
33         wkup_gpio_pins_default: wkup-gpio-pins-default {
34                 pinctrl-single,pins = <
35                         J721E_WKUP_IOPAD(0xd8, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */
36                 >;
37         };
38
39         mcu_cpsw_pins_default: mcu_cpsw_pins_default {
40                 pinctrl-single,pins = <
41                         J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
42                         J721E_WKUP_IOPAD(0x006c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
43                         J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
44                         J721E_WKUP_IOPAD(0x0074, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
45                         J721E_WKUP_IOPAD(0x0078, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
46                         J721E_WKUP_IOPAD(0x007c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
47                         J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
48                         J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
49                         J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
50                         J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
51                         J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_TXC */
52                         J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
53                 >;
54         };
55
56         mcu_mdio_pins_default: mcu_mdio1_pins_default {
57                 pinctrl-single,pins = <
58                         J721E_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
59                         J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
60                 >;
61         };
62 };
63
64 &main_pmx0 {
65         main_i2c0_pins_default: main-i2c0-pins-default {
66                 pinctrl-single,pins = <
67                         J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
68                         J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
69                 >;
70         };
71
72         main_usbss0_pins_default: main_usbss0_pins_default {
73                 pinctrl-single,pins = <
74                         J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
75                 >;
76         };
77 };
78
79 &wkup_uart0 {
80         /* Wakeup UART is used by System firmware */
81         status = "disabled";
82 };
83
84 &main_uart0 {
85         power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
86 };
87
88 &main_uart2 {
89         /* MAIN UART 2 is used by R5F firmware */
90         status = "disabled";
91 };
92
93 &main_uart3 {
94         /* UART not brought out */
95         status = "disabled";
96 };
97
98 &main_uart4 {
99         /* UART not brought out */
100         status = "disabled";
101 };
102
103 &main_uart5 {
104         /* UART not brought out */
105         status = "disabled";
106 };
107
108 &main_uart6 {
109         /* UART not brought out */
110         status = "disabled";
111 };
112
113 &main_uart7 {
114         /* UART not brought out */
115         status = "disabled";
116 };
117
118 &main_uart8 {
119         /* UART not brought out */
120         status = "disabled";
121 };
122
123 &main_uart9 {
124         /* UART not brought out */
125         status = "disabled";
126 };
127
128 &wkup_i2c0 {
129         pinctrl-names = "default";
130         pinctrl-0 = <&wkup_i2c0_pins_default>;
131         clock-frequency = <400000>;
132 };
133
134 &main_sdhci0 {
135         /* eMMC */
136         non-removable;
137         ti,driver-strength-ohm = <50>;
138         disable-wp;
139 };
140
141 &main_sdhci1 {
142         /* SD card */
143         ti,driver-strength-ohm = <50>;
144         disable-wp;
145         no-1-8-v;
146         sdhci-caps-mask = <0x8000000F 0x0>;
147 };
148
149 &main_i2c0 {
150         pinctrl-names = "default";
151         pinctrl-0 = <&main_i2c0_pins_default>;
152         clock-frequency = <400000>;
153
154         exp1: gpio@20 {
155                 compatible = "ti,tca6416";
156                 reg = <0x20>;
157                 gpio-controller;
158                 #gpio-cells = <2>;
159         };
160
161         exp2: gpio@22 {
162                 compatible = "ti,tca6424";
163                 reg = <0x22>;
164                 gpio-controller;
165                 #gpio-cells = <2>;
166         };
167 };
168
169 &usbss0 {
170         pinctrl-names = "default";
171         pinctrl-0 = <&main_usbss0_pins_default>;
172         ti,vbus-divider;
173         ti,usb2-only;
174 };
175
176 &usb0 {
177         dr_mode = "otg";
178         maximum-speed = "high-speed";
179 };
180
181 &wkup_gpio0 {
182         pinctrl-names = "default";
183         pinctrl-0 = <&wkup_gpio_pins_default>;
184 };
185
186 &mcu_cpsw {
187         pinctrl-names = "default";
188         pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
189 };
190
191 &davinci_mdio {
192         phy0: ethernet-phy@0 {
193                 reg = <0>;
194                 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
195                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
196         };
197 };
198
199 &cpsw_port1 {
200         phy-mode = "rgmii-rxid";
201         phy-handle = <&phy0>;
202 };