1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include "k3-am642.dtsi"
14 compatible = "ti,am642-evm", "ti,am642";
15 model = "Texas Instruments AM642 EVM";
18 stdout-path = "serial2:115200n8";
19 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
23 device_type = "memory";
25 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
34 secure_ddr: optee@9e800000 {
35 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
41 evm_12v0: fixedregulator-evm12v0 {
43 compatible = "regulator-fixed";
44 regulator-name = "evm_12v0";
45 regulator-min-microvolt = <12000000>;
46 regulator-max-microvolt = <12000000>;
51 vsys_5v0: fixedregulator-vsys5v0 {
52 /* output of LM5140 */
53 compatible = "regulator-fixed";
54 regulator-name = "vsys_5v0";
55 regulator-min-microvolt = <5000000>;
56 regulator-max-microvolt = <5000000>;
57 vin-supply = <&evm_12v0>;
62 vsys_3v3: fixedregulator-vsys3v3 {
63 /* output of LM5140 */
64 compatible = "regulator-fixed";
65 regulator-name = "vsys_3v3";
66 regulator-min-microvolt = <3300000>;
67 regulator-max-microvolt = <3300000>;
68 vin-supply = <&evm_12v0>;
73 vdd_mmc1: fixed-regulator-sd {
75 compatible = "regulator-fixed";
76 regulator-name = "vdd_mmc1";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
81 vin-supply = <&vsys_3v3>;
82 gpio = <&exp1 6 GPIO_ACTIVE_HIGH>;
85 vddb: fixedregulator-vddb {
86 compatible = "regulator-fixed";
87 regulator-name = "vddb_3v3_display";
88 regulator-min-microvolt = <3300000>;
89 regulator-max-microvolt = <3300000>;
90 vin-supply = <&vsys_3v3>;
96 compatible = "gpio-leds";
99 label = "am64-evm:red:heartbeat";
100 gpios = <&exp1 16 GPIO_ACTIVE_HIGH>;
101 linux,default-trigger = "heartbeat";
102 function = LED_FUNCTION_HEARTBEAT;
103 default-state = "off";
107 mdio_mux: mux-controller {
108 compatible = "gpio-mux";
109 #mux-control-cells = <0>;
111 mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>;
115 compatible = "mdio-mux-multiplexer";
116 mux-controls = <&mdio_mux>;
117 mdio-parent-bus = <&cpsw3g_mdio>;
118 #address-cells = <1>;
123 #address-cells = <1>;
126 cpsw3g_phy3: ethernet-phy@3 {
134 main_mmc1_pins_default: main-mmc1-pins-default {
135 pinctrl-single,pins = <
136 AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
137 AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
138 AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
139 AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
140 AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
141 AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
142 AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
143 AM64X_IOPAD(0x029c, PIN_INPUT, 0) /* (C20) MMC1_SDWP */
144 AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */
148 main_uart0_pins_default: main-uart0-pins-default {
149 pinctrl-single,pins = <
150 AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
151 AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
152 AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
153 AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
157 main_i2c1_pins_default: main-i2c1-pins-default {
158 pinctrl-single,pins = <
159 AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
160 AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
164 mdio1_pins_default: mdio1-pins-default {
165 pinctrl-single,pins = <
166 AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
167 AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
171 rgmii1_pins_default: rgmii1-pins-default {
172 pinctrl-single,pins = <
173 AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
174 AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
175 AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */
176 AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
177 AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */
178 AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */
179 AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
180 AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
181 AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
182 AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
183 AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
184 AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
188 rgmii2_pins_default: rgmii2-pins-default {
189 pinctrl-single,pins = <
190 AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
191 AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
192 AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
193 AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
194 AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
195 AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
196 AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
197 AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
198 AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
199 AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
200 AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
201 AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
205 main_usb0_pins_default: main-usb0-pins-default {
206 pinctrl-single,pins = <
207 AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
213 pinctrl-names = "default";
214 pinctrl-0 = <&main_uart0_pins_default>;
217 /* main_uart1 is reserved for firmware usage */
251 pinctrl-names = "default";
252 pinctrl-0 = <&main_i2c1_pins_default>;
253 clock-frequency = <400000>;
256 compatible = "ti,tca6424";
260 gpio-line-names = "GPIO_eMMC_RSTn", "CAN_MUX_SEL",
261 "GPIO_CPSW1_RST", "GPIO_RGMII1_RST",
262 "GPIO_RGMII2_RST", "GPIO_PCIe_RST_OUT",
263 "MMC1_SD_EN", "FSI_FET_SEL",
264 "MCAN0_STB_3V3", "MCAN1_STB_3V3",
265 "CPSW_FET_SEL", "CPSW_FET2_SEL",
266 "PRG1_RGMII2_FET_SEL", "TEST_GPIO2",
267 "GPIO_OLED_RESETn", "VPP_LDO_EN",
268 "TEST_LED1", "TP92", "TP90", "TP88",
269 "TP87", "TP86", "TP89", "TP91";
272 /* osd9616p0899-10 */
274 compatible = "solomon,ssd1306fb-i2c";
276 reset-gpios = <&exp1 14 GPIO_ACTIVE_LOW>;
277 vbat-supply = <&vddb>;
278 solomon,height = <16>;
279 solomon,width = <96>;
282 solomon,page-offset = <0>;
283 solomon,prechargep1 = <2>;
284 solomon,prechargep2 = <13>;
305 pinctrl-names = "default";
306 pinctrl-0 = <&mdio1_pins_default
308 &rgmii2_pins_default>;
312 phy-mode = "rgmii-rxid";
313 phy-handle = <&cpsw3g_phy0>;
317 phy-mode = "rgmii-rxid";
318 phy-handle = <&cpsw3g_phy3>;
322 cpsw3g_phy0: ethernet-phy@0 {
324 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
325 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
333 ti,driver-strength-ohm = <50>;
339 vmmc-supply = <&vdd_mmc1>;
340 pinctrl-names = "default";
342 pinctrl-0 = <&main_mmc1_pins_default>;
343 ti,driver-strength-ohm = <50>;
354 maximum-speed = "high-speed";
355 pinctrl-names = "default";
356 pinctrl-0 = <&main_usb0_pins_default>;