arch/arm/dts/k2hk-evm.dts

   1 /*
   2  * Copyright 2013-2014 Texas Instruments, Inc.
   3  *
   4  * Keystone 2 Kepler/Hawking EVM device tree
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 /dts-v1/;
  11
  12 #include "keystone.dtsi"
  13 #include "k2hk.dtsi"
  14
  15 / {
  16         compatible =  "ti,k2hk-evm","ti,keystone";
  17         model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
  18
  19         soc {
  20                 clocks {
  21                         refclksys: refclksys {
  22                                 #clock-cells = <0>;
  23                                 compatible = "fixed-clock";
  24                                 clock-frequency = <122880000>;
  25                                 clock-output-names = "refclk-sys";
  26                         };
  27
  28                         refclkpass: refclkpass {
  29                                 #clock-cells = <0>;
  30                                 compatible = "fixed-clock";
  31                                 clock-frequency = <122880000>;
  32                                 clock-output-names = "refclk-pass";
  33                         };
  34
  35                         refclkarm: refclkarm {
  36                                 #clock-cells = <0>;
  37                                 compatible = "fixed-clock";
  38                                 clock-frequency = <125000000>;
  39                                 clock-output-names = "refclk-arm";
  40                         };
  41
  42                         refclkddr3a: refclkddr3a {
  43                                 #clock-cells = <0>;
  44                                 compatible = "fixed-clock";
  45                                 clock-frequency = <100000000>;
  46                                 clock-output-names = "refclk-ddr3a";
  47                         };
  48
  49                         refclkddr3b: refclkddr3b {
  50                                 #clock-cells = <0>;
  51                                 compatible = "fixed-clock";
  52                                 clock-frequency = <100000000>;
  53                                 clock-output-names = "refclk-ddr3b";
  54                         };
  55                 };
  56         };
  57
  58         leds {
  59                 compatible = "gpio-leds";
  60                 debug1_1 {
  61                         label = "keystone:green:debug1";
  62                         gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
  63                 };
  64
  65                 debug1_2 {
  66                         label = "keystone:red:debug1";
  67                         gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
  68                 };
  69
  70                 debug2 {
  71                         label = "keystone:blue:debug2";
  72                         gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
  73                 };
  74
  75                 debug3 {
  76                         label = "keystone:blue:debug3";
  77                         gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
  78                 };
  79         };
  80 };
  81
  82 &usb_phy {
  83         status = "okay";
  84 };
  85
  86 &usb {
  87         status = "okay";
  88 };
  89
  90 &aemif {
  91         cs0 {
  92                 #address-cells = <2>;
  93                 #size-cells = <1>;
  94                 clock-ranges;
  95                 ranges;
  96
  97                 ti,cs-chipselect = <0>;
  98                 /* all timings in nanoseconds */
  99                 ti,cs-min-turnaround-ns = <12>;
 100                 ti,cs-read-hold-ns = <6>;
 101                 ti,cs-read-strobe-ns = <23>;
 102                 ti,cs-read-setup-ns = <9>;
 103                 ti,cs-write-hold-ns = <8>;
 104                 ti,cs-write-strobe-ns = <23>;
 105                 ti,cs-write-setup-ns = <8>;
 106
 107                 nand@0,0 {
 108                         compatible = "ti,keystone-nand","ti,davinci-nand";
 109                         #address-cells = <1>;
 110                         #size-cells = <1>;
 111                         reg = <0 0 0x4000000
 112                                1 0 0x0000100>;
 113
 114                         ti,davinci-chipselect = <0>;
 115                         ti,davinci-mask-ale = <0x2000>;
 116                         ti,davinci-mask-cle = <0x4000>;
 117                         ti,davinci-mask-chipsel = <0>;
 118                         nand-ecc-mode = "hw";
 119                         ti,davinci-ecc-bits = <4>;
 120                         nand-on-flash-bbt;
 121
 122                         partition@0 {
 123                                 label = "u-boot";
 124                                 reg = <0x0 0x100000>;
 125                                 read-only;
 126                         };
 127
 128                         partition@100000 {
 129                                 label = "params";
 130                                 reg = <0x100000 0x80000>;
 131                                 read-only;
 132                         };
 133
 134                         partition@180000 {
 135                                 label = "ubifs";
 136                                 reg = <0x180000 0x1fe80000>;
 137                         };
 138                 };
 139         };
 140 };
 141
 142 &i2c0 {
 143         dtt@50 {
 144                 compatible = "at,24c1024";
 145                 reg = <0x50>;
 146         };
 147 };
 148
 149 &spi0 {
 150         nor_flash: n25q128a11@0 {
 151                 #address-cells = <1>;
 152                 #size-cells = <1>;
 153                 compatible = "Micron,n25q128a11";
 154                 spi-max-frequency = <54000000>;
 155                 m25p,fast-read;
 156                 reg = <0>;
 157
 158                 partition@0 {
 159                         label = "u-boot-spl";
 160                         reg = <0x0 0x80000>;
 161                         read-only;
 162                 };
 163
 164                 partition@1 {
 165                         label = "misc";
 166                         reg = <0x80000 0xf80000>;
 167                 };
 168         };
 169 };
 170
 171 &mdio {
 172         status = "ok";
 173         ethphy0: ethernet-phy@0 {
 174                 compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
 175                 reg = <0>;
 176         };
 177
 178         ethphy1: ethernet-phy@1 {
 179                 compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
 180                 reg = <1>;
 181         };
 182 };