arch/arm/dts/imx8mm-verdin-u-boot.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
   2 /*
   3  * Copyright 2020 Toradex
   4  */
   5 / {
   6         wdt-reboot {
   7                 compatible = "wdt-reboot";
   8                 wdt = <&wdog1>;
   9                 u-boot,dm-spl;
  10         };
  11 };
  12
  13 &aips1 {
  14         u-boot,dm-spl;
  15         u-boot,dm-pre-reloc;
  16 };
  17
  18 &aips2 {
  19         u-boot,dm-spl;
  20 };
  21
  22 &aips3 {
  23         u-boot,dm-spl;
  24 };
  25
  26 &clk {
  27         u-boot,dm-spl;
  28         u-boot,dm-pre-reloc;
  29         /delete-property/ assigned-clocks;
  30         /delete-property/ assigned-clock-parents;
  31         /delete-property/ assigned-clock-rates;
  32 };
  33
  34 &gpio1 {
  35         u-boot,dm-spl;
  36 };
  37
  38 &gpio2 {
  39         u-boot,dm-spl;
  40 };
  41
  42 &gpio3 {
  43         u-boot,dm-spl;
  44 };
  45
  46 &gpio4 {
  47         u-boot,dm-spl;
  48 };
  49
  50 &gpio5 {
  51         u-boot,dm-spl;
  52 };
  53
  54 &i2c1 {
  55         u-boot,dm-spl;
  56 };
  57
  58 &iomuxc {
  59         u-boot,dm-spl;
  60 };
  61
  62 &osc_24m {
  63         u-boot,dm-spl;
  64         u-boot,dm-pre-reloc;
  65 };
  66
  67 &pinctrl_i2c1 {
  68         u-boot,dm-spl;
  69 };
  70
  71 &pinctrl_pmic {
  72         u-boot,dm-spl;
  73 };
  74
  75 &pinctrl_uart1 {
  76         u-boot,dm-spl;
  77 };
  78
  79 &pinctrl_usdhc1 {
  80         u-boot,dm-spl;
  81 };
  82
  83 &pinctrl_usdhc2 {
  84         u-boot,dm-spl;
  85 };
  86
  87 &{/soc@0} {
  88         u-boot,dm-pre-reloc;
  89         u-boot,dm-spl;
  90 };
  91
  92 &{/soc@0/bus@30800000/i2c@30a20000/pmic} {
  93         u-boot,dm-spl;
  94 };
  95
  96 &{/soc@0/bus@30800000/i2c@30a20000/pmic/regulators} {
  97         u-boot,dm-spl;
  98 };
  99
 100 &uart1 {
 101         u-boot,dm-spl;
 102 };
 103
 104 &usdhc1 {
 105         u-boot,dm-spl;
 106 };
 107
 108 &usdhc2 {
 109         u-boot,dm-spl;
 110 };
 111
 112 &usdhc3 {
 113         u-boot,dm-spl;
 114 };
 115
 116 &wdog1 {
 117         u-boot,dm-spl;
 118 };