arch/arm/dts/imx8mm-cl-iot-gate.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 /dts-v1/;
   7
   8 #include <dt-bindings/usb/pd.h>
   9 #include "imx8mm.dtsi"
  10
  11 / {
  12         model = "CompuLab IOT-GATE-iMX8";
  13         compatible = "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm";
  14
  15         chosen {
  16                 bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200";
  17                 stdout-path = &uart3;
  18         };
  19
  20         reg_vusb_5v: regulator-usdhc2 {
  21                 compatible = "regulator-fixed";
  22                 regulator-name = "VUSB_5V";
  23                 regulator-min-microvolt = <5000000>;
  24                 regulator-max-microvolt = <5000000>;
  25                 gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
  26                 regulator-boot-on;
  27                 enable-active-high;
  28         };
  29
  30         reg_usdhc2_vqmmc: regulator-usdhc2_1v8 {
  31                 compatible = "regulator-fixed";
  32                 regulator-name = "usdhc2_1v8";
  33                 regulator-min-microvolt = <1800000>;
  34                 regulator-max-microvolt = <1800000>;
  35                 regulator-always-on;
  36         };
  37
  38         reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
  39                 compatible = "regulator-fixed";
  40                 regulator-name = "VSD_3V3";
  41                 regulator-min-microvolt = <3300000>;
  42                 regulator-max-microvolt = <3300000>;
  43                 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
  44                 enable-active-high;
  45                 startup-delay-us = <100>;
  46                 off-on-delay-us = <12000>;
  47         };
  48 };
  49
  50 &A53_0 {
  51         cpu-supply = <&buck2_reg>;
  52 };
  53
  54 &fec1 {
  55         pinctrl-names = "default";
  56         pinctrl-0 = <&pinctrl_fec1>;
  57         phy-mode = "rgmii-id";
  58         phy-handle = <&ethphy0>;
  59         fsl,magic-packet;
  60         status = "okay";
  61
  62         mdio {
  63                 #address-cells = <1>;
  64                 #size-cells = <0>;
  65
  66                 ethphy0: ethernet-phy@0 {
  67                         compatible = "ethernet-phy-ieee802.3-c22";
  68                         reg = <0>;
  69                         at803x,led-act-blind-workaround;
  70                         at803x,eee-okay;
  71                         at803x,vddio-1p8v;
  72                 };
  73         };
  74 };
  75
  76 &i2c1 {
  77         clock-frequency = <400000>;
  78         pinctrl-names = "default";
  79         pinctrl-0 = <&pinctrl_i2c1>;
  80         status = "okay";
  81
  82         eeprom@54 {
  83                   compatible = "atmel,24c08";
  84                   reg = <0x54>;
  85                   pagesize = <16>;
  86         };
  87 };
  88
  89 &i2c2 {
  90         clock-frequency = <400000>;
  91         pinctrl-names = "default";
  92         pinctrl-0 = <&pinctrl_i2c2>;
  93         status = "okay";
  94
  95         rtc@69 {
  96                 compatible = "abracon,ab1805";
  97                 reg = <0x69>;
  98                 pagesize = <16>;
  99                 status = "okay";
 100         };
 101
 102         pmic@4b {
 103                 compatible = "rohm,bd71837";
 104                 reg = <0x4b>;
 105                 pinctrl-0 = <&pinctrl_pmic>;
 106                 gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>;
 107                 interrupt-parent = <&gpio1>;
 108                 interrupts = <3 GPIO_ACTIVE_LOW>;
 109
 110                 gpo {
 111                         rohm,drv = <0x0C>;      /* 0b0000_1100 all gpos with cmos output mode */
 112                 };
 113
 114                 regulators {
 115                         bd71837,pmic-buck2-uses-i2c-dvs;
 116                         bd71837,pmic-buck2-dvs-voltage = <1000000>,
 117                                 <900000>,
 118                                 <0>; /* VDD_ARM: Run-Idle */
 119                         buck1_reg: BUCK1 {
 120                                 regulator-name = "BUCK1";
 121                                 regulator-min-microvolt = <700000>;
 122                                 regulator-max-microvolt = <1300000>;
 123                                 regulator-boot-on;
 124                                 regulator-always-on;
 125                                 regulator-ramp-delay = <1250>;
 126                         };
 127
 128                         buck2_reg: BUCK2 {
 129                                 regulator-name = "BUCK2";
 130                                 regulator-min-microvolt = <700000>;
 131                                 regulator-max-microvolt = <1300000>;
 132                                 regulator-boot-on;
 133                                 regulator-always-on;
 134                                 regulator-ramp-delay = <1250>;
 135                         };
 136
 137                         buck3_reg: BUCK3 {
 138                                 regulator-name = "BUCK3";
 139                                 regulator-min-microvolt = <700000>;
 140                                 regulator-max-microvolt = <1350000>;
 141                         };
 142
 143                         buck4_reg: BUCK4 {
 144                                 regulator-name = "BUCK4";
 145                                 regulator-min-microvolt = <700000>;
 146                                 regulator-max-microvolt = <1350000>;
 147                                 regulator-boot-on;
 148                                 regulator-always-on;
 149                         };
 150
 151                         buck5_reg: BUCK5 {
 152                                 regulator-name = "BUCK5";
 153                                 regulator-min-microvolt = <700000>;
 154                                 regulator-max-microvolt = <1350000>;
 155                                 regulator-boot-on;
 156                                 regulator-always-on;
 157                         };
 158
 159                         buck6_reg: BUCK6 {
 160                                 regulator-name = "BUCK6";
 161                                 regulator-min-microvolt = <3000000>;
 162                                 regulator-max-microvolt = <3300000>;
 163                                 regulator-boot-on;
 164                                 regulator-always-on;
 165                         };
 166
 167                         buck7_reg: BUCK7 {
 168                                 regulator-name = "BUCK7";
 169                                 regulator-min-microvolt = <1605000>;
 170                                 regulator-max-microvolt = <1995000>;
 171                                 regulator-boot-on;
 172                                 regulator-always-on;
 173                         };
 174
 175                         buck8_reg: BUCK8 {
 176                                 regulator-name = "BUCK8";
 177                                 regulator-min-microvolt = <800000>;
 178                                 regulator-max-microvolt = <1400000>;
 179                                 regulator-boot-on;
 180                                 regulator-always-on;
 181                         };
 182
 183                         ldo1_reg: LDO1 {
 184                                 regulator-name = "LDO1";
 185                                 regulator-min-microvolt = <3000000>;
 186                                 regulator-max-microvolt = <3300000>;
 187                                 regulator-boot-on;
 188                                 regulator-always-on;
 189                         };
 190
 191                         ldo2_reg: LDO2 {
 192                                 regulator-name = "LDO2";
 193                                 regulator-min-microvolt = <900000>;
 194                                 regulator-max-microvolt = <900000>;
 195                                 regulator-boot-on;
 196                                 regulator-always-on;
 197                         };
 198
 199                         ldo3_reg: LDO3 {
 200                                 regulator-name = "LDO3";
 201                                 regulator-min-microvolt = <1800000>;
 202                                 regulator-max-microvolt = <3300000>;
 203                                 regulator-boot-on;
 204                                 regulator-always-on;
 205                         };
 206
 207                         ldo4_reg: LDO4 {
 208                                 regulator-name = "LDO4";
 209                                 regulator-min-microvolt = <900000>;
 210                                 regulator-max-microvolt = <1800000>;
 211                                 regulator-boot-on;
 212                                 regulator-always-on;
 213                         };
 214
 215                         ldo5_reg: LDO5 {
 216                                 regulator-name = "LDO5";
 217                                 regulator-min-microvolt = <1800000>;
 218                                 regulator-max-microvolt = <3300000>;
 219                                 regulator-boot-on;
 220                                 regulator-always-on;
 221                         };
 222
 223                         ldo6_reg: LDO6 {
 224                                 regulator-name = "LDO6";
 225                                 regulator-min-microvolt = <900000>;
 226                                 regulator-max-microvolt = <1800000>;
 227                                 regulator-boot-on;
 228                                 regulator-always-on;
 229                         };
 230
 231                         ldo7_reg: LDO7 {
 232                                 regulator-name = "LDO7";
 233                                 regulator-min-microvolt = <1800000>;
 234                                 regulator-max-microvolt = <3300000>;
 235                         };
 236                 };
 237         };
 238
 239         ptn5110: tcpc@50 {
 240                 compatible = "nxp,ptn5110";
 241                 pinctrl-names = "default";
 242                 pinctrl-0 = <&pinctrl_typec1>;
 243                 reg = <0x50>;
 244                 interrupt-parent = <&gpio2>;
 245                 interrupts = <11 8>;
 246                 status = "okay";
 247
 248                 port {
 249                         typec1_dr_sw: endpoint {
 250                                 remote-endpoint = <&usb1_drd_sw>;
 251                         };
 252                 };
 253
 254                 typec1_con: connector {
 255                         compatible = "usb-c-connector";
 256                         label = "USB-C";
 257                         power-role = "dual";
 258                         data-role = "dual";
 259                         try-power-role = "sink";
 260                         source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
 261                         sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
 262                                      PDO_VAR(5000, 20000, 3000)>;
 263                         op-sink-microwatt = <15000000>;
 264                         self-powered;
 265                 };
 266         };
 267 };
 268
 269 &i2c3 {
 270         clock-frequency = <400000>;
 271         pinctrl-names = "default";
 272         pinctrl-0 = <&pinctrl_i2c3>;
 273         status = "disabled";
 274 };
 275
 276 &i2c4 {/* Expansion connector I2C */
 277         clock-frequency = <100000>;
 278         pinctrl-names = "default";
 279         pinctrl-0 = <&pinctrl_i2c4>;
 280         status = "okay";
 281
 282         pca9555: gpio@22 {
 283                 compatible = "nxp,pca9555";
 284                 reg = <0x22>;
 285                 gpio-controller;
 286                 #gpio-cells = <2>;
 287         };
 288 };
 289
 290 &snvs_pwrkey {
 291         status = "okay";
 292 };
 293
 294 &uart3 { /* console */
 295         pinctrl-names = "default";
 296         pinctrl-0 = <&pinctrl_uart3>;
 297         status = "okay";
 298 };
 299
 300 &usbotg1 {
 301         dr_mode = "host";
 302         hnp-disable;
 303         srp-disable;
 304         adp-disable;
 305         usb-role-switch;
 306         vbus-supply = <&reg_vusb_5v>;
 307         status = "okay";
 308
 309         port {
 310                 usb1_drd_sw: endpoint {
 311                         remote-endpoint = <&typec1_dr_sw>;
 312                 };
 313         };
 314 };
 315
 316 &usbotg2 {
 317         dr_mode = "host";
 318         status = "okay";
 319 };
 320
 321 &usdhc2 {
 322         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 323         pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
 324         pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
 325         pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
 326         cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
 327         bus-width = <4>;
 328         fsl,wp-controller;
 329         vmmc-supply = <&reg_usdhc2_vmmc>;
 330         no-1-8-v;
 331         mmc-ddr-1_8v;
 332         non-removable;
 333         vqmmc-supply = <&reg_usdhc2_vqmmc>;
 334         status = "okay";
 335 };
 336
 337 &usdhc3 {
 338         pinctrl-names = "default", "state_100mhz";
 339         pinctrl-0 = <&pinctrl_usdhc3>;
 340         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 341         bus-width = <8>;
 342         non-removable;
 343         status = "okay";
 344 };
 345
 346 &wdog1 {
 347         pinctrl-names = "default";
 348         pinctrl-0 = <&pinctrl_wdog>;
 349         fsl,ext-reset-output;
 350         status = "okay";
 351 };
 352
 353 &iomuxc {
 354         pinctrl-names = "default";
 355
 356         pinctrl_hog: hoggrp {
 357                 fsl,pins = <
 358                         /* USB VBUS enable GPIO */
 359                         MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28               0x00
 360                 >;
 361         };
 362
 363         pinctrl_hog_1: hoggrp-1 {
 364                 fsl,pins = <
 365                         MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8               0x19
 366                         MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0               0x140
 367                         MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15              0x140
 368                 >;
 369         };
 370
 371         pinctrl_fec1: fec1grp {
 372                 fsl,pins = <
 373                         MX8MM_IOMUXC_ENET_MDC_ENET1_MDC                 0x3
 374                         MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO               0x3
 375                         MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3           0x1f
 376                         MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2           0x1f
 377                         MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1           0x1f
 378                         MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0           0x1f
 379                         MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3           0x91
 380                         MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2           0x91
 381                         MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1           0x91
 382                         MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0           0x91
 383                         MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC           0x1f
 384                         MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC           0x91
 385                         MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL     0x91
 386                         MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL     0x1f
 387                         MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22                0x19
 388                 >;
 389         };
 390
 391         pinctrl_flexspi0: flexspi0grp {
 392                 fsl,pins = <
 393                         MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK       0x1c4
 394                         MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B    0x84
 395                         MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0   0x84
 396                         MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1   0x84
 397                         MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2   0x84
 398                         MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3   0x84
 399                 >;
 400         };
 401
 402         pinctrl_i2c1: i2c1grp {
 403                 fsl,pins = <
 404                         MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL                  0x400001c3
 405                         MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA                  0x400001c3
 406                 >;
 407         };
 408
 409         pinctrl_i2c2: i2c2grp {
 410                 fsl,pins = <
 411                         MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL                  0x400001c3
 412                         MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA                  0x400001c3
 413                 >;
 414         };
 415
 416         pinctrl_i2c3: i2c3grp {
 417                 fsl,pins = <
 418                         MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL                  0x400001c3
 419                         MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA                  0x400001c3
 420                 >;
 421         };
 422
 423         pinctrl_i2c4: i2c4grp {
 424                 fsl,pins = <
 425                         MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL                  0x400001c3
 426                         MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA                  0x400001c3
 427                 >;
 428         };
 429
 430         pinctrl_pmic: pmicirq {
 431                 fsl,pins = <
 432                         MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x41
 433                 >;
 434         };
 435
 436         pinctrl_typec1: typec1grp {
 437                 fsl,pins = <
 438                         MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11      0x159
 439                 >;
 440         };
 441
 442         pinctrl_uart3: uart1grp {
 443                 fsl,pins = <
 444                         MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX             0x49
 445                         MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX             0x49
 446                 >;
 447         };
 448
 449         pinctrl_uart4: uart4grp {
 450                 fsl,pins = <
 451                         MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B        0x49
 452                         MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX           0x49
 453                         MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B         0x49
 454                         MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX           0x49
 455                 >;
 456         };
 457
 458         pinctrl_usdhc2_gpio: usdhc2grpgpio {
 459                 fsl,pins = <
 460                         MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19     0x41
 461                 >;
 462         };
 463
 464         pinctrl_usdhc2: usdhc2grp {
 465                 fsl,pins = <
 466                         MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x190
 467                         MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d0
 468                         MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d0
 469                         MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d0
 470                         MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d0
 471                         MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d0
 472                         MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
 473                 >;
 474         };
 475
 476         pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
 477                 fsl,pins = <
 478                         MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x194
 479                         MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d4
 480                         MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d4
 481                         MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d4
 482                         MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d4
 483                         MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d4
 484                         MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
 485                 >;
 486         };
 487
 488         pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
 489                 fsl,pins = <
 490                         MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x196
 491                         MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d6
 492                         MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d6
 493                         MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d6
 494                         MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d6
 495                         MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d6
 496                         MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
 497                 >;
 498         };
 499
 500         pinctrl_usdhc3: usdhc3grp {
 501                 fsl,pins = <
 502                         MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK               0x40000190
 503                         MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD               0x1d0
 504                         MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0           0x1d0
 505                         MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1           0x1d0
 506                         MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2           0x1d0
 507                         MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3           0x1d0
 508                         MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4             0x1d0
 509                         MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5            0x1d0
 510                         MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6            0x1d0
 511                         MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7              0x1d0
 512                         MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE           0x190
 513                 >;
 514         };
 515
 516         pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
 517                 fsl,pins = <
 518                         MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK               0x40000194
 519                         MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD               0x1d4
 520                         MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0           0x1d4
 521                         MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1           0x1d4
 522                         MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2           0x1d4
 523                         MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3           0x1d4
 524                         MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4             0x1d4
 525                         MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5            0x1d4
 526                         MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6            0x1d4
 527                         MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7              0x1d4
 528                         MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE           0x194
 529                 >;
 530         };
 531
 532         pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
 533                 fsl,pins = <
 534                         MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK               0x40000196
 535                         MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD               0x1d6
 536                         MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0           0x1d6
 537                         MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1           0x1d6
 538                         MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2           0x1d6
 539                         MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3           0x1d6
 540                         MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4             0x1d6
 541                         MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5            0x1d6
 542                         MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6            0x1d6
 543                         MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7              0x1d6
 544                         MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE           0x196
 545                 >;
 546         };
 547
 548         pinctrl_wdog: wdoggrp {
 549                 fsl,pins = <
 550                         MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B    0xc6
 551                 >;
 552         };
 553 };