arch/arm/dts/imx8mm-beacon-baseboard.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Copyright 2020 Compass Electronics Group, LLC
   4  */
   5
   6 / {
   7         leds {
   8                 compatible = "gpio-leds";
   9
  10                 led0 {
  11                         label = "gen_led0";
  12                         gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
  13                         default-state = "off";
  14                 };
  15
  16                 led1 {
  17                         label = "gen_led1";
  18                         gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
  19                         default-state = "off";
  20                 };
  21
  22                 led2 {
  23                         label = "gen_led2";
  24                         gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
  25                         default-state = "off";
  26                 };
  27
  28                 led3 {
  29                         pinctrl-names = "default";
  30                         pinctrl-0 = <&pinctrl_led3>;
  31                         label = "heartbeat";
  32                         gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
  33                         linux,default-trigger = "heartbeat";
  34                 };
  35         };
  36
  37         reg_audio: regulator-audio {
  38                 compatible = "regulator-fixed";
  39                 regulator-name = "3v3_aud";
  40                 regulator-min-microvolt = <3300000>;
  41                 regulator-max-microvolt = <3300000>;
  42                 gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
  43                 enable-active-high;
  44         };
  45
  46         reg_usbotg1: regulator-usbotg1 {
  47                 compatible = "regulator-fixed";
  48                 pinctrl-names = "default";
  49                 pinctrl-0 = <&pinctrl_reg_usb_otg1>;
  50                 regulator-name = "usb_otg_vbus";
  51                 regulator-min-microvolt = <5000000>;
  52                 regulator-max-microvolt = <5000000>;
  53                 gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  54                 enable-active-high;
  55         };
  56
  57         reg_usdhc2_vmmc: regulator-usdhc2 {
  58                 compatible = "regulator-fixed";
  59                 regulator-name = "VSD_3V3";
  60                 regulator-min-microvolt = <3300000>;
  61                 regulator-max-microvolt = <3300000>;
  62                 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
  63                 enable-active-high;
  64         };
  65
  66         sound {
  67                 compatible = "fsl,imx-audio-wm8962";
  68                 model = "wm8962-audio";
  69                 audio-cpu = <&sai3>;
  70                 audio-codec = <&wm8962>;
  71                 audio-routing =
  72                         "Headphone Jack", "HPOUTL",
  73                         "Headphone Jack", "HPOUTR",
  74                         "Ext Spk", "SPKOUTL",
  75                         "Ext Spk", "SPKOUTR",
  76                         "AMIC", "MICBIAS",
  77                         "IN3R", "AMIC";
  78         };
  79 };
  80
  81 &ecspi2 {
  82         pinctrl-names = "default";
  83         pinctrl-0 = <&pinctrl_espi2>;
  84         cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
  85         status = "okay";
  86
  87         eeprom@0 {
  88                 compatible = "microchip,at25160bn", "atmel,at25";
  89                 reg = <0>;
  90                 spi-max-frequency = <5000000>;
  91                 spi-cpha;
  92                 spi-cpol;
  93                 pagesize = <32>;
  94                 size = <2048>;
  95                 address-width = <16>;
  96         };
  97 };
  98
  99 &i2c2 {
 100         clock-frequency = <400000>;
 101         pinctrl-names = "default";
 102         pinctrl-0 = <&pinctrl_i2c2>;
 103         status = "okay";
 104 };
 105
 106 &i2c4 {
 107         clock-frequency = <400000>;
 108         pinctrl-names = "default";
 109         pinctrl-0 = <&pinctrl_i2c4>;
 110         status = "okay";
 111
 112         wm8962: audio-codec@1a {
 113                 compatible = "wlf,wm8962";
 114                 reg = <0x1a>;
 115                 clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
 116                 DCVDD-supply = <&reg_audio>;
 117                 DBVDD-supply = <&reg_audio>;
 118                 AVDD-supply = <&reg_audio>;
 119                 CPVDD-supply = <&reg_audio>;
 120                 MICVDD-supply = <&reg_audio>;
 121                 PLLVDD-supply = <&reg_audio>;
 122                 SPKVDD1-supply = <&reg_audio>;
 123                 SPKVDD2-supply = <&reg_audio>;
 124                 gpio-cfg = <
 125                         0x0000 /* 0:Default */
 126                         0x0000 /* 1:Default */
 127                         0x0000 /* 2:FN_DMICCLK */
 128                         0x0000 /* 3:Default */
 129                         0x0000 /* 4:FN_DMICCDAT */
 130                         0x0000 /* 5:Default */
 131                 >;
 132         };
 133
 134         pca6416_0: gpio@20 {
 135                 compatible = "nxp,pcal6416";
 136                 reg = <0x20>;
 137                 pinctrl-names = "default";
 138                 pinctrl-0 = <&pinctrl_pcal6414>;
 139                 gpio-controller;
 140                 #gpio-cells = <2>;
 141                 interrupt-parent = <&gpio4>;
 142                 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
 143         };
 144
 145         pca6416_1: gpio@21 {
 146                 compatible = "nxp,pcal6416";
 147                 reg = <0x21>;
 148                 gpio-controller;
 149                 #gpio-cells = <2>;
 150                 interrupt-parent = <&gpio4>;
 151                 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
 152         };
 153 };
 154
 155 &sai3 {
 156         pinctrl-names = "default";
 157         pinctrl-0 = <&pinctrl_sai3>;
 158         assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
 159         assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
 160         assigned-clock-rates = <24576000>;
 161         fsl,sai-mclk-direction-output;
 162         status = "okay";
 163 };
 164
 165 &snvs_pwrkey {
 166         status = "okay";
 167 };
 168
 169 &uart2 { /* console */
 170         pinctrl-names = "default";
 171         pinctrl-0 = <&pinctrl_uart2>;
 172         status = "okay";
 173 };
 174
 175 &uart3 {
 176         pinctrl-names = "default";
 177         pinctrl-0 = <&pinctrl_uart3>;
 178         assigned-clocks = <&clk IMX8MM_CLK_UART3>;
 179         assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
 180         status = "okay";
 181 };
 182
 183 &usbotg1 {
 184         vbus-supply = <&reg_usbotg1>;
 185         disable-over-current;
 186         dr_mode="otg";
 187         status = "okay";
 188 };
 189
 190 &usbotg2 {
 191         pinctrl-names = "default";
 192         disable-over-current;
 193         dr_mode="host";
 194         status = "okay";
 195 };
 196
 197 &usbphynop2 {
 198         reset-gpios = <&pca6416_1 7 GPIO_ACTIVE_HIGH>;
 199 };
 200
 201 &usdhc2 {
 202         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 203         pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
 204         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
 205         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
 206         bus-width = <4>;
 207         vmmc-supply = <&reg_usdhc2_vmmc>;
 208         status = "okay";
 209 };
 210
 211 &iomuxc {
 212         pinctrl_espi2: espi2grp {
 213                 fsl,pins = <
 214                         MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK            0x82
 215                         MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI            0x82
 216                         MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO            0x82
 217                         MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9               0x41
 218                 >;
 219         };
 220
 221         pinctrl_i2c2: i2c2grp {
 222                 fsl,pins = <
 223                         MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
 224                         MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA          0x400001c3
 225                 >;
 226         };
 227
 228         pinctrl_i2c4: i2c4grp {
 229                 fsl,pins = <
 230                         MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
 231                         MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA          0x400001c3
 232                 >;
 233         };
 234
 235         pinctrl_led3: led3grp {
 236                 fsl,pins = <
 237                         MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28       0x41
 238                 >;
 239         };
 240
 241         pinctrl_pcal6414: pcal6414-gpiogrp {
 242                 fsl,pins = <
 243                         MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27               0x19
 244                 >;
 245         };
 246
 247         pinctrl_reg_usb_otg1: usbotg1grp {
 248                 fsl,pins = <
 249                         MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29     0x19
 250                 >;
 251         };
 252
 253         pinctrl_sai3: sai3grp {
 254                 fsl,pins = <
 255                         MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6
 256                         MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6
 257                         MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6
 258                         MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6
 259                         MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0     0xd6
 260                 >;
 261         };
 262
 263         pinctrl_uart2: uart2grp {
 264                 fsl,pins = <
 265                         MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
 266                         MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
 267                 >;
 268         };
 269
 270         pinctrl_uart3: uart3grp {
 271                 fsl,pins = <
 272                         MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX   0x40
 273                         MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX   0x40
 274                 >;
 275         };
 276
 277         pinctrl_usdhc2_gpio: usdhc2gpiogrp {
 278                 fsl,pins = <
 279                         MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B       0x41
 280                         MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19     0x41
 281                 >;
 282         };
 283
 284         pinctrl_usdhc2: usdhc2grp {
 285                 fsl,pins = <
 286                         MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
 287                         MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
 288                         MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d0
 289                         MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d0
 290                         MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d0
 291                         MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d0
 292                         MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
 293                 >;
 294         };
 295
 296         pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
 297                 fsl,pins = <
 298                         MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
 299                         MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
 300                         MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d4
 301                         MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d4
 302                         MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d4
 303                         MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d4
 304                         MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
 305                 >;
 306         };
 307
 308         pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
 309                 fsl,pins = <
 310                         MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
 311                         MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
 312                         MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d6
 313                         MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d6
 314                         MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d6
 315                         MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d6
 316                         MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
 317                 >;
 318         };
 319 };