1 // SPDX-License-Identifier: GPL-2.0
4 // Author: Fabio Estevam <fabio.estevam@nxp.com>
8 #include "imx7ulp.dtsi"
11 model = "Embedded Artists i.MX7ULP COM";
12 compatible = "ea,imx7ulp-com", "fsl,imx7ulp";
15 stdout-path = &lpuart4;
19 device_type = "memory";
20 reg = <0x60000000 0x8000000>;
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_lpuart4>;
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_usbotg1_id>;
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_usdhc0>;
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_hog_1>;
56 pinctrl_hog_1: hoggrp-1 {
58 IMX7ULP_PAD_PTC1__PTC1 0x20000
62 pinctrl_lpuart4: lpuart4grp {
64 IMX7ULP_PAD_PTC3__LPUART4_RX 0x3
65 IMX7ULP_PAD_PTC2__LPUART4_TX 0x3
69 pinctrl_usdhc0: usdhc0grp {
71 IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43
72 IMX7ULP_PAD_PTD2__SDHC0_CLK 0x10042
73 IMX7ULP_PAD_PTD3__SDHC0_D7 0x43
74 IMX7ULP_PAD_PTD4__SDHC0_D6 0x43
75 IMX7ULP_PAD_PTD5__SDHC0_D5 0x43
76 IMX7ULP_PAD_PTD6__SDHC0_D4 0x43
77 IMX7ULP_PAD_PTD7__SDHC0_D3 0x43
78 IMX7ULP_PAD_PTD8__SDHC0_D2 0x43
79 IMX7ULP_PAD_PTD9__SDHC0_D1 0x43
80 IMX7ULP_PAD_PTD10__SDHC0_D0 0x43
81 IMX7ULP_PAD_PTD11__SDHC0_DQS 0x42
85 pinctrl_usbotg1_id: otg1idgrp {
87 IMX7ULP_PAD_PTC13__USB0_ID 0x10003