2 * Copyright 2015 Freescale Semiconductor, Inc.
3 * Copyright 2016 Toradex AG
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/clock/imx7d-clock.h>
45 #include <dt-bindings/power/imx7-power.h>
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include "imx7d-pinfunc.h"
55 * The decompressor and also some bootloaders rely on a
56 * pre-existing /chosen node to be available to insert the
57 * command line and merge other ATAGS info.
58 * Also for U-Boot there must be a pre-existing /memory node.
61 memory { device_type = "memory"; };
98 compatible = "arm,cortex-a7";
101 clock-frequency = <792000000>;
102 clock-latency = <61036>; /* two CLK32 periods */
103 clocks = <&clks IMX7D_CLK_ARM>;
108 compatible = "fixed-clock";
110 clock-frequency = <32768>;
111 clock-output-names = "ckil";
115 compatible = "fixed-clock";
117 clock-frequency = <24000000>;
118 clock-output-names = "osc";
121 usbphynop1: usbphynop1 {
122 compatible = "usb-nop-xceiv";
123 clocks = <&clks IMX7D_USB_PHY1_CLK>;
124 clock-names = "main_clk";
128 usbphynop3: usbphynop3 {
129 compatible = "usb-nop-xceiv";
130 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
131 clock-names = "main_clk";
136 compatible = "arm,cortex-a7-pmu";
137 interrupt-parent = <&gpc>;
138 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
139 interrupt-affinity = <&cpu0>;
144 * non-configurable replicators don't show up on the
145 * AMBA bus. As such no need to add "arm,primecell"
147 compatible = "arm,coresight-replicator";
150 #address-cells = <1>;
152 /* replicator output ports */
155 replicator_out_port0: endpoint {
156 remote-endpoint = <&tpiu_in_port>;
162 replicator_out_port1: endpoint {
163 remote-endpoint = <&etr_in_port>;
167 /* replicator input port */
170 replicator_in_port0: endpoint {
172 remote-endpoint = <&etf_out_port>;
179 compatible = "arm,armv7-timer";
180 interrupt-parent = <&intc>;
181 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
182 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
183 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
184 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
188 #address-cells = <1>;
190 compatible = "simple-bus";
191 interrupt-parent = <&gpc>;
195 compatible = "arm,coresight-funnel", "arm,primecell";
196 reg = <0x30041000 0x1000>;
197 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
198 clock-names = "apb_pclk";
200 ca_funnel_ports: ports {
201 #address-cells = <1>;
204 /* funnel input ports */
207 ca_funnel_in_port0: endpoint {
209 remote-endpoint = <&etm0_out_port>;
213 /* funnel output port */
216 ca_funnel_out_port0: endpoint {
217 remote-endpoint = <&hugo_funnel_in_port0>;
221 /* the other input ports are not connect to anything */
226 compatible = "arm,coresight-etm3x", "arm,primecell";
227 reg = <0x3007c000 0x1000>;
229 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
230 clock-names = "apb_pclk";
233 etm0_out_port: endpoint {
234 remote-endpoint = <&ca_funnel_in_port0>;
240 compatible = "arm,coresight-funnel", "arm,primecell";
241 reg = <0x30083000 0x1000>;
242 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
243 clock-names = "apb_pclk";
246 #address-cells = <1>;
249 /* funnel input ports */
252 hugo_funnel_in_port0: endpoint {
254 remote-endpoint = <&ca_funnel_out_port0>;
260 hugo_funnel_in_port1: endpoint {
261 slave-mode; /* M4 input */
267 hugo_funnel_out_port0: endpoint {
268 remote-endpoint = <&etf_in_port>;
272 /* the other input ports are not connect to anything */
277 compatible = "arm,coresight-tmc", "arm,primecell";
278 reg = <0x30084000 0x1000>;
279 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
280 clock-names = "apb_pclk";
283 #address-cells = <1>;
288 etf_in_port: endpoint {
290 remote-endpoint = <&hugo_funnel_out_port0>;
296 etf_out_port: endpoint {
297 remote-endpoint = <&replicator_in_port0>;
304 compatible = "arm,coresight-tmc", "arm,primecell";
305 reg = <0x30086000 0x1000>;
306 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
307 clock-names = "apb_pclk";
310 etr_in_port: endpoint {
312 remote-endpoint = <&replicator_out_port1>;
318 compatible = "arm,coresight-tpiu", "arm,primecell";
319 reg = <0x30087000 0x1000>;
320 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
321 clock-names = "apb_pclk";
324 tpiu_in_port: endpoint {
326 remote-endpoint = <&replicator_out_port0>;
331 intc: interrupt-controller@31001000 {
332 compatible = "arm,cortex-a7-gic";
333 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
334 #interrupt-cells = <3>;
335 interrupt-controller;
336 interrupt-parent = <&intc>;
337 reg = <0x31001000 0x1000>,
343 aips1: aips-bus@30000000 {
344 compatible = "fsl,aips-bus", "simple-bus";
345 #address-cells = <1>;
347 reg = <0x30000000 0x400000>;
350 gpio1: gpio@30200000 {
351 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
352 reg = <0x30200000 0x10000>;
353 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, /* GPIO1_INT15_0 */
354 <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; /* GPIO1_INT31_16 */
357 interrupt-controller;
358 #interrupt-cells = <2>;
359 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
362 gpio2: gpio@30210000 {
363 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
364 reg = <0x30210000 0x10000>;
365 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
369 interrupt-controller;
370 #interrupt-cells = <2>;
371 gpio-ranges = <&iomuxc 0 13 32>;
374 gpio3: gpio@30220000 {
375 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
376 reg = <0x30220000 0x10000>;
377 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
378 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
381 interrupt-controller;
382 #interrupt-cells = <2>;
383 gpio-ranges = <&iomuxc 0 45 29>;
386 gpio4: gpio@30230000 {
387 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
388 reg = <0x30230000 0x10000>;
389 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
390 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
393 interrupt-controller;
394 #interrupt-cells = <2>;
395 gpio-ranges = <&iomuxc 0 74 24>;
398 gpio5: gpio@30240000 {
399 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
400 reg = <0x30240000 0x10000>;
401 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
402 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
405 interrupt-controller;
406 #interrupt-cells = <2>;
407 gpio-ranges = <&iomuxc 0 98 18>;
410 gpio6: gpio@30250000 {
411 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
412 reg = <0x30250000 0x10000>;
413 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
414 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
417 interrupt-controller;
418 #interrupt-cells = <2>;
419 gpio-ranges = <&iomuxc 0 116 23>;
422 gpio7: gpio@30260000 {
423 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
424 reg = <0x30260000 0x10000>;
425 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
426 <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
429 interrupt-controller;
430 #interrupt-cells = <2>;
431 gpio-ranges = <&iomuxc 0 139 16>;
434 wdog1: wdog@30280000 {
435 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
436 reg = <0x30280000 0x10000>;
437 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
438 clocks = <&clks IMX7D_WDOG1_ROOT_CLK>;
441 wdog2: wdog@30290000 {
442 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
443 reg = <0x30290000 0x10000>;
444 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
445 clocks = <&clks IMX7D_WDOG2_ROOT_CLK>;
449 wdog3: wdog@302a0000 {
450 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
451 reg = <0x302a0000 0x10000>;
452 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
453 clocks = <&clks IMX7D_WDOG3_ROOT_CLK>;
457 wdog4: wdog@302b0000 {
458 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
459 reg = <0x302b0000 0x10000>;
460 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
461 clocks = <&clks IMX7D_WDOG4_ROOT_CLK>;
465 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
466 compatible = "fsl,imx7d-iomuxc-lpsr";
467 reg = <0x302c0000 0x10000>;
468 fsl,input-sel = <&iomuxc>;
472 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
473 reg = <0x302d0000 0x10000>;
474 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
475 clocks = <&clks IMX7D_CLK_DUMMY>,
476 <&clks IMX7D_GPT1_ROOT_CLK>;
477 clock-names = "ipg", "per";
481 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
482 reg = <0x302e0000 0x10000>;
483 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
484 clocks = <&clks IMX7D_CLK_DUMMY>,
485 <&clks IMX7D_GPT2_ROOT_CLK>;
486 clock-names = "ipg", "per";
491 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
492 reg = <0x302f0000 0x10000>;
493 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
494 clocks = <&clks IMX7D_CLK_DUMMY>,
495 <&clks IMX7D_GPT3_ROOT_CLK>;
496 clock-names = "ipg", "per";
501 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
502 reg = <0x30300000 0x10000>;
503 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
504 clocks = <&clks IMX7D_CLK_DUMMY>,
505 <&clks IMX7D_GPT4_ROOT_CLK>;
506 clock-names = "ipg", "per";
511 compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
512 reg = <0x30320000 0x10000>;
513 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
514 clocks = <&clks IMX7D_KPP_ROOT_CLK>;
518 iomuxc: iomuxc@30330000 {
519 compatible = "fsl,imx7d-iomuxc";
520 reg = <0x30330000 0x10000>;
523 gpr: iomuxc-gpr@30340000 {
524 compatible = "fsl,imx7d-iomuxc-gpr",
525 "fsl,imx6q-iomuxc-gpr", "syscon";
526 reg = <0x30340000 0x10000>;
529 ocotp: ocotp-ctrl@30350000 {
530 #address-cells = <1>;
532 compatible = "fsl,imx7d-ocotp", "syscon";
533 reg = <0x30350000 0x10000>;
534 clocks = <&clks IMX7D_OCOTP_CLK>;
536 tempmon_calib: calib@3c {
540 tempmon_temp_grade: temp-grade@10 {
546 compatible = "fsl,imx7d-tempmon";
547 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
548 fsl,tempmon =<&anatop>;
549 nvmem-cells = <&tempmon_calib>,
550 <&tempmon_temp_grade>;
551 nvmem-cell-names = "calib", "temp_grade";
552 clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
555 anatop: anatop@30360000 {
556 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
557 "syscon", "simple-bus";
558 reg = <0x30360000 0x10000>;
559 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
560 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
561 #address-cells = <1>;
564 reg_1p0d: regulator-vdd1p0d@30360210 {
566 compatible = "fsl,anatop-regulator";
567 regulator-name = "vdd1p0d";
568 regulator-min-microvolt = <800000>;
569 regulator-max-microvolt = <1200000>;
570 anatop-reg-offset = <0x210>;
571 anatop-vol-bit-shift = <8>;
572 anatop-vol-bit-width = <5>;
573 anatop-min-bit-val = <8>;
574 anatop-min-voltage = <800000>;
575 anatop-max-voltage = <1200000>;
576 anatop-enable-bit = <0>;
580 snvs: snvs@30370000 {
581 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
582 reg = <0x30370000 0x10000>;
584 snvs_rtc: snvs-rtc-lp {
585 compatible = "fsl,sec-v4.0-mon-rtc-lp";
588 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
589 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&clks IMX7D_SNVS_CLK>;
591 clock-names = "snvs-rtc";
594 snvs_poweroff: snvs-poweroff {
595 compatible = "syscon-poweroff";
602 snvs_pwrkey: snvs-powerkey {
603 compatible = "fsl,sec-v4.0-pwrkey";
605 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
606 linux,keycode = <KEY_POWER>;
612 compatible = "fsl,imx7d-ccm";
613 reg = <0x30380000 0x10000>;
614 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
615 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
617 clocks = <&ckil>, <&osc>;
618 clock-names = "ckil", "osc";
622 compatible = "fsl,imx7d-src", "syscon";
623 reg = <0x30390000 0x10000>;
624 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
629 compatible = "fsl,imx7d-gpc";
630 reg = <0x303a0000 0x10000>;
631 interrupt-controller;
632 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
633 #interrupt-cells = <3>;
634 interrupt-parent = <&intc>;
635 #power-domain-cells = <1>;
638 #address-cells = <1>;
641 pgc_pcie_phy: pgc-power-domain@1 {
642 #power-domain-cells = <0>;
644 power-supply = <®_1p0d>;
650 aips2: aips-bus@30400000 {
651 compatible = "fsl,aips-bus", "simple-bus";
652 #address-cells = <1>;
654 reg = <0x30400000 0x400000>;
658 compatible = "fsl,imx7d-adc";
659 reg = <0x30610000 0x10000>;
660 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
661 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
667 compatible = "fsl,imx7d-adc";
668 reg = <0x30620000 0x10000>;
669 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
670 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
675 ecspi4: ecspi@30630000 {
676 #address-cells = <1>;
678 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
679 reg = <0x30630000 0x10000>;
680 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
681 clocks = <&clks IMX7D_ECSPI4_ROOT_CLK>,
682 <&clks IMX7D_ECSPI4_ROOT_CLK>;
683 clock-names = "ipg", "per";
688 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
689 reg = <0x30660000 0x10000>;
690 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&clks IMX7D_PWM1_ROOT_CLK>,
692 <&clks IMX7D_PWM1_ROOT_CLK>;
693 clock-names = "ipg", "per";
699 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
700 reg = <0x30670000 0x10000>;
701 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
702 clocks = <&clks IMX7D_PWM2_ROOT_CLK>,
703 <&clks IMX7D_PWM2_ROOT_CLK>;
704 clock-names = "ipg", "per";
710 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
711 reg = <0x30680000 0x10000>;
712 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
713 clocks = <&clks IMX7D_PWM3_ROOT_CLK>,
714 <&clks IMX7D_PWM3_ROOT_CLK>;
715 clock-names = "ipg", "per";
721 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
722 reg = <0x30690000 0x10000>;
723 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
724 clocks = <&clks IMX7D_PWM4_ROOT_CLK>,
725 <&clks IMX7D_PWM4_ROOT_CLK>;
726 clock-names = "ipg", "per";
731 lcdif: lcdif@30730000 {
732 compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
733 reg = <0x30730000 0x10000>;
734 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
735 clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>,
736 <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>;
737 clock-names = "pix", "axi";
742 aips3: aips-bus@30800000 {
743 compatible = "fsl,aips-bus", "simple-bus";
744 #address-cells = <1>;
746 reg = <0x30800000 0x400000>;
750 compatible = "fsl,spba-bus", "simple-bus";
751 #address-cells = <1>;
753 reg = <0x30800000 0x100000>;
756 ecspi1: ecspi@30820000 {
757 #address-cells = <1>;
759 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
760 reg = <0x30820000 0x10000>;
761 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
762 clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
763 <&clks IMX7D_ECSPI1_ROOT_CLK>;
764 clock-names = "ipg", "per";
768 ecspi2: ecspi@30830000 {
769 #address-cells = <1>;
771 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
772 reg = <0x30830000 0x10000>;
773 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
774 clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
775 <&clks IMX7D_ECSPI2_ROOT_CLK>;
776 clock-names = "ipg", "per";
780 ecspi3: ecspi@30840000 {
781 #address-cells = <1>;
783 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
784 reg = <0x30840000 0x10000>;
785 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
786 clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
787 <&clks IMX7D_ECSPI3_ROOT_CLK>;
788 clock-names = "ipg", "per";
792 uart1: serial@30860000 {
793 compatible = "fsl,imx7d-uart",
795 reg = <0x30860000 0x10000>;
796 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
797 clocks = <&clks IMX7D_UART1_ROOT_CLK>,
798 <&clks IMX7D_UART1_ROOT_CLK>;
799 clock-names = "ipg", "per";
803 uart2: serial@30890000 {
804 compatible = "fsl,imx7d-uart",
806 reg = <0x30890000 0x10000>;
807 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
808 clocks = <&clks IMX7D_UART2_ROOT_CLK>,
809 <&clks IMX7D_UART2_ROOT_CLK>;
810 clock-names = "ipg", "per";
814 uart3: serial@30880000 {
815 compatible = "fsl,imx7d-uart",
817 reg = <0x30880000 0x10000>;
818 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
819 clocks = <&clks IMX7D_UART3_ROOT_CLK>,
820 <&clks IMX7D_UART3_ROOT_CLK>;
821 clock-names = "ipg", "per";
826 #sound-dai-cells = <0>;
827 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
828 reg = <0x308a0000 0x10000>;
829 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
830 clocks = <&clks IMX7D_SAI1_IPG_CLK>,
831 <&clks IMX7D_SAI1_ROOT_CLK>,
832 <&clks IMX7D_CLK_DUMMY>,
833 <&clks IMX7D_CLK_DUMMY>;
834 clock-names = "bus", "mclk1", "mclk2", "mclk3";
835 dma-names = "rx", "tx";
836 dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
841 #sound-dai-cells = <0>;
842 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
843 reg = <0x308b0000 0x10000>;
844 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
845 clocks = <&clks IMX7D_SAI2_IPG_CLK>,
846 <&clks IMX7D_SAI2_ROOT_CLK>,
847 <&clks IMX7D_CLK_DUMMY>,
848 <&clks IMX7D_CLK_DUMMY>;
849 clock-names = "bus", "mclk1", "mclk2", "mclk3";
850 dma-names = "rx", "tx";
851 dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
856 #sound-dai-cells = <0>;
857 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
858 reg = <0x308c0000 0x10000>;
859 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
860 clocks = <&clks IMX7D_SAI3_IPG_CLK>,
861 <&clks IMX7D_SAI3_ROOT_CLK>,
862 <&clks IMX7D_CLK_DUMMY>,
863 <&clks IMX7D_CLK_DUMMY>;
864 clock-names = "bus", "mclk1", "mclk2", "mclk3";
865 dma-names = "rx", "tx";
866 dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
871 crypto: caam@30900000 {
872 compatible = "fsl,sec-v4.0";
873 #address-cells = <1>;
875 reg = <0x30900000 0x40000>;
876 ranges = <0 0x30900000 0x40000>;
877 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
878 clocks = <&clks IMX7D_CAAM_CLK>,
879 <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
880 clock-names = "ipg", "aclk";
883 compatible = "fsl,sec-v4.0-job-ring";
884 reg = <0x1000 0x1000>;
885 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
889 compatible = "fsl,sec-v4.0-job-ring";
890 reg = <0x2000 0x1000>;
891 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
895 compatible = "fsl,sec-v4.0-job-ring";
896 reg = <0x3000 0x1000>;
897 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
901 flexcan1: can@30a00000 {
902 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
903 reg = <0x30a00000 0x10000>;
904 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
905 clocks = <&clks IMX7D_CLK_DUMMY>,
906 <&clks IMX7D_CAN1_ROOT_CLK>;
907 clock-names = "ipg", "per";
911 flexcan2: can@30a10000 {
912 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
913 reg = <0x30a10000 0x10000>;
914 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
915 clocks = <&clks IMX7D_CLK_DUMMY>,
916 <&clks IMX7D_CAN2_ROOT_CLK>;
917 clock-names = "ipg", "per";
922 #address-cells = <1>;
924 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
925 reg = <0x30a20000 0x10000>;
926 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
927 clocks = <&clks IMX7D_I2C1_ROOT_CLK>;
932 #address-cells = <1>;
934 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
935 reg = <0x30a30000 0x10000>;
936 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
937 clocks = <&clks IMX7D_I2C2_ROOT_CLK>;
942 #address-cells = <1>;
944 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
945 reg = <0x30a40000 0x10000>;
946 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
947 clocks = <&clks IMX7D_I2C3_ROOT_CLK>;
952 #address-cells = <1>;
954 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
955 reg = <0x30a50000 0x10000>;
956 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
957 clocks = <&clks IMX7D_I2C4_ROOT_CLK>;
961 uart4: serial@30a60000 {
962 compatible = "fsl,imx7d-uart",
964 reg = <0x30a60000 0x10000>;
965 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
966 clocks = <&clks IMX7D_UART4_ROOT_CLK>,
967 <&clks IMX7D_UART4_ROOT_CLK>;
968 clock-names = "ipg", "per";
972 uart5: serial@30a70000 {
973 compatible = "fsl,imx7d-uart",
975 reg = <0x30a70000 0x10000>;
976 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
977 clocks = <&clks IMX7D_UART5_ROOT_CLK>,
978 <&clks IMX7D_UART5_ROOT_CLK>;
979 clock-names = "ipg", "per";
983 uart6: serial@30a80000 {
984 compatible = "fsl,imx7d-uart",
986 reg = <0x30a80000 0x10000>;
987 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
988 clocks = <&clks IMX7D_UART6_ROOT_CLK>,
989 <&clks IMX7D_UART6_ROOT_CLK>;
990 clock-names = "ipg", "per";
994 uart7: serial@30a90000 {
995 compatible = "fsl,imx7d-uart",
997 reg = <0x30a90000 0x10000>;
998 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
999 clocks = <&clks IMX7D_UART7_ROOT_CLK>,
1000 <&clks IMX7D_UART7_ROOT_CLK>;
1001 clock-names = "ipg", "per";
1002 status = "disabled";
1005 usbotg1: usb@30b10000 {
1006 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1007 reg = <0x30b10000 0x200>;
1008 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
1009 clocks = <&clks IMX7D_USB_CTRL_CLK>;
1010 fsl,usbphy = <&usbphynop1>;
1011 fsl,usbmisc = <&usbmisc1 0>;
1012 phy-clkgate-delay-us = <400>;
1013 status = "disabled";
1016 usbh: usb@30b30000 {
1017 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1018 reg = <0x30b30000 0x200>;
1019 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1020 clocks = <&clks IMX7D_USB_CTRL_CLK>;
1021 fsl,usbphy = <&usbphynop3>;
1022 fsl,usbmisc = <&usbmisc3 0>;
1025 phy-clkgate-delay-us = <400>;
1026 status = "disabled";
1029 usbmisc1: usbmisc@30b10200 {
1031 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1032 reg = <0x30b10200 0x200>;
1035 usbmisc3: usbmisc@30b30200 {
1037 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1038 reg = <0x30b30200 0x200>;
1041 usdhc1: usdhc@30b40000 {
1042 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1043 reg = <0x30b40000 0x10000>;
1044 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
1045 clocks = <&clks IMX7D_IPG_ROOT_CLK>,
1046 <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,
1047 <&clks IMX7D_USDHC1_ROOT_CLK>;
1048 clock-names = "ipg", "ahb", "per";
1050 status = "disabled";
1053 usdhc2: usdhc@30b50000 {
1054 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1055 reg = <0x30b50000 0x10000>;
1056 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1057 clocks = <&clks IMX7D_IPG_ROOT_CLK>,
1058 <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,
1059 <&clks IMX7D_USDHC2_ROOT_CLK>;
1060 clock-names = "ipg", "ahb", "per";
1062 status = "disabled";
1065 usdhc3: usdhc@30b60000 {
1066 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1067 reg = <0x30b60000 0x10000>;
1068 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1069 clocks = <&clks IMX7D_IPG_ROOT_CLK>,
1070 <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,
1071 <&clks IMX7D_USDHC3_ROOT_CLK>;
1072 clock-names = "ipg", "ahb", "per";
1074 status = "disabled";
1077 qspi1: qspi@30bb0000 {
1078 #address-cells = <1>;
1080 compatible = "fsl,imx7d-qspi";
1081 reg = <0x30bb0000 0x10000>, <0x60000000 0x10000000>;
1082 reg-names = "QuadSPI", "QuadSPI-memory";
1083 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1084 clocks = <&clks IMX7D_QSPI_ROOT_CLK>,
1085 <&clks IMX7D_QSPI_ROOT_CLK>;
1086 clock-names = "qspi_en", "qspi";
1087 status = "disabled";
1090 sdma: sdma@30bd0000 {
1091 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
1092 reg = <0x30bd0000 0x10000>;
1093 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
1094 clocks = <&clks IMX7D_SDMA_CORE_CLK>,
1095 <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
1096 clock-names = "ipg", "ahb";
1098 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1101 fec1: ethernet@30be0000 {
1102 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
1103 reg = <0x30be0000 0x10000>;
1104 interrupt-names = "int0", "int1", "int2", "pps";
1105 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1106 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
1107 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
1108 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1109 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
1110 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
1111 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
1112 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
1113 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
1114 clock-names = "ipg", "ahb", "ptp",
1115 "enet_clk_ref", "enet_out";
1116 fsl,num-tx-queues=<3>;
1117 fsl,num-rx-queues=<3>;
1118 status = "disabled";
1122 dma_apbh: dma-apbh@33000000 {
1123 compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
1124 reg = <0x33000000 0x2000>;
1125 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1126 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1127 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1128 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1129 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
1132 clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
1135 gpmi: gpmi-nand@33002000{
1136 compatible = "fsl,imx7d-gpmi-nand";
1137 #address-cells = <1>;
1139 reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
1140 reg-names = "gpmi-nand", "bch";
1141 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1142 interrupt-names = "bch";
1143 clocks = <&clks IMX7D_NAND_RAWNAND_CLK>,
1144 <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
1145 clock-names = "gpmi_io", "gpmi_bch_apb";
1146 dmas = <&dma_apbh 0>;
1147 dma-names = "rx-tx";
1148 status = "disabled";
1149 assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
1150 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;