1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright 2013 Freescale Semiconductor, Inc.
5 // Author: Fabio Estevam <fabio.estevam@freescale.com>
7 #include "imx6qdl-wandboard.dtsi"
10 reg_eth_phy: regulator-eth-phy {
11 compatible = "regulator-fixed";
12 regulator-name = "ETH_PHY";
13 regulator-min-microvolt = <3300000>;
14 regulator-max-microvolt = <3300000>;
15 gpio = <&gpio7 13 GPIO_ACTIVE_LOW>;
20 ddc-i2c-bus = <&i2c2>;
25 clock-frequency = <100000>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_i2c3>;
31 compatible = "fsl,pfuze100";
36 regulator-min-microvolt = <300000>;
37 regulator-max-microvolt = <1875000>;
40 regulator-ramp-delay = <6250>;
44 regulator-min-microvolt = <300000>;
45 regulator-max-microvolt = <1875000>;
48 regulator-ramp-delay = <6250>;
52 regulator-min-microvolt = <800000>;
53 regulator-max-microvolt = <3300000>;
56 regulator-ramp-delay = <6250>;
60 regulator-min-microvolt = <400000>;
61 regulator-max-microvolt = <1975000>;
67 regulator-min-microvolt = <400000>;
68 regulator-max-microvolt = <1975000>;
74 regulator-min-microvolt = <800000>;
75 regulator-max-microvolt = <3300000>;
79 regulator-min-microvolt = <5000000>;
80 regulator-max-microvolt = <5150000>;
84 regulator-min-microvolt = <1000000>;
85 regulator-max-microvolt = <3000000>;
96 regulator-min-microvolt = <800000>;
97 regulator-max-microvolt = <1550000>;
101 regulator-min-microvolt = <1500000>;
102 regulator-max-microvolt = <1500000>;
108 regulator-min-microvolt = <1800000>;
109 regulator-max-microvolt = <3300000>;
114 regulator-min-microvolt = <1800000>;
115 regulator-max-microvolt = <3300000>;
120 regulator-min-microvolt = <1800000>;
121 regulator-max-microvolt = <3300000>;
126 regulator-min-microvolt = <1800000>;
127 regulator-max-microvolt = <3300000>;
135 phy-supply = <®_eth_phy>;
140 pinctrl-0 = <&pinctrl_hog>;
143 pinctrl_hog: hoggrp {
145 MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x80000000 /* USB Power Enable */
146 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USDHC1 CD */
147 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */
148 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f0b1 /* RGMII PHY reset */
152 pinctrl_enet: enetgrp {
154 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
155 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
156 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
157 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
158 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
159 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
160 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
161 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
162 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
163 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
164 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
165 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
166 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
167 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
168 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
169 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
173 pinctrl_i2c3: i2c3grp {
175 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
176 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
180 pinctrl_spdif: spdifgrp {
182 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_usdhc2>;