arch/arm/dts/imx6qdl-dhcom.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+)
   2 /*
   3  * Copyright (C) 2015-2019 DH electronics GmbH
   4  * Copyright (C) 2018 Marek Vasut <marex@denx.de>
   5  */
   6
   7 #include <dt-bindings/pwm/pwm.h>
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/clock/imx6qdl-clock.h>
  10 #include <dt-bindings/input/input.h>
  11
  12 / {
  13         aliases {
  14                 mmc0 = &usdhc2;
  15                 mmc1 = &usdhc3;
  16                 mmc2 = &usdhc4;
  17                 mmc3 = &usdhc1;
  18         };
  19
  20         memory@10000000 {
  21                 device_type = "memory";
  22                 reg = <0x10000000 0x40000000>;
  23         };
  24
  25         reg_usb_otg_vbus: regulator-usb-otg-vbus {
  26                 compatible = "regulator-fixed";
  27                 regulator-name = "usb_otg_vbus";
  28                 regulator-min-microvolt = <5000000>;
  29                 regulator-max-microvolt = <5000000>;
  30         };
  31
  32         reg_usb_h1_vbus: regulator-usb-h1-vbus {
  33                 compatible = "regulator-fixed";
  34                 regulator-name = "usb_h1_vbus";
  35                 regulator-min-microvolt = <5000000>;
  36                 regulator-max-microvolt = <5000000>;
  37                 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
  38                 enable-active-high;
  39         };
  40
  41         reg_3p3v: regulator-3P3V {
  42                 compatible = "regulator-fixed";
  43                 regulator-name = "3P3V";
  44                 regulator-min-microvolt = <3300000>;
  45                 regulator-max-microvolt = <3300000>;
  46                 regulator-always-on;
  47         };
  48 };
  49
  50 &can1 {
  51         pinctrl-names = "default";
  52         pinctrl-0 = <&pinctrl_flexcan1>;
  53         status = "okay";
  54 };
  55
  56 &can2 {
  57         pinctrl-names = "default";
  58         pinctrl-0 = <&pinctrl_flexcan2>;
  59         status = "okay";
  60 };
  61
  62 &ecspi1 {
  63         cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio4 11 GPIO_ACTIVE_LOW>;
  64         pinctrl-names = "default";
  65         pinctrl-0 = <&pinctrl_ecspi1>;
  66         status = "okay";
  67
  68         flash@0 {       /* S25FL116K */
  69                 #address-cells = <1>;
  70                 #size-cells = <1>;
  71                 compatible = "jedec,spi-nor";
  72                 spi-max-frequency = <50000000>;
  73                 reg = <0>;
  74                 m25p,fast-read;
  75         };
  76 };
  77
  78 &ecspi2 {
  79         cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
  80         pinctrl-names = "default";
  81         pinctrl-0 = <&pinctrl_ecspi2>;
  82         status = "okay";
  83 };
  84
  85 &fec {
  86         pinctrl-names = "default";
  87         pinctrl-0 = <&pinctrl_enet_100M>;
  88         phy-mode = "rmii";
  89         phy-handle = <&ethphy0>;
  90         status = "okay";
  91
  92         mdio {
  93                 #address-cells = <1>;
  94                 #size-cells = <0>;
  95
  96                 ethphy0: ethernet-phy@0 {       /* SMSC LAN8710Ai */
  97                         reg = <0>;
  98                         max-speed = <100>;
  99                         reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
 100                         reset-delay-us = <1000>;
 101                         reset-post-delay-us = <1000>;
 102                 };
 103         };
 104 };
 105
 106 &i2c1 {
 107         clock-frequency = <100000>;
 108         pinctrl-names = "default";
 109         pinctrl-0 = <&pinctrl_i2c1>;
 110         status = "okay";
 111 };
 112
 113 &i2c2 {
 114         clock-frequency = <100000>;
 115         pinctrl-names = "default";
 116         pinctrl-0 = <&pinctrl_i2c2>;
 117         status = "okay";
 118 };
 119
 120 &i2c3 {
 121         clock-frequency = <100000>;
 122         pinctrl-names = "default";
 123         pinctrl-0 = <&pinctrl_i2c3>;
 124         status = "okay";
 125
 126         ltc3676: pmic@3c {
 127                 compatible = "lltc,ltc3676";
 128                 pinctrl-names = "default";
 129                 pinctrl-0 = <&pinctrl_pmic_hw300>;
 130                 reg = <0x3c>;
 131                 interrupt-parent = <&gpio5>;
 132                 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
 133
 134                 regulators {
 135                         sw1_reg: sw1 {
 136                                 regulator-min-microvolt = <787500>;
 137                                 regulator-max-microvolt = <1527272>;
 138                                 lltc,fb-voltage-divider = <100000 110000>;
 139                                 regulator-suspend-mem-microvolt = <1040000>;
 140                                 regulator-ramp-delay = <7000>;
 141                                 regulator-boot-on;
 142                                 regulator-always-on;
 143                         };
 144
 145                         sw2_reg: sw2 {
 146                                 regulator-min-microvolt = <1885714>;
 147                                 regulator-max-microvolt = <3657142>;
 148                                 lltc,fb-voltage-divider = <100000 28000>;
 149                                 regulator-ramp-delay = <7000>;
 150                                 regulator-boot-on;
 151                                 regulator-always-on;
 152                         };
 153
 154                         sw3_reg: sw3 {
 155                                 regulator-min-microvolt = <787500>;
 156                                 regulator-max-microvolt = <1527272>;
 157                                 lltc,fb-voltage-divider = <100000 110000>;
 158                                 regulator-suspend-mem-microvolt = <980000>;
 159                                 regulator-ramp-delay = <7000>;
 160                                 regulator-boot-on;
 161                                 regulator-always-on;
 162                         };
 163
 164                         sw4_reg: sw4 {
 165                                 regulator-min-microvolt = <855571>;
 166                                 regulator-max-microvolt = <1659291>;
 167                                 lltc,fb-voltage-divider = <100000 93100>;
 168                                 regulator-ramp-delay = <7000>;
 169                                 regulator-boot-on;
 170                                 regulator-always-on;
 171                         };
 172
 173                         ldo1_reg: ldo1 {
 174                                 regulator-min-microvolt = <3240306>;
 175                                 regulator-max-microvolt = <3240306>;
 176                                 lltc,fb-voltage-divider = <102000 29400>;
 177                                 regulator-boot-on;
 178                                 regulator-always-on;
 179                         };
 180
 181                         ldo2_reg: ldo2 {
 182                                 regulator-min-microvolt = <2484708>;
 183                                 regulator-max-microvolt = <2484708>;
 184                                 lltc,fb-voltage-divider = <100000 41200>;
 185                                 regulator-boot-on;
 186                                 regulator-always-on;
 187                         };
 188                 };
 189         };
 190
 191         touchscreen@49 {        /* TSC2004 */
 192                 compatible = "ti,tsc2004";
 193                 reg = <0x49>;
 194                 vio-supply = <&reg_3p3v>;
 195                 pinctrl-names = "default";
 196                 pinctrl-0 = <&pinctrl_tsc2004_hw300>;
 197                 interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
 198                 status = "disabled";
 199         };
 200
 201         eeprom@50 {
 202                 compatible = "atmel,24c02";
 203                 reg = <0x50>;
 204                 pagesize = <16>;
 205         };
 206
 207         rtc@56 {
 208                 compatible = "rv3029c2";
 209                 pinctrl-names = "default";
 210                 pinctrl-0 = <&pinctrl_rtc_hw300>;
 211                 reg = <0x56>;
 212                 interrupt-parent = <&gpio7>;
 213                 interrupts = <12 2>;
 214         };
 215 };
 216
 217 &iomuxc {
 218         pinctrl-names = "default";
 219         pinctrl-0 = <&pinctrl_hog_base>;
 220
 221         pinctrl_hog_base: hog-base-grp {
 222                 fsl,pins = <
 223                         MX6QDL_PAD_EIM_A19__GPIO2_IO19          0x120b0
 224                         MX6QDL_PAD_EIM_A23__GPIO6_IO06          0x120b0
 225                         MX6QDL_PAD_EIM_A22__GPIO2_IO16          0x120b0
 226                         MX6QDL_PAD_EIM_A16__GPIO2_IO22          0x120b0
 227                         MX6QDL_PAD_EIM_A17__GPIO2_IO21          0x120b0
 228                 >;
 229         };
 230
 231         pinctrl_ecspi1: ecspi1-grp {
 232                 fsl,pins = <
 233                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 234                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 235                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 236                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 237                         MX6QDL_PAD_KEY_ROW2__GPIO4_IO11         0x1b0b0
 238                 >;
 239         };
 240
 241         pinctrl_ecspi2: ecspi2-grp {
 242                 fsl,pins = <
 243                         MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO      0x100b1
 244                         MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI       0x100b1
 245                         MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK       0x100b1
 246                         MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29       0x1b0b0
 247                 >;
 248         };
 249
 250         pinctrl_enet_100M: enet-100M-grp {
 251                 fsl,pins = <
 252                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 253                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 254                         MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN      0x1b0b0
 255                         MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER       0x1b0b0
 256                         MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0     0x1b0b0
 257                         MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1     0x1b0b0
 258                         MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0
 259                         MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0     0x1b0b0
 260                         MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1     0x1b0b0
 261                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 262                         MX6QDL_PAD_EIM_WAIT__GPIO5_IO00         0x000b0
 263                         MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x000b1
 264                         MX6QDL_PAD_GPIO_7__GPIO1_IO07           0x120b0
 265                 >;
 266         };
 267
 268         pinctrl_flexcan1: flexcan1-grp {
 269                 fsl,pins = <
 270                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b0
 271                         MX6QDL_PAD_GPIO_8__FLEXCAN1_RX          0x1b0b0
 272                 >;
 273         };
 274
 275         pinctrl_flexcan2: flexcan2-grp {
 276                 fsl,pins = <
 277                         MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX        0x1b0b0
 278                         MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX        0x1b0b0
 279                 >;
 280         };
 281
 282         pinctrl_i2c1: i2c1-grp {
 283                 fsl,pins = <
 284                         MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 285                         MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 286                 >;
 287         };
 288
 289         pinctrl_i2c2: i2c2-grp {
 290                 fsl,pins = <
 291                         MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 292                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 293                 >;
 294         };
 295
 296         pinctrl_i2c3: i2c3-grp {
 297                 fsl,pins = <
 298                         MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 299                         MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 300                 >;
 301         };
 302
 303         pinctrl_pmic_hw300: pmic-hw300-grp {
 304                 fsl,pins = <
 305                         MX6QDL_PAD_EIM_A25__GPIO5_IO02          0x1B0B0
 306                 >;
 307         };
 308
 309         pinctrl_rtc_hw300: rtc-hw300-grp {
 310                 fsl,pins = <
 311                         MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x120B0
 312                 >;
 313         };
 314
 315         pinctrl_tsc2004_hw300: tsc2004-hw300-grp {
 316                 fsl,pins = <
 317                         MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x120B0
 318                 >;
 319         };
 320
 321         pinctrl_uart1: uart1-grp {
 322                 fsl,pins = <
 323                         MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 324                         MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 325                         MX6QDL_PAD_EIM_D20__UART1_RTS_B         0x1b0b1
 326                         MX6QDL_PAD_EIM_D19__UART1_CTS_B         0x4001b0b1
 327                         MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x4001b0b1
 328                         MX6QDL_PAD_EIM_D24__GPIO3_IO24          0x4001b0b1
 329                         MX6QDL_PAD_EIM_D25__GPIO3_IO25          0x4001b0b1
 330                         MX6QDL_PAD_EIM_EB3__GPIO2_IO31          0x4001b0b1
 331                 >;
 332         };
 333
 334         pinctrl_uart4: uart4-grp {
 335                 fsl,pins = <
 336                         MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA    0x1b0b1
 337                         MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA    0x1b0b1
 338                 >;
 339         };
 340
 341         pinctrl_uart5: uart5-grp {
 342                 fsl,pins = <
 343                         MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA    0x1b0b1
 344                         MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA    0x1b0b1
 345                         MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B      0x1b0b1
 346                         MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B      0x4001b0b1
 347                 >;
 348         };
 349
 350         pinctrl_usbh1: usbh1-grp {
 351                 fsl,pins = <
 352                         MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x120B0
 353                 >;
 354         };
 355
 356         pinctrl_usbotg: usbotg-grp {
 357                 fsl,pins = <
 358                         MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 359                 >;
 360         };
 361
 362         pinctrl_usdhc2: usdhc2-grp {
 363                 fsl,pins = <
 364                         MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 365                         MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 366                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 367                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 368                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 369                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 370                         MX6QDL_PAD_NANDF_CS3__GPIO6_IO16        0x120B0
 371                 >;
 372         };
 373
 374         pinctrl_usdhc3: usdhc3-grp {
 375                 fsl,pins = <
 376                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 377                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 378                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 379                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 380                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 381                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 382                         MX6QDL_PAD_SD3_RST__GPIO7_IO08          0x120B0
 383                 >;
 384         };
 385
 386         pinctrl_usdhc4: usdhc4-grp {
 387                 fsl,pins = <
 388                         MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 389                         MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 390                         MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 391                         MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 392                         MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 393                         MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 394                         MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
 395                         MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
 396                         MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
 397                         MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
 398                 >;
 399         };
 400 };
 401
 402 &reg_arm {
 403         vin-supply = <&sw3_reg>;
 404 };
 405
 406 &reg_soc {
 407         vin-supply = <&sw1_reg>;
 408 };
 409
 410 &uart1 {
 411         pinctrl-names = "default";
 412         pinctrl-0 = <&pinctrl_uart1>;
 413         uart-has-rtscts;
 414         dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
 415         dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
 416         dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
 417         rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
 418         status = "okay";
 419 };
 420
 421 &uart4 {
 422         pinctrl-names = "default";
 423         pinctrl-0 = <&pinctrl_uart4>;
 424         status = "okay";
 425 };
 426
 427 &uart5 {
 428         pinctrl-names = "default";
 429         pinctrl-0 = <&pinctrl_uart5>;
 430         uart-has-rtscts;
 431         status = "okay";
 432 };
 433
 434 &usbh1 {
 435         pinctrl-names = "default";
 436         pinctrl-0 = <&pinctrl_usbh1>;
 437         vbus-supply = <&reg_usb_h1_vbus>;
 438         dr_mode = "host";
 439         status = "okay";
 440 };
 441
 442 &usbotg {
 443         vbus-supply = <&reg_usb_otg_vbus>;
 444         pinctrl-names = "default";
 445         pinctrl-0 = <&pinctrl_usbotg>;
 446         disable-over-current;
 447         dr_mode = "otg";
 448         status = "okay";
 449 };
 450
 451 &usdhc2 {
 452         pinctrl-names = "default";
 453         pinctrl-0 = <&pinctrl_usdhc2>;
 454         cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
 455         keep-power-in-suspend;
 456         status = "okay";
 457 };
 458
 459 &usdhc3 {
 460         pinctrl-names = "default";
 461         pinctrl-0 = <&pinctrl_usdhc3>;
 462         cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
 463         fsl,wp-controller;
 464         keep-power-in-suspend;
 465         status = "disabled";
 466 };
 467
 468 &usdhc4 {
 469         pinctrl-names = "default";
 470         pinctrl-0 = <&pinctrl_usdhc4>;
 471         non-removable;
 472         bus-width = <8>;
 473         no-1-8-v;
 474         keep-power-in-suspend;
 475         status = "okay";
 476 };