ARM: DTS: imx6q-logicpd: Update DTS/DTSI files
[platform/kernel/u-boot.git] / arch / arm / dts / imx6q-logicpd.dts
1 /*
2  * Copyright 2018 Logic PD, Inc.
3  * Based on SabreSD, Copyright 2016 Freescale Semiconductor, Inc.
4  *
5  * This file is dual-licensed: you can use it either under the terms
6  * of the GPL or the X11 license, at your option. Note that this dual
7  * licensing only applies to this file, and not this project as a
8  * whole.
9  *
10  *  a) This file is free software; you can redistribute it and/or
11  *     modify it under the terms of the GNU General Public License as
12  *     published by the Free Software Foundation; either version 2 of the
13  *     License, or (at your option) any later version.
14  *
15  *     This file is distributed in the hope that it will be useful,
16  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
17  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  *     GNU General Public License for more details.
19  *
20  * Or, alternatively,
21  *
22  *  b) Permission is hereby granted, free of charge, to any person
23  *     obtaining a copy of this software and associated documentation
24  *     files (the "Software"), to deal in the Software without
25  *     restriction, including without limitation the rights to use,
26  *     copy, modify, merge, publish, distribute, sublicense, and/or
27  *     sell copies of the Software, and to permit persons to whom the
28  *     Software is furnished to do so, subject to the following
29  *     conditions:
30  *
31  *     The above copyright notice and this permission notice shall be
32  *     included in all copies or substantial portions of the Software.
33  *
34  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41  *     OTHER DEALINGS IN THE SOFTWARE.
42  */
43
44 /dts-v1/;
45 #include "imx6q.dtsi"
46 #include "imx6-logicpd-som.dtsi"
47 #include "imx6-logicpd-baseboard.dtsi"
48
49 / {
50         model = "Logic PD i.MX6QD SOM-M3 (HDMI)";
51         compatible = "fsl,imx6q";
52
53         backlight: backlight_lvds {
54                 compatible = "pwm-backlight";
55                 pwms = <&pwm3 0 20000>;
56                 brightness-levels = <0 4 8 16 32 64 128 255>;
57                 default-brightness-level = <6>;
58                 power-supply = <&reg_lcd>;
59         };
60
61         reg_lcd: regulator-lcd {
62                 pinctrl-names = "default";
63                 pinctrl-0 = <&pinctrl_lcd_reg>;
64                 compatible = "regulator-fixed";
65                 regulator-name = "lcd_panel_pwr";
66                 regulator-min-microvolt = <3300000>;
67                 regulator-max-microvolt = <3300000>;
68                 gpio = <&gpio4 17 GPIO_ACTIVE_HIGH>;
69                 enable-active-high;
70                 regulator-always-on;
71                 vin-supply = <&reg_3v3>;
72                 startup-delay-us = <500000>;
73         };
74
75         lcd_reset: lcd_reset {
76                 pinctrl-names = "default";
77                 pinctrl-0 = <&pinctrl_lcd_reset>;
78                 compatible = "regulator-fixed";
79                 regulator-name = "nLCD_RESET";
80                 regulator-min-microvolt = <3300000>;
81                 regulator-max-microvolt = <3300000>;
82                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
83                 enable-active-high;
84                 regulator-always-on;
85                 vin-supply = <&reg_lcd>;
86         };
87
88         panel-lvds0 {
89                 compatible = "ampire,am800480b3tmqw";
90                 backlight = <&backlight>;
91
92                 port {
93                         panel_in_lvds0: endpoint {
94                                 remote-endpoint = <&lvds0_out>;
95                         };
96                 };
97         };
98 };
99
100 &hdmi {
101         ddc-i2c-bus = <&i2c3>;
102         status = "okay";
103 };
104
105 &i2c1 {
106         ili_touch: ilitouch@26 {
107                 compatible = "ili,ili2117a";
108                 reg = <0x26>;
109                 pinctrl-names = "default";
110                 pinctrl-0 = <&pinctrl_touchscreen>;
111                 interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_RISING>;
112                 ili2117a,poll-period = <10>;
113                 ili2117a,max-touch = <2>;
114         };
115 };
116
117 &reg_hdmi {
118         regulator-always-on;
119 };
120
121 &ldb {
122         status = "okay";
123
124         lvds-channel@0 {
125                 fsl,data-mapping = "spwg";
126                 fsl,data-width = <24>;
127                 status = "okay";
128
129                 port@4 {
130                         reg = <4>;
131
132                         lvds0_out: endpoint {
133                                 remote-endpoint = <&panel_in_lvds0>;
134                         };
135                 };
136         };
137
138 };
139
140 &clks {
141         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
142                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
143                           <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
144                           <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>;
145         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
146                                  <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
147                                  <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
148                                  <&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
149 };
150
151 &pwm3 {
152         status = "okay";
153 };
154
155 &usdhc2 {
156         cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
157 };
158
159 &iomuxc {
160         pinctrl_lcd_reg: lcdreg {
161                 fsl,pins = <
162                         MX6QDL_PAD_DI0_PIN15__GPIO4_IO17        0x100b0 /* R_LCD_PANEL_PWR */
163                 >;
164         };
165
166         pinctrl_lcd_reset: lcdreset {
167                 fsl,pins = <
168                         MX6QDL_PAD_EIM_A25__GPIO5_IO02      0x100b0     /* LCD_nRESET */
169                 >;
170         };
171
172         pinctrl_touchscreen: touchscreengrp {
173                 fsl,pins = <
174                         MX6QDL_PAD_GPIO_6__GPIO1_IO06   0x1b0b0 /* TOUCH_nPINTDAV */
175                 >;
176         };
177 };
178