1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * NXP LX2162AQDS device tree source for the SERDES block #1 - protocol 20
5 * Some assumptions are made:
6 * * Mezzanine card M8 is connected to IO SLOT1
9 * Copyright 2020-2021 NXP
13 #include "fsl-lx2160a-qds.dtsi"
17 phy-handle = <&cortina_phy1_0>;
18 phy-connection-type = "xlaui4";
22 cortina_phy1_0: ethernet-phy@0 {
23 compatible = "ethernet-phy-ieee802.3-c45";