arch/arm/dts/fsl-ls1046a-rdb.dts

   1 // SPDX-License-Identifier: GPL-2.0+ OR X11
   2 /*
   3  * Device Tree Include file for Freescale Layerscape-1046A family SoC.
   4  *
   5  * Copyright 2016, Freescale Semiconductor
   6  * Copyright 2020 NXP
   7  *
   8  * Mingkai Hu <Mingkai.hu@freescale.com>
   9  */
  10
  11 /dts-v1/;
  12 /include/ "fsl-ls1046a.dtsi"
  13
  14 / {
  15         model = "LS1046A RDB Board";
  16
  17         aliases {
  18                 spi0 = &qspi;
  19         };
  20
  21 };
  22
  23 &qspi {
  24         bus-num = <0>;
  25         status = "okay";
  26
  27         qflash0: s25fs512s@0 {
  28                 #address-cells = <1>;
  29                 #size-cells = <1>;
  30                 compatible = "jedec,spi-nor";
  31                 spi-max-frequency = <50000000>;
  32                 reg = <0>;
  33         };
  34
  35         qflash1: s25fs512s@1 {
  36                 #address-cells = <1>;
  37                 #size-cells = <1>;
  38                 compatible = "jedec,spi-nor";
  39                 spi-max-frequency = <50000000>;
  40                 reg = <1>;
  41          };
  42 };
  43
  44 &sata {
  45         status = "okay";
  46 };
  47
  48 &i2c0 {
  49         status = "okay";
  50 };
  51
  52 &i2c3 {
  53         status = "okay";
  54 };
  55
  56 #include "fsl-ls1046-post.dtsi"
  57
  58 &fman0 {
  59         ethernet@e4000 {
  60                 phy-handle = <&rgmii_phy1>;
  61                 phy-connection-type = "rgmii-id";
  62                 status = "okay";
  63         };
  64
  65         ethernet@e6000 {
  66                 phy-handle = <&rgmii_phy2>;
  67                 phy-connection-type = "rgmii-id";
  68                 status = "okay";
  69         };
  70
  71         ethernet@e8000 {
  72                 phy-handle = <&sgmii_phy1>;
  73                 phy-connection-type = "sgmii";
  74                 status = "okay";
  75         };
  76
  77         ethernet@ea000 {
  78                 phy-handle = <&sgmii_phy2>;
  79                 phy-connection-type = "sgmii";
  80                 status = "okay";
  81         };
  82
  83         ethernet@f0000 { /* 10GEC1 */
  84                 phy-handle = <&aqr106_phy>;
  85                 phy-connection-type = "xgmii";
  86                 status = "okay";
  87         };
  88
  89         ethernet@f2000 { /* 10GEC2 */
  90                 fixed-link = <0 1 1000 0 0>;
  91                 phy-connection-type = "xgmii";
  92                 status = "okay";
  93         };
  94
  95         mdio@fc000 {
  96                 rgmii_phy1: ethernet-phy@1 {
  97                         reg = <0x1>;
  98                 };
  99
 100                 rgmii_phy2: ethernet-phy@2 {
 101                         reg = <0x2>;
 102                 };
 103
 104                 sgmii_phy1: ethernet-phy@3 {
 105                         reg = <0x3>;
 106                 };
 107
 108                 sgmii_phy2: ethernet-phy@4 {
 109                         reg = <0x4>;
 110                 };
 111         };
 112
 113         mdio@fd000 {
 114                 aqr106_phy: ethernet-phy@0 {
 115                         compatible = "ethernet-phy-ieee802.3-c45";
 116                         interrupts = <0 131 4>;
 117                         reg = <0x0>;
 118                 };
 119         };
 120 };