arch/arm/dts/fsl-ls1028a.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR X11
   2 /*
   3  * NXP ls1028a SOC common device tree source
   4  *
   5  * Copyright 2019-2020 NXP
   6  *
   7  */
   8
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10
  11 / {
  12         compatible = "fsl,ls1028a";
  13         interrupt-parent = <&gic>;
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         sysclk: sysclk {
  18                 compatible = "fixed-clock";
  19                 #clock-cells = <0>;
  20                 clock-frequency = <100000000>;
  21                 clock-output-names = "sysclk";
  22         };
  23
  24         gic: interrupt-controller@6000000 {
  25                 compatible = "arm,gic-v3";
  26                 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
  27                           <0x0 0x06040000 0 0x40000>;
  28                 #interrupt-cells = <3>;
  29                 interrupt-controller;
  30                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
  31                                          IRQ_TYPE_LEVEL_LOW)>;
  32         };
  33
  34         timer {
  35                 compatible = "arm,armv8-timer";
  36                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
  37                                           IRQ_TYPE_LEVEL_LOW)>,
  38                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
  39                                           IRQ_TYPE_LEVEL_LOW)>,
  40                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
  41                                           IRQ_TYPE_LEVEL_LOW)>,
  42                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
  43                                           IRQ_TYPE_LEVEL_LOW)>;
  44         };
  45
  46         fspi: flexspi@20c0000 {
  47                 compatible = "nxp,lx2160a-fspi";
  48                 #address-cells = <1>;
  49                 #size-cells = <0>;
  50                 reg = <0x0 0x20c0000 0x0 0x10000>,
  51                       <0x0 0x20000000 0x0 0x10000000>;
  52                 reg-names = "fspi_base", "fspi_mmap";
  53                 clocks = <&clockgen 4 3>, <&clockgen 4 3>;
  54                 clock-names = "fspi_en", "fspi";
  55                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
  56                 status = "disabled";
  57         };
  58
  59         serial0: serial@21c0500 {
  60                 device_type = "serial";
  61                 compatible = "fsl,ns16550", "ns16550a";
  62                 reg = <0x0 0x21c0500 0x0 0x100>;
  63                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
  64                 status = "disabled";
  65         };
  66
  67         serial1: serial@21c0600 {
  68                 device_type = "serial";
  69                 compatible = "fsl,ns16550", "ns16550a";
  70                 reg = <0x0 0x21c0600 0x0 0x100>;
  71                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
  72                 status = "disabled";
  73         };
  74
  75         pcie1: pcie@3400000 {
  76                compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
  77                reg = <0x00 0x03400000 0x0 0x80000
  78                        0x00 0x03480000 0x0 0x40000   /* lut registers */
  79                        0x00 0x034c0000 0x0 0x40000  /* pf controls registers */
  80                        0x80 0x00000000 0x0 0x20000>; /* configuration space */
  81                reg-names = "dbi", "lut", "ctrl", "config";
  82                #address-cells = <3>;
  83                #size-cells = <2>;
  84                device_type = "pci";
  85                num-lanes = <4>;
  86                bus-range = <0x0 0xff>;
  87                ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000   /* downstream I/O */
  88                        0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
  89         };
  90
  91         pcie2: pcie@3500000 {
  92                compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
  93                reg = <0x00 0x03500000 0x0 0x80000
  94                        0x00 0x03580000 0x0 0x40000   /* lut registers */
  95                        0x00 0x035c0000 0x0 0x40000  /* pf controls registers */
  96                        0x88 0x00000000 0x0 0x20000>; /* configuration space */
  97                reg-names = "dbi", "lut", "ctrl", "config";
  98                #address-cells = <3>;
  99                #size-cells = <2>;
 100                device_type = "pci";
 101                num-lanes = <4>;
 102                bus-range = <0x0 0xff>;
 103                ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000   /* downstream I/O */
 104                        0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 105         };
 106
 107         pcie@1f0000000 {
 108                 compatible = "pci-host-ecam-generic";
 109                 /* ECAM bus 0, HW has more space reserved but not populated */
 110                 bus-range = <0x0 0x0>;
 111                 reg = <0x01 0xf0000000 0x0 0x100000>;
 112                 #address-cells = <3>;
 113                 #size-cells = <2>;
 114                 device_type = "pci";
 115                 ranges= <0x82000000 0x0 0x00000000 0x1 0xf8000000 0x0 0x160000>;
 116                 enetc0: pci@0,0 {
 117                         reg = <0x000000 0 0 0 0>;
 118                         status = "disabled";
 119                 };
 120                 enetc1: pci@0,1 {
 121                         reg = <0x000100 0 0 0 0>;
 122                         status = "disabled";
 123                 };
 124                 enetc2: pci@0,2 {
 125                         reg = <0x000200 0 0 0 0>;
 126                         status = "disabled";
 127                         phy-mode = "internal";
 128
 129                         fixed-link {
 130                                 speed = <2500>;
 131                                 full-duplex;
 132                         };
 133                 };
 134                 mdio0: pci@0,3 {
 135                         #address-cells=<0>;
 136                         #size-cells=<1>;
 137                         reg = <0x000300 0 0 0 0>;
 138                         status = "disabled";
 139
 140                         fixed-link {
 141                                 speed = <1000>;
 142                                 full-duplex;
 143                         };
 144                 };
 145
 146                 mscc_felix: pci@0,5 {
 147                         reg = <0x000500 0 0 0 0>;
 148                         status = "disabled";
 149
 150                         ports {
 151                                 #address-cells = <1>;
 152                                 #size-cells = <0>;
 153
 154                                 mscc_felix_port0: port@0 {
 155                                         reg = <0>;
 156                                         status = "disabled";
 157                                 };
 158
 159                                 mscc_felix_port1: port@1 {
 160                                         reg = <1>;
 161                                         status = "disabled";
 162                                 };
 163
 164                                 mscc_felix_port2: port@2 {
 165                                         reg = <2>;
 166                                         status = "disabled";
 167                                 };
 168
 169                                 mscc_felix_port3: port@3 {
 170                                         reg = <3>;
 171                                         status = "disabled";
 172                                 };
 173
 174                                 mscc_felix_port4: port@4 {
 175                                         reg = <4>;
 176                                         phy-mode = "internal";
 177                                         status = "disabled";
 178
 179                                         fixed-link {
 180                                                 speed = <2500>;
 181                                                 full-duplex;
 182                                         };
 183                                 };
 184
 185                                 mscc_felix_port5: port@5 {
 186                                         reg = <5>;
 187                                         phy-mode = "internal";
 188                                         status = "disabled";
 189
 190                                         fixed-link {
 191                                                 speed = <1000>;
 192                                                 full-duplex;
 193                                         };
 194
 195                                 };
 196                         };
 197                 };
 198
 199                 enetc6: pci@0,6 {
 200                         reg = <0x000600 0 0 0 0>;
 201                         status = "disabled";
 202                         phy-mode = "internal";
 203                 };
 204         };
 205
 206         lpuart0: serial@2260000 {
 207                 compatible = "fsl,ls1021a-lpuart";
 208                 reg = <0x0 0x2260000 0x0 0x1000>;
 209                 interrupts = <0 232 0x4>;
 210                 clocks = <&sysclk>;
 211                 clock-names = "ipg";
 212                 little-endian;
 213                 status = "disabled";
 214         };
 215
 216         lpuart1: serial@2270000 {
 217                 compatible = "fsl,ls1021a-lpuart";
 218                 reg = <0x0 0x2270000 0x0 0x1000>;
 219                 interrupts = <0 233 0x4>;
 220                 clocks = <&sysclk>;
 221                 clock-names = "ipg";
 222                 little-endian;
 223                 status = "disabled";
 224         };
 225
 226         lpuart2: serial@2280000 {
 227                 compatible = "fsl,ls1021a-lpuart";
 228                 reg = <0x0 0x2280000 0x0 0x1000>;
 229                 interrupts = <0 234 0x4>;
 230                 clocks = <&sysclk>;
 231                 clock-names = "ipg";
 232                 little-endian;
 233                 status = "disabled";
 234         };
 235
 236         lpuart3: serial@2290000 {
 237                 compatible = "fsl,ls1021a-lpuart";
 238                 reg = <0x0 0x2290000 0x0 0x1000>;
 239                 interrupts = <0 235 0x4>;
 240                 clocks = <&sysclk>;
 241                 clock-names = "ipg";
 242                 little-endian;
 243                 status = "disabled";
 244         };
 245
 246         lpuart4: serial@22a0000 {
 247                 compatible = "fsl,ls1021a-lpuart";
 248                 reg = <0x0 0x22a0000 0x0 0x1000>;
 249                 interrupts = <0 236 0x4>;
 250                 clocks = <&sysclk>;
 251                 clock-names = "ipg";
 252                 little-endian;
 253                 status = "disabled";
 254         };
 255
 256         lpuart5: serial@22b0000 {
 257                 compatible = "fsl,ls1021a-lpuart";
 258                 reg = <0x0 0x22b0000 0x0 0x1000>;
 259                 interrupts = <0 237 0x4>;
 260                 clocks = <&sysclk>;
 261                 clock-names = "ipg";
 262                 little-endian;
 263                 status = "disabled";
 264         };
 265
 266         usb1: usb3@3100000 {
 267                 compatible = "fsl,layerscape-dwc3";
 268                 reg = <0x0 0x3100000 0x0 0x10000>;
 269                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 270                 dr_mode = "host";
 271                 status = "disabled";
 272         };
 273
 274         usb2: usb3@3110000 {
 275                 compatible = "fsl,layerscape-dwc3";
 276                 reg = <0x0 0x3110000 0x0 0x10000>;
 277                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 278                 dr_mode = "host";
 279                 status = "disabled";
 280         };
 281
 282         dspi0: dspi@2100000 {
 283                 compatible = "fsl,vf610-dspi";
 284                 #address-cells = <1>;
 285                 #size-cells = <0>;
 286                 reg = <0x0 0x2100000 0x0 0x10000>;
 287                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 288                 clock-names = "dspi";
 289                 clocks = <&clockgen 4 0>;
 290                 num-cs = <5>;
 291                 litte-endian;
 292                 status = "disabled";
 293         };
 294
 295         dspi1: dspi@2110000 {
 296                 compatible = "fsl,vf610-dspi";
 297                 #address-cells = <1>;
 298                 #size-cells = <0>;
 299                 reg = <0x0 0x2110000 0x0 0x10000>;
 300                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 301                 clock-names = "dspi";
 302                 clocks = <&clockgen 4 0>;
 303                 num-cs = <5>;
 304                 little-endian;
 305                 status = "disabled";
 306         };
 307
 308         dspi2: dspi@2120000 {
 309                 compatible = "fsl,vf610-dspi";
 310                 #address-cells = <1>;
 311                 #size-cells = <0>;
 312                 reg = <0x0 0x2120000 0x0 0x10000>;
 313                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 314                 clock-names = "dspi";
 315                 clocks = <&clockgen 4 0>;
 316                 num-cs = <5>;
 317                 little-endian;
 318                 status = "disabled";
 319         };
 320
 321         esdhc0: esdhc@2140000 {
 322                 compatible = "fsl,esdhc";
 323                 reg = <0x0 0x2140000 0x0 0x10000>;
 324                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 325                 big-endian;
 326                 bus-width = <4>;
 327                 status = "disabled";
 328         };
 329
 330         esdhc1: esdhc@2150000 {
 331                 compatible = "fsl,esdhc";
 332                 reg = <0x0 0x2150000 0x0 0x10000>;
 333                 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 334                 big-endian;
 335                 non-removable;
 336                 bus-width = <4>;
 337                 status = "disabled";
 338         };
 339
 340         gpio0: gpio@2300000 {
 341                 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
 342                 reg = <0x0 0x2300000 0x0 0x10000>;
 343                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 344                 gpio-controller;
 345                 #gpio-cells = <2>;
 346                 interrupt-controller;
 347                 #interrupt-cells = <2>;
 348                 little-endian;
 349         };
 350
 351         gpio1: gpio@2310000 {
 352                 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
 353                 reg = <0x0 0x2310000 0x0 0x10000>;
 354                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 355                 gpio-controller;
 356                 #gpio-cells = <2>;
 357                 interrupt-controller;
 358                 #interrupt-cells = <2>;
 359                 little-endian;
 360         };
 361
 362         gpio2: gpio@2320000 {
 363                 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
 364                 reg = <0x0 0x2320000 0x0 0x10000>;
 365                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 366                 gpio-controller;
 367                 #gpio-cells = <2>;
 368                 interrupt-controller;
 369                 #interrupt-cells = <2>;
 370                 little-endian;
 371         };
 372
 373         sata: sata@3200000 {
 374                 compatible = "fsl,ls1028a-ahci";
 375                 reg = <0x0 0x3200000 0x0 0x10000        /* ccsr sata base */
 376                        0x7 0x100520  0x0 0x4>;          /* ecc sata addr*/
 377                 reg-names = "sata-base", "ecc-addr";
 378                 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 379                 status = "disabled";
 380         };
 381
 382         cluster1_core0_watchdog: wdt@c000000 {
 383                 compatible = "arm,sp805-wdt";
 384                 reg = <0x0 0xc000000 0x0 0x1000>;
 385         };
 386
 387         soc: soc {
 388                 compatible = "simple-bus";
 389                 #address-cells = <2>;
 390                 #size-cells = <2>;
 391                 ranges;
 392
 393                 clockgen: clocking@1300000 {
 394                         compatible = "fsl,ls1028a-clockgen";
 395                         reg = <0x0 0x1300000 0x0 0xa0000>;
 396                         #clock-cells = <2>;
 397                         clocks = <&sysclk>;
 398                 };
 399
 400                 i2c0: i2c@2000000 {
 401                         compatible = "fsl,vf610-i2c";
 402                         #address-cells = <1>;
 403                         #size-cells = <0>;
 404                         reg = <0x0 0x2000000 0x0 0x10000>;
 405                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 406                         clock-names = "i2c";
 407                         clocks = <&clockgen 4 0>;
 408                         status = "disabled";
 409                 };
 410
 411                 i2c1: i2c@2010000 {
 412                         compatible = "fsl,vf610-i2c";
 413                         #address-cells = <1>;
 414                         #size-cells = <0>;
 415                         reg = <0x0 0x2010000 0x0 0x10000>;
 416                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 417                         clock-names = "i2c";
 418                         clocks = <&clockgen 4 0>;
 419                         status = "disabled";
 420                 };
 421
 422                 i2c2: i2c@2020000 {
 423                         compatible = "fsl,vf610-i2c";
 424                         #address-cells = <1>;
 425                         #size-cells = <0>;
 426                         reg = <0x0 0x2020000 0x0 0x10000>;
 427                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 428                         clock-names = "i2c";
 429                         clocks = <&clockgen 4 0>;
 430                         status = "disabled";
 431                 };
 432
 433                 i2c3: i2c@2030000 {
 434                         compatible = "fsl,vf610-i2c";
 435                         #address-cells = <1>;
 436                         #size-cells = <0>;
 437                         reg = <0x0 0x2030000 0x0 0x10000>;
 438                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 439                         clock-names = "i2c";
 440                         clocks = <&clockgen 4 0>;
 441                         status = "disabled";
 442                 };
 443
 444                 i2c4: i2c@2040000 {
 445                         compatible = "fsl,vf610-i2c";
 446                         #address-cells = <1>;
 447                         #size-cells = <0>;
 448                         reg = <0x0 0x2040000 0x0 0x10000>;
 449                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 450                         clock-names = "i2c";
 451                         clocks = <&clockgen 4 0>;
 452                         status = "disabled";
 453                 };
 454
 455                 i2c5: i2c@2050000 {
 456                         compatible = "fsl,vf610-i2c";
 457                         #address-cells = <1>;
 458                         #size-cells = <0>;
 459                         reg = <0x0 0x2050000 0x0 0x10000>;
 460                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 461                         clock-names = "i2c";
 462                         clocks = <&clockgen 4 0>;
 463                         status = "disabled";
 464                 };
 465
 466                 i2c6: i2c@2060000 {
 467                         compatible = "fsl,vf610-i2c";
 468                         #address-cells = <1>;
 469                         #size-cells = <0>;
 470                         reg = <0x0 0x2060000 0x0 0x10000>;
 471                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 472                         clock-names = "i2c";
 473                         clocks = <&clockgen 4 0>;
 474                         status = "disabled";
 475                 };
 476
 477                 i2c7: i2c@2070000 {
 478                         compatible = "fsl,vf610-i2c";
 479                         #address-cells = <1>;
 480                         #size-cells = <0>;
 481                         reg = <0x0 0x2070000 0x0 0x10000>;
 482                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 483                         clock-names = "i2c";
 484                         clocks = <&clockgen 4 0>;
 485                         status = "disabled";
 486                 };
 487         };
 488 };