arch/arm/dts/fsl-ls1028a.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR X11
   2 /*
   3  * NXP ls1028a SOC common device tree source
   4  *
   5  * Copyright 2019-2020 NXP
   6  *
   7  */
   8
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10
  11 / {
  12         compatible = "fsl,ls1028a";
  13         interrupt-parent = <&gic>;
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         sysclk: sysclk {
  18                 compatible = "fixed-clock";
  19                 #clock-cells = <0>;
  20                 clock-frequency = <100000000>;
  21                 clock-output-names = "sysclk";
  22         };
  23
  24         gic: interrupt-controller@6000000 {
  25                 compatible = "arm,gic-v3";
  26                 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
  27                           <0x0 0x06040000 0 0x40000>;
  28                 #interrupt-cells = <3>;
  29                 interrupt-controller;
  30                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
  31                                          IRQ_TYPE_LEVEL_LOW)>;
  32         };
  33
  34         timer {
  35                 compatible = "arm,armv8-timer";
  36                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
  37                                           IRQ_TYPE_LEVEL_LOW)>,
  38                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
  39                                           IRQ_TYPE_LEVEL_LOW)>,
  40                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
  41                                           IRQ_TYPE_LEVEL_LOW)>,
  42                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
  43                                           IRQ_TYPE_LEVEL_LOW)>;
  44         };
  45
  46         pcie1: pcie@3400000 {
  47                compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
  48                reg = <0x00 0x03400000 0x0 0x80000
  49                        0x00 0x03480000 0x0 0x40000   /* lut registers */
  50                        0x00 0x034c0000 0x0 0x40000  /* pf controls registers */
  51                        0x80 0x00000000 0x0 0x20000>; /* configuration space */
  52                reg-names = "dbi", "lut", "ctrl", "config";
  53                #address-cells = <3>;
  54                #size-cells = <2>;
  55                device_type = "pci";
  56                num-lanes = <4>;
  57                bus-range = <0x0 0xff>;
  58                ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000   /* downstream I/O */
  59                        0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
  60         };
  61
  62         pcie2: pcie@3500000 {
  63                compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
  64                reg = <0x00 0x03500000 0x0 0x80000
  65                        0x00 0x03580000 0x0 0x40000   /* lut registers */
  66                        0x00 0x035c0000 0x0 0x40000  /* pf controls registers */
  67                        0x88 0x00000000 0x0 0x20000>; /* configuration space */
  68                reg-names = "dbi", "lut", "ctrl", "config";
  69                #address-cells = <3>;
  70                #size-cells = <2>;
  71                device_type = "pci";
  72                num-lanes = <4>;
  73                bus-range = <0x0 0xff>;
  74                ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000   /* downstream I/O */
  75                        0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
  76         };
  77
  78         pcie@1f0000000 {
  79                 compatible = "pci-host-ecam-generic";
  80                 /* ECAM bus 0, HW has more space reserved but not populated */
  81                 bus-range = <0x0 0x0>;
  82                 reg = <0x01 0xf0000000 0x0 0x100000>;
  83                 #address-cells = <3>;
  84                 #size-cells = <2>;
  85                 device_type = "pci";
  86                 ranges= <0x82000000 0x0 0x00000000 0x1 0xf8000000 0x0 0x160000>;
  87                 enetc0: pci@0,0 {
  88                         reg = <0x000000 0 0 0 0>;
  89                         status = "disabled";
  90                 };
  91                 enetc1: pci@0,1 {
  92                         reg = <0x000100 0 0 0 0>;
  93                         status = "disabled";
  94                 };
  95                 enetc2: pci@0,2 {
  96                         reg = <0x000200 0 0 0 0>;
  97                         status = "disabled";
  98                         phy-mode = "internal";
  99
 100                         fixed-link {
 101                                 speed = <2500>;
 102                                 full-duplex;
 103                         };
 104                 };
 105                 mdio0: pci@0,3 {
 106                         #address-cells=<0>;
 107                         #size-cells=<1>;
 108                         reg = <0x000300 0 0 0 0>;
 109                         status = "disabled";
 110
 111                         fixed-link {
 112                                 speed = <1000>;
 113                                 full-duplex;
 114                         };
 115                 };
 116
 117                 mscc_felix: pci@0,5 {
 118                         reg = <0x000500 0 0 0 0>;
 119                         status = "disabled";
 120
 121                         ports {
 122                                 #address-cells = <1>;
 123                                 #size-cells = <0>;
 124
 125                                 mscc_felix_port0: port@0 {
 126                                         reg = <0>;
 127                                         status = "disabled";
 128                                 };
 129
 130                                 mscc_felix_port1: port@1 {
 131                                         reg = <1>;
 132                                         status = "disabled";
 133                                 };
 134
 135                                 mscc_felix_port2: port@2 {
 136                                         reg = <2>;
 137                                         status = "disabled";
 138                                 };
 139
 140                                 mscc_felix_port3: port@3 {
 141                                         reg = <3>;
 142                                         status = "disabled";
 143                                 };
 144
 145                                 mscc_felix_port4: port@4 {
 146                                         reg = <4>;
 147                                         phy-mode = "internal";
 148                                         status = "disabled";
 149
 150                                         fixed-link {
 151                                                 speed = <2500>;
 152                                                 full-duplex;
 153                                         };
 154                                 };
 155
 156                                 mscc_felix_port5: port@5 {
 157                                         reg = <5>;
 158                                         phy-mode = "internal";
 159                                         status = "disabled";
 160
 161                                         fixed-link {
 162                                                 speed = <1000>;
 163                                                 full-duplex;
 164                                         };
 165
 166                                 };
 167                         };
 168                 };
 169
 170                 enetc6: pci@0,6 {
 171                         reg = <0x000600 0 0 0 0>;
 172                         status = "disabled";
 173                         phy-mode = "internal";
 174                 };
 175         };
 176
 177         usb1: usb3@3100000 {
 178                 compatible = "fsl,layerscape-dwc3";
 179                 reg = <0x0 0x3100000 0x0 0x10000>;
 180                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 181                 dr_mode = "host";
 182                 status = "disabled";
 183         };
 184
 185         usb2: usb3@3110000 {
 186                 compatible = "fsl,layerscape-dwc3";
 187                 reg = <0x0 0x3110000 0x0 0x10000>;
 188                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 189                 dr_mode = "host";
 190                 status = "disabled";
 191         };
 192
 193         gpio0: gpio@2300000 {
 194                 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
 195                 reg = <0x0 0x2300000 0x0 0x10000>;
 196                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 197                 gpio-controller;
 198                 #gpio-cells = <2>;
 199                 interrupt-controller;
 200                 #interrupt-cells = <2>;
 201                 little-endian;
 202         };
 203
 204         gpio1: gpio@2310000 {
 205                 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
 206                 reg = <0x0 0x2310000 0x0 0x10000>;
 207                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 208                 gpio-controller;
 209                 #gpio-cells = <2>;
 210                 interrupt-controller;
 211                 #interrupt-cells = <2>;
 212                 little-endian;
 213         };
 214
 215         gpio2: gpio@2320000 {
 216                 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
 217                 reg = <0x0 0x2320000 0x0 0x10000>;
 218                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 219                 gpio-controller;
 220                 #gpio-cells = <2>;
 221                 interrupt-controller;
 222                 #interrupt-cells = <2>;
 223                 little-endian;
 224         };
 225
 226         sata: sata@3200000 {
 227                 compatible = "fsl,ls1028a-ahci";
 228                 reg = <0x0 0x3200000 0x0 0x10000        /* ccsr sata base */
 229                        0x7 0x100520  0x0 0x4>;          /* ecc sata addr*/
 230                 reg-names = "sata-base", "ecc-addr";
 231                 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 232                 status = "disabled";
 233         };
 234
 235         cluster1_core0_watchdog: wdt@c000000 {
 236                 compatible = "arm,sp805-wdt";
 237                 reg = <0x0 0xc000000 0x0 0x1000>;
 238         };
 239
 240         soc: soc {
 241                 compatible = "simple-bus";
 242                 #address-cells = <2>;
 243                 #size-cells = <2>;
 244                 ranges;
 245
 246                 clockgen: clocking@1300000 {
 247                         compatible = "fsl,ls1028a-clockgen";
 248                         reg = <0x0 0x1300000 0x0 0xa0000>;
 249                         #clock-cells = <2>;
 250                         clocks = <&sysclk>;
 251                 };
 252
 253                 i2c0: i2c@2000000 {
 254                         compatible = "fsl,vf610-i2c";
 255                         #address-cells = <1>;
 256                         #size-cells = <0>;
 257                         reg = <0x0 0x2000000 0x0 0x10000>;
 258                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 259                         clock-names = "i2c";
 260                         clocks = <&clockgen 4 0>;
 261                         status = "disabled";
 262                 };
 263
 264                 i2c1: i2c@2010000 {
 265                         compatible = "fsl,vf610-i2c";
 266                         #address-cells = <1>;
 267                         #size-cells = <0>;
 268                         reg = <0x0 0x2010000 0x0 0x10000>;
 269                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 270                         clock-names = "i2c";
 271                         clocks = <&clockgen 4 0>;
 272                         status = "disabled";
 273                 };
 274
 275                 i2c2: i2c@2020000 {
 276                         compatible = "fsl,vf610-i2c";
 277                         #address-cells = <1>;
 278                         #size-cells = <0>;
 279                         reg = <0x0 0x2020000 0x0 0x10000>;
 280                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 281                         clock-names = "i2c";
 282                         clocks = <&clockgen 4 0>;
 283                         status = "disabled";
 284                 };
 285
 286                 i2c3: i2c@2030000 {
 287                         compatible = "fsl,vf610-i2c";
 288                         #address-cells = <1>;
 289                         #size-cells = <0>;
 290                         reg = <0x0 0x2030000 0x0 0x10000>;
 291                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 292                         clock-names = "i2c";
 293                         clocks = <&clockgen 4 0>;
 294                         status = "disabled";
 295                 };
 296
 297                 i2c4: i2c@2040000 {
 298                         compatible = "fsl,vf610-i2c";
 299                         #address-cells = <1>;
 300                         #size-cells = <0>;
 301                         reg = <0x0 0x2040000 0x0 0x10000>;
 302                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 303                         clock-names = "i2c";
 304                         clocks = <&clockgen 4 0>;
 305                         status = "disabled";
 306                 };
 307
 308                 i2c5: i2c@2050000 {
 309                         compatible = "fsl,vf610-i2c";
 310                         #address-cells = <1>;
 311                         #size-cells = <0>;
 312                         reg = <0x0 0x2050000 0x0 0x10000>;
 313                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 314                         clock-names = "i2c";
 315                         clocks = <&clockgen 4 0>;
 316                         status = "disabled";
 317                 };
 318
 319                 i2c6: i2c@2060000 {
 320                         compatible = "fsl,vf610-i2c";
 321                         #address-cells = <1>;
 322                         #size-cells = <0>;
 323                         reg = <0x0 0x2060000 0x0 0x10000>;
 324                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 325                         clock-names = "i2c";
 326                         clocks = <&clockgen 4 0>;
 327                         status = "disabled";
 328                 };
 329
 330                 i2c7: i2c@2070000 {
 331                         compatible = "fsl,vf610-i2c";
 332                         #address-cells = <1>;
 333                         #size-cells = <0>;
 334                         reg = <0x0 0x2070000 0x0 0x10000>;
 335                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 336                         clock-names = "i2c";
 337                         clocks = <&clockgen 4 0>;
 338                         status = "disabled";
 339                 };
 340
 341                 fspi: flexspi@20c0000 {
 342                         compatible = "nxp,lx2160a-fspi";
 343                         #address-cells = <1>;
 344                         #size-cells = <0>;
 345                         reg = <0x0 0x20c0000 0x0 0x10000>,
 346                               <0x0 0x20000000 0x0 0x10000000>;
 347                         reg-names = "fspi_base", "fspi_mmap";
 348                         clocks = <&clockgen 4 3>, <&clockgen 4 3>;
 349                         clock-names = "fspi_en", "fspi";
 350                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 351                         status = "disabled";
 352                 };
 353
 354                 dspi0: dspi@2100000 {
 355                         compatible = "fsl,vf610-dspi";
 356                         #address-cells = <1>;
 357                         #size-cells = <0>;
 358                         reg = <0x0 0x2100000 0x0 0x10000>;
 359                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 360                         clock-names = "dspi";
 361                         clocks = <&clockgen 4 0>;
 362                         num-cs = <5>;
 363                         litte-endian;
 364                         status = "disabled";
 365                 };
 366
 367                 dspi1: dspi@2110000 {
 368                         compatible = "fsl,vf610-dspi";
 369                         #address-cells = <1>;
 370                         #size-cells = <0>;
 371                         reg = <0x0 0x2110000 0x0 0x10000>;
 372                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 373                         clock-names = "dspi";
 374                         clocks = <&clockgen 4 0>;
 375                         num-cs = <5>;
 376                         little-endian;
 377                         status = "disabled";
 378                 };
 379
 380                 dspi2: dspi@2120000 {
 381                         compatible = "fsl,vf610-dspi";
 382                         #address-cells = <1>;
 383                         #size-cells = <0>;
 384                         reg = <0x0 0x2120000 0x0 0x10000>;
 385                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 386                         clock-names = "dspi";
 387                         clocks = <&clockgen 4 0>;
 388                         num-cs = <5>;
 389                         little-endian;
 390                         status = "disabled";
 391                 };
 392
 393                 esdhc0: esdhc@2140000 {
 394                         compatible = "fsl,esdhc";
 395                         reg = <0x0 0x2140000 0x0 0x10000>;
 396                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 397                         big-endian;
 398                         bus-width = <4>;
 399                         status = "disabled";
 400                 };
 401
 402                 esdhc1: esdhc@2150000 {
 403                         compatible = "fsl,esdhc";
 404                         reg = <0x0 0x2150000 0x0 0x10000>;
 405                         interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 406                         big-endian;
 407                         non-removable;
 408                         bus-width = <4>;
 409                         status = "disabled";
 410                 };
 411
 412                 serial0: serial@21c0500 {
 413                         device_type = "serial";
 414                         compatible = "fsl,ns16550", "ns16550a";
 415                         reg = <0x0 0x21c0500 0x0 0x100>;
 416                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 417                         status = "disabled";
 418                 };
 419
 420                 serial1: serial@21c0600 {
 421                         device_type = "serial";
 422                         compatible = "fsl,ns16550", "ns16550a";
 423                         reg = <0x0 0x21c0600 0x0 0x100>;
 424                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 425                         status = "disabled";
 426                 };
 427
 428                 lpuart0: serial@2260000 {
 429                         compatible = "fsl,ls1021a-lpuart";
 430                         reg = <0x0 0x2260000 0x0 0x1000>;
 431                         interrupts = <0 232 0x4>;
 432                         clocks = <&sysclk>;
 433                         clock-names = "ipg";
 434                         little-endian;
 435                         status = "disabled";
 436                 };
 437
 438                 lpuart1: serial@2270000 {
 439                         compatible = "fsl,ls1021a-lpuart";
 440                         reg = <0x0 0x2270000 0x0 0x1000>;
 441                         interrupts = <0 233 0x4>;
 442                         clocks = <&sysclk>;
 443                         clock-names = "ipg";
 444                         little-endian;
 445                         status = "disabled";
 446                 };
 447
 448                 lpuart2: serial@2280000 {
 449                         compatible = "fsl,ls1021a-lpuart";
 450                         reg = <0x0 0x2280000 0x0 0x1000>;
 451                         interrupts = <0 234 0x4>;
 452                         clocks = <&sysclk>;
 453                         clock-names = "ipg";
 454                         little-endian;
 455                         status = "disabled";
 456                 };
 457
 458                 lpuart3: serial@2290000 {
 459                         compatible = "fsl,ls1021a-lpuart";
 460                         reg = <0x0 0x2290000 0x0 0x1000>;
 461                         interrupts = <0 235 0x4>;
 462                         clocks = <&sysclk>;
 463                         clock-names = "ipg";
 464                         little-endian;
 465                         status = "disabled";
 466                 };
 467
 468                 lpuart4: serial@22a0000 {
 469                         compatible = "fsl,ls1021a-lpuart";
 470                         reg = <0x0 0x22a0000 0x0 0x1000>;
 471                         interrupts = <0 236 0x4>;
 472                         clocks = <&sysclk>;
 473                         clock-names = "ipg";
 474                         little-endian;
 475                         status = "disabled";
 476                 };
 477
 478                 lpuart5: serial@22b0000 {
 479                         compatible = "fsl,ls1021a-lpuart";
 480                         reg = <0x0 0x22b0000 0x0 0x1000>;
 481                         interrupts = <0 237 0x4>;
 482                         clocks = <&sysclk>;
 483                         clock-names = "ipg";
 484                         little-endian;
 485                         status = "disabled";
 486                 };
 487         };
 488 };