1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * Copyright 2017-2019 Toradex
8 /* First 128KB is for PSCI ATF. */
9 /memreserve/ 0x80000000 0x00020000;
11 #include "fsl-imx8qm.dtsi"
12 #include "fsl-imx8qm-apalis-u-boot.dtsi"
15 model = "Toradex Apalis iMX8QM";
16 compatible = "toradex,apalis-imx8qm", "fsl,imx8qm";
19 bootargs = "console=ttyLP1,115200 earlycon=lpuart32,0x5a070000,115200";
20 stdout-path = &lpuart1;
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>,
27 <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>,
28 <&pinctrl_gpio12>, <&pinctrl_gpio34>, <&pinctrl_gpio56>,
29 <&pinctrl_gpio7>, <&pinctrl_gpio8>, <&pinctrl_gpio_bkl_on>,
30 <&pinctrl_gpio_keys>, <&pinctrl_gpio_pwm0>,
31 <&pinctrl_gpio_pwm1>, <&pinctrl_gpio_pwm2>,
32 <&pinctrl_gpio_pwm3>, <&pinctrl_gpio_pwm_bkl>,
33 <&pinctrl_gpio_usbh_en>, <&pinctrl_gpio_usbh_oc_n>,
34 <&pinctrl_gpio_usbo1_en>, <&pinctrl_gpio_usbo1_oc_n>,
35 <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>,
36 <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>,
37 <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>,
38 <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>,
39 <&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>;
42 pinctrl_gpio12: gpio12grp {
45 SC_P_M40_GPIO0_00_LSIO_GPIO0_IO08 0x06000021
47 SC_P_M40_GPIO0_01_LSIO_GPIO0_IO09 0x06000021
51 pinctrl_gpio34: gpio34grp {
54 SC_P_M41_GPIO0_00_LSIO_GPIO0_IO12 0x06000021
56 SC_P_M41_GPIO0_01_LSIO_GPIO0_IO13 0x06000021
60 pinctrl_gpio56: gpio56grp {
63 SC_P_FLEXCAN2_RX_LSIO_GPIO4_IO01 0x06000021
65 SC_P_FLEXCAN2_TX_LSIO_GPIO4_IO02 0x06000021
69 pinctrl_gpio7: gpio7 {
72 SC_P_MLB_SIG_LSIO_GPIO3_IO26 0x00000021
76 pinctrl_gpio8: gpio8 {
79 SC_P_MLB_DATA_LSIO_GPIO3_IO28 0x00000021
83 pinctrl_gpio_keys: gpio-keys {
85 /* Apalis WAKE1_MICO */
86 SC_P_SPI3_CS0_LSIO_GPIO2_IO20 0x06000021
90 pinctrl_fec1: fec1grp {
92 SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0 /* Use pads in 3.3V mode */
93 SC_P_ENET0_MDC_CONN_ENET0_MDC 0x06000020
94 SC_P_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020
95 SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020
96 SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020
97 SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020
98 SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020
99 SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020
100 SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020
101 SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020
102 SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020
103 SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020
104 SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020
105 SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020
106 SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020
107 SC_P_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M 0x06000020
109 SC_P_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x06000020
113 pinctrl_gpio_bkl_on: gpio-bkl-on {
116 SC_P_LVDS0_GPIO00_LSIO_GPIO1_IO04 0x00000021
120 /* Apalis I2C2 (DDC) */
121 pinctrl_lpi2c0: lpi2c0grp {
123 SC_P_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0x04000022
124 SC_P_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 0x04000022
128 pinctrl_cam1_gpios: cam1gpiosgrp {
131 SC_P_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO20 0x00000021
133 SC_P_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO21 0x00000021
135 SC_P_ESAI0_TX0_LSIO_GPIO2_IO26 0x00000021
137 SC_P_ESAI0_TX1_LSIO_GPIO2_IO27 0x00000021
139 SC_P_ESAI0_TX2_RX3_LSIO_GPIO2_IO28 0x00000021
141 SC_P_ESAI0_TX3_RX2_LSIO_GPIO2_IO29 0x00000021
143 SC_P_ESAI0_TX4_RX1_LSIO_GPIO2_IO30 0x00000021
145 SC_P_ESAI0_TX5_RX0_LSIO_GPIO2_IO31 0x00000021
146 /* Apalis CAM1_PCLK */
147 SC_P_MCLK_IN0_LSIO_GPIO3_IO00 0x00000021
148 /* Apalis CAM1_MCLK */
149 SC_P_SPI3_SDO_LSIO_GPIO2_IO18 0x00000021
150 /* Apalis CAM1_VSYNC */
151 SC_P_ESAI0_SCKR_LSIO_GPIO2_IO24 0x00000021
152 /* Apalis CAM1_HSYNC */
153 SC_P_ESAI0_SCKT_LSIO_GPIO2_IO25 0x00000021
157 pinctrl_dap1_gpios: dap1gpiosgrp {
159 /* Apalis DAP1_MCLK */
160 SC_P_SPI3_SDI_LSIO_GPIO2_IO19 0x00000021
161 /* Apalis DAP1_D_OUT */
162 SC_P_SAI1_RXC_LSIO_GPIO3_IO12 0x00000021
163 /* Apalis DAP1_RESET */
164 SC_P_ESAI1_SCKT_LSIO_GPIO2_IO07 0x00000021
165 /* Apalis DAP1_BIT_CLK */
166 SC_P_SPI0_CS1_LSIO_GPIO3_IO06 0x00000021
167 /* Apalis DAP1_D_IN */
168 SC_P_SAI1_RXFS_LSIO_GPIO3_IO14 0x00000021
169 /* Apalis DAP1_SYNC */
170 SC_P_SPI2_CS1_LSIO_GPIO3_IO11 0x00000021
172 SC_P_ESAI1_TX5_RX0_LSIO_GPIO2_IO13 0x00000021
176 pinctrl_esai0_gpios: esai0gpiosgrp {
179 SC_P_ESAI0_FSR_LSIO_GPIO2_IO22 0x00000021
181 SC_P_ESAI0_FST_LSIO_GPIO2_IO23 0x00000021
185 pinctrl_fec2_gpios: fec2gpiosgrp {
187 SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD 0x000014a0
189 SC_P_ENET1_MDC_LSIO_GPIO4_IO18 0x00000021
191 SC_P_ENET1_MDIO_LSIO_GPIO4_IO17 0x00000021
193 SC_P_ENET1_REFCLK_125M_25M_LSIO_GPIO4_IO16 0x00000021
195 SC_P_ENET1_RGMII_RX_CTL_LSIO_GPIO6_IO17 0x00000021
197 SC_P_ENET1_RGMII_RXD0_LSIO_GPIO6_IO18 0x00000021
198 /* Apalis LCD1_HSYNC */
199 SC_P_ENET1_RGMII_RXD1_LSIO_GPIO6_IO19 0x00000021
200 /* Apalis LCD1_VSYNC */
201 SC_P_ENET1_RGMII_RXD2_LSIO_GPIO6_IO20 0x00000021
202 /* Apalis LCD1_PCLK */
203 SC_P_ENET1_RGMII_RXD3_LSIO_GPIO6_IO21 0x00000021
205 SC_P_ENET1_RGMII_TX_CTL_LSIO_GPIO6_IO11 0x00000021
207 SC_P_ENET1_RGMII_TXC_LSIO_GPIO6_IO10 0x00000021
209 SC_P_ENET1_RGMII_TXD0_LSIO_GPIO6_IO12 0x00000021
211 SC_P_ENET1_RGMII_TXD1_LSIO_GPIO6_IO13 0x00000021
213 SC_P_ENET1_RGMII_TXD2_LSIO_GPIO6_IO14 0x00000021
217 pinctrl_lvds0_i2c0_gpio: lvds0i2c0gpio {
220 SC_P_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06 0x00000021
224 pinctrl_lvds1_i2c0_gpios: lvds1i2c0gpiosgrp {
227 SC_P_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12 0x00000021
229 SC_P_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13 0x00000021
233 pinctrl_mipi_dsi1_gpios: mipidsi1gpiosgrp {
236 SC_P_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO22 0x00000021
240 pinctrl_mlb_gpios: mlbgpiosgrp {
243 SC_P_MLB_CLK_LSIO_GPIO3_IO27 0x00000021
247 pinctrl_qspi1a_gpios: qspi1agpiosgrp {
250 SC_P_QSPI1A_DATA0_LSIO_GPIO4_IO26 0x00000021
252 SC_P_QSPI1A_DATA1_LSIO_GPIO4_IO25 0x00000021
254 SC_P_QSPI1A_DATA2_LSIO_GPIO4_IO24 0x00000021
256 SC_P_QSPI1A_DATA3_LSIO_GPIO4_IO23 0x00000021
258 SC_P_QSPI1A_DQS_LSIO_GPIO4_IO22 0x00000021
260 SC_P_QSPI1A_SCLK_LSIO_GPIO4_IO21 0x00000021
262 SC_P_QSPI1A_SS0_B_LSIO_GPIO4_IO19 0x00000021
264 SC_P_QSPI1A_SS1_B_LSIO_GPIO4_IO20 0x00000021
268 pinctrl_sim0_gpios: sim0gpiosgrp {
271 SC_P_SIM0_CLK_LSIO_GPIO0_IO00 0x00000021
273 SC_P_SIM0_GPIO0_00_LSIO_GPIO0_IO05 0x00000021
275 SC_P_SIM0_IO_LSIO_GPIO0_IO02 0x00000021
277 SC_P_SIM0_RST_LSIO_GPIO0_IO01 0x00000021
281 pinctrl_usdhc1_gpios: usdhc1gpiosgrp {
284 SC_P_USDHC1_STROBE_LSIO_GPIO5_IO23 0x00000021
288 pinctrl_mipi_dsi_0_1_en: mipi_dsi_0_1_en {
291 SC_P_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07 0x00000021
296 pinctrl_lpi2c1: lpi2c1grp {
298 SC_P_GPT0_CLK_DMA_I2C1_SCL 0x04000020
299 SC_P_GPT0_CAPTURE_DMA_I2C1_SDA 0x04000020
304 pinctrl_lpi2c2: lpi2c2grp {
306 SC_P_GPT1_CLK_DMA_I2C2_SCL 0x04000020
307 SC_P_GPT1_CAPTURE_DMA_I2C2_SDA 0x04000020
311 /* Apalis I2C3 (CAM) */
312 pinctrl_lpi2c3: lpi2c3grp {
314 SC_P_SIM0_PD_DMA_I2C3_SCL 0x04000020
315 SC_P_SIM0_POWER_EN_DMA_I2C3_SDA 0x04000020
320 pinctrl_lpuart0: lpuart0grp {
322 SC_P_UART0_RX_DMA_UART0_RX 0x06000020
323 SC_P_UART0_TX_DMA_UART0_TX 0x06000020
328 pinctrl_lpuart1: lpuart1grp {
330 SC_P_UART1_RX_DMA_UART1_RX 0x06000020
331 SC_P_UART1_TX_DMA_UART1_TX 0x06000020
332 SC_P_UART1_CTS_B_DMA_UART1_CTS_B 0x06000020
333 SC_P_UART1_RTS_B_DMA_UART1_RTS_B 0x06000020
337 pinctrl_lpuart1ctrl: lpuart1ctrlgrp {
339 /* Apalis UART1_DTR */
340 SC_P_M40_I2C0_SCL_LSIO_GPIO0_IO06 0x00000021
341 /* Apalis UART1_DSR */
342 SC_P_M40_I2C0_SDA_LSIO_GPIO0_IO07 0x00000021
343 /* Apalis UART1_DCD */
344 SC_P_M41_I2C0_SCL_LSIO_GPIO0_IO10 0x00000021
345 /* Apalis UART1_RI */
346 SC_P_M41_I2C0_SDA_LSIO_GPIO0_IO11 0x00000021
351 pinctrl_lpuart2: lpuart2grp {
353 SC_P_LVDS0_I2C1_SCL_DMA_UART2_TX 0x06000020
354 SC_P_LVDS0_I2C1_SDA_DMA_UART2_RX 0x06000020
359 pinctrl_lpuart3: lpuart3grp {
361 SC_P_LVDS1_I2C1_SCL_DMA_UART3_TX 0x06000020
362 SC_P_LVDS1_I2C1_SDA_DMA_UART3_RX 0x06000020
363 SC_P_ENET1_RGMII_TXD3_DMA_UART3_RTS_B 0x06000020
364 SC_P_ENET1_RGMII_RXC_DMA_UART3_CTS_B 0x06000020
369 pinctrl_gpio_pwm0: gpiopwm0grp {
371 SC_P_UART0_RTS_B_LSIO_GPIO0_IO22 0x00000021
376 pinctrl_gpio_pwm1: gpiopwm1grp {
378 SC_P_UART0_CTS_B_LSIO_GPIO0_IO23 0x00000021
383 pinctrl_gpio_pwm2: gpiopwm2grp {
385 SC_P_GPT1_COMPARE_LSIO_GPIO0_IO19 0x00000021
390 pinctrl_gpio_pwm3: gpiopwm3grp {
392 SC_P_GPT0_COMPARE_LSIO_GPIO0_IO16 0x00000021
396 /* Apalis BKL1_PWM */
397 pinctrl_gpio_pwm_bkl: gpiopwmbklgrp {
399 SC_P_LVDS1_GPIO00_LVDS1_GPIO0_IO00 0x00000021
404 pinctrl_gpio_usbh_en: gpiousbhen {
406 SC_P_USB_SS3_TC1_LSIO_GPIO4_IO04 0x06000060
410 /* Apalis USBH_OC# */
411 pinctrl_gpio_usbh_oc_n: gpiousbhocn {
413 SC_P_USB_SS3_TC3_LSIO_GPIO4_IO06 0x06000060
417 /* Apalis USBO1_EN */
418 pinctrl_gpio_usbo1_en: gpiousbo1en {
420 SC_P_USB_SS3_TC0_LSIO_GPIO4_IO03 0x06000060
424 /* Apalis USBO1_OC# */
425 pinctrl_gpio_usbo1_oc_n: gpiousbo1ocn {
427 SC_P_USB_SS3_TC2_LSIO_GPIO4_IO05 0x06000060
431 pinctrl_usdhc1: usdhc1grp {
433 SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
434 SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021
435 SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021
436 SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021
437 SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021
438 SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021
439 SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021
440 SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021
441 SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021
442 SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021
443 SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000041
444 SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000021
448 pinctrl_sata1_act: sata1actgrp {
450 /* Apalis SATA1_ACT# */
451 SC_P_ESAI1_TX0_LSIO_GPIO2_IO08 0x00000021
455 pinctrl_mmc1_cd: mmc1cdgrp {
457 /* Apalis MMC1_CD# */
458 SC_P_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021
462 pinctrl_usdhc2: usdhc2grp {
464 SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041
465 SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021
466 SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021
467 SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021
468 SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021
469 SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021
470 SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000021
471 SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000021
472 SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000021
473 SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000021
474 /* On-module PMIC use */
475 SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021
479 pinctrl_sd1_cd: sd1cdgrp {
482 SC_P_USDHC2_CD_B_LSIO_GPIO4_IO12 0x00000021
486 pinctrl_usdhc3: usdhc3grp {
488 SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041
489 SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021
490 SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021
491 SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021
492 SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021
493 SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021
494 /* On-module PMIC use */
495 SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021
502 pinctrl-names = "default";
503 pinctrl-0 = <&pinctrl_fec1>;
505 phy-handle = <ðphy0>;
507 phy-reset-duration = <10>;
508 phy-reset-gpios = <&gpio1 11 1>;
512 #address-cells = <1>;
515 ethphy0: ethernet-phy@7 {
516 compatible = "ethernet-phy-ieee802.3-c22";
522 /* Apalis I2C2 (DDC) */
524 #address-cells = <1>;
526 pinctrl-names = "default";
527 pinctrl-0 = <&pinctrl_lpi2c0>;
528 clock-frequency = <100000>;
534 #address-cells = <1>;
536 clock-frequency = <100000>;
537 pinctrl-names = "default";
538 pinctrl-0 = <&pinctrl_lpi2c1>;
544 #address-cells = <1>;
546 clock-frequency = <100000>;
547 pinctrl-names = "default";
548 pinctrl-0 = <&pinctrl_lpi2c2>;
552 /* Apalis I2C3 (CAM) */
554 #address-cells = <1>;
556 clock-frequency = <100000>;
557 pinctrl-names = "default";
558 pinctrl-0 = <&pinctrl_lpi2c3>;
564 pinctrl-names = "default";
565 pinctrl-0 = <&pinctrl_lpuart0>;
571 pinctrl-names = "default";
572 pinctrl-0 = <&pinctrl_lpuart1>;
578 pinctrl-names = "default";
579 pinctrl-0 = <&pinctrl_lpuart2>;
585 pinctrl-names = "default";
586 pinctrl-0 = <&pinctrl_lpuart3>;
592 pinctrl-names = "default";
593 pinctrl-0 = <&pinctrl_usdhc1>;
601 pinctrl-names = "default";
602 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_mmc1_cd>;
604 cd-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */
610 pinctrl-names = "default";
611 pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_sd1_cd>;
613 cd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; /* Apalis SD1_CD# */