ARM: dts: synquacer: Add device trees for DeveloperBox
[platform/kernel/u-boot.git] / arch / arm / dts / exynos5.dtsi
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (c) 2013 The Chromium OS Authors
4  * SAMSUNG EXYNOS5 SoC device tree source
5  */
6
7 #include "skeleton.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9
10 / {
11         compatible = "samsung,exynos5";
12
13         interrupt-parent = <&gic>;
14
15         combiner: interrupt-controller@10440000 {
16                 compatible = "samsung,exynos4210-combiner";
17                 #interrupt-cells = <2>;
18                 interrupt-controller;
19                 samsung,combiner-nr = <32>;
20                 reg = <0x10440000 0x1000>;
21                 interrupts =    <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
22                                 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
23                                 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
24                                 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
25                                 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
26                                 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
27                                 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
28                                 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
29         };
30
31         gic: interrupt-controller@10481000 {
32                 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
33                 #interrupt-cells = <3>;
34                 interrupt-controller;
35                 reg =   <0x10481000 0x1000>,
36                         <0x10482000 0x1000>,
37                         <0x10484000 0x2000>,
38                         <0x10486000 0x2000>;
39                 interrupts = <1 9 0xf04>;
40         };
41
42         sromc@12250000 {
43                 compatible = "samsung,exynos-sromc";
44                 reg = <0x12250000 0x20>;
45                 #address-cells = <1>;
46                 #size-cells = <0>;
47         };
48
49         i2c_0: i2c@12C60000 {
50                 compatible = "samsung,s3c2440-i2c";
51                 reg = <0x12C60000 0x100>;
52                 interrupts = <0 56 0>;
53                 #address-cells = <1>;
54                 #size-cells = <0>;
55         };
56
57         i2c_1: i2c@12C70000 {
58                 compatible = "samsung,s3c2440-i2c";
59                 reg = <0x12C70000 0x100>;
60                 interrupts = <0 57 0>;
61                 #address-cells = <1>;
62                 #size-cells = <0>;
63         };
64
65         i2c_2: i2c@12C80000 {
66                 compatible = "samsung,s3c2440-i2c";
67                 reg = <0x12C80000 0x100>;
68                 interrupts = <0 58 0>;
69                 #address-cells = <1>;
70                 #size-cells = <0>;
71         };
72
73         i2c_3: i2c@12C90000 {
74                 compatible = "samsung,s3c2440-i2c";
75                 reg = <0x12C90000 0x100>;
76                 interrupts = <0 59 0>;
77                 #address-cells = <1>;
78                 #size-cells = <0>;
79         };
80
81         spi_0: spi@12d20000 {
82                 #address-cells = <1>;
83                 #size-cells = <0>;
84                 compatible = "samsung,exynos-spi";
85                 reg = <0x12d20000 0x30>;
86                 interrupts = <0 68 0>;
87         };
88
89         spi_1: spi@12d30000 {
90                 #address-cells = <1>;
91                 #size-cells = <0>;
92                 compatible = "samsung,exynos-spi";
93                 reg = <0x12d30000 0x30>;
94                 interrupts = <0 69 0>;
95         };
96
97         spi_2: spi@12d40000 {
98                 #address-cells = <1>;
99                 #size-cells = <0>;
100                 compatible = "samsung,exynos-spi";
101                 reg = <0x12d40000 0x30>;
102                 clock-frequency = <50000000>;
103                 interrupts = <0 70 0>;
104         };
105
106         spi_3: spi@131a0000 {
107                 #address-cells = <1>;
108                 #size-cells = <0>;
109                 compatible = "samsung,exynos-spi";
110                 reg = <0x131a0000 0x30>;
111                 interrupts = <0 129 0>;
112         };
113
114         spi_4: spi@131b0000 {
115                 #address-cells = <1>;
116                 #size-cells = <0>;
117                 compatible = "samsung,exynos-spi";
118                 reg = <0x131b0000 0x30>;
119                 interrupts = <0 130 0>;
120         };
121
122         ehci@12110000 {
123                 compatible = "samsung,exynos-ehci";
124                 reg = <0x12110000 0x100>;
125                 #address-cells = <1>;
126                 #size-cells = <1>;
127
128                 phy {
129                         compatible = "samsung,exynos-usb-phy";
130                         reg = <0x12130000 0x100>;
131                 };
132         };
133
134         tmu@10060000 {
135                 compatible = "samsung,exynos-tmu";
136                 reg = <0x10060000 0x10000>;
137         };
138
139         fimd@14400000 {
140                 u-boot,dm-pre-reloc;
141                 compatible = "samsung,exynos-fimd";
142                 reg = <0x14400000 0x10000>;
143                 #address-cells = <1>;
144                 #size-cells = <1>;
145         };
146
147         dp: dp@145b0000 {
148                 compatible = "samsung,exynos5-dp";
149                 reg = <0x145b0000 0x1000>;
150         };
151
152         xhci0: xhci@12000000 {
153                 compatible = "samsung,exynos5250-xhci";
154                 reg = <0x12000000 0x10000>;
155                 #address-cells = <1>;
156                 #size-cells = <1>;
157
158                 phy {
159                         compatible = "samsung,exynos5250-usb3-phy";
160                         reg = <0x12100000 0x100>;
161                 };
162         };
163
164         mmc@12200000 {
165                 #address-cells = <1>;
166                 #size-cells = <0>;
167                 compatible = "samsung,exynos-dwmmc";
168                 reg = <0x12200000 0x1000>;
169                 interrupts = <0 75 0>;
170         };
171
172         mmc@12210000 {
173                 #address-cells = <1>;
174                 #size-cells = <0>;
175                 compatible = "samsung,exynos-dwmmc";
176                 reg = <0x12210000 0x1000>;
177                 interrupts = <0 76 0>;
178         };
179
180         mmc@12220000 {
181                 #address-cells = <1>;
182                 #size-cells = <0>;
183                 compatible = "samsung,exynos-dwmmc";
184                 reg = <0x12220000 0x1000>;
185                 interrupts = <0 77 0>;
186         };
187
188         mmc@12230000 {
189                 #address-cells = <1>;
190                 #size-cells = <0>;
191                 compatible = "samsung,exynos-dwmmc";
192                 reg = <0x12230000 0x1000>;
193                 interrupts = <0 78 0>;
194         };
195
196         serial@12C00000 {
197                 compatible = "samsung,exynos4210-uart";
198                 reg = <0x12C00000 0x100>;
199                 interrupts = <0 51 0>;
200                 id = <0>;
201         };
202
203         serial@12C10000 {
204                 compatible = "samsung,exynos4210-uart";
205                 reg = <0x12C10000 0x100>;
206                 interrupts = <0 52 0>;
207                 id = <1>;
208         };
209
210         serial@12C20000 {
211                 compatible = "samsung,exynos4210-uart";
212                 reg = <0x12C20000 0x100>;
213                 interrupts = <0 53 0>;
214                 id = <2>;
215         };
216
217         serial@12C30000 {
218                 compatible = "samsung,exynos4210-uart";
219                 reg = <0x12C30000 0x100>;
220                 interrupts = <0 54 0>;
221                 u-boot,dm-pre-reloc;
222                 id = <3>;
223         };
224 };