Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
[platform/kernel/u-boot.git] / arch / arm / dts / beacon-renesom-baseboard.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright 2020, Compass Electronics Group, LLC
4  */
5
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8
9 / {
10         aliases {
11                 serial0 = &scif2;
12                 serial1 = &hscif0;
13                 serial2 = &hscif1;
14                 serial3 = &scif0;
15                 serial4 = &hscif2;
16                 serial5 = &scif5;
17                 spi0 = &msiof0;
18                 spi1 = &msiof1;
19                 spi2 = &msiof2;
20                 spi3 = &msiof3;
21                 ethernet0 = &avb;
22         };
23
24         chosen {
25                 stdout-path = "serial0:115200n8";
26         };
27
28         backlight: backlight {
29                 compatible = "pwm-backlight";
30                 power-supply = <&reg_lcd>;
31                 enable-gpios = <&gpio_exp1 3 GPIO_ACTIVE_HIGH>;
32                 pwms = <&pwm0 0 50000>;
33                 brightness-levels = <0 4 8 16 32 64 128 255>;
34                 default-brightness-level = <6>;
35         };
36
37         hdmi0-out {
38                 compatible = "hdmi-connector";
39                 type = "a";
40
41                 port {
42                         hdmi0_con: endpoint {
43                                 remote-endpoint = <&rcar_dw_hdmi0_out>;
44                         };
45                 };
46         };
47
48         keys {
49                 compatible = "gpio-keys";
50
51                 key-1 {
52                         gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
53                         linux,code = <KEY_1>;
54                         label = "Switch-1";
55                         wakeup-source;
56                         debounce-interval = <20>;
57                 };
58                 key-2 {
59                         gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
60                         linux,code = <KEY_2>;
61                         label = "Switch-2";
62                         wakeup-source;
63                         debounce-interval = <20>;
64                 };
65                 key-3 {
66                         gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
67                         linux,code = <KEY_3>;
68                         label = "Switch-3";
69                         wakeup-source;
70                         debounce-interval = <20>;
71                 };
72                 key-4 {
73                         gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
74                         linux,code = <KEY_4>;
75                         label = "Switch-4";
76                         wakeup-source;
77                         debounce-interval = <20>;
78                 };
79                 key-5 {
80                         gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
81                         linux,code = <KEY_5>;
82                         label = "Switch-4";
83                         wakeup-source;
84                         debounce-interval = <20>;
85                 };
86         };
87
88         leds {
89                 compatible = "gpio-leds";
90                 pinctrl-0 = <&led_pins>;
91                 pinctrl-names = "default";
92
93                 led0 {
94                         gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
95                         label = "LED0";
96                         linux,default-trigger = "heartbeat";
97                 };
98                 led1 {
99                         gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
100                         label = "LED1";
101                         linux,default-trigger = "heartbeat";
102                 };
103                 led2 {
104                         gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
105                         label = "LED2";
106                         linux,default-trigger = "heartbeat";
107                 };
108                 led3 {
109                         gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
110                         label = "LED3";
111                         linux,default-trigger = "heartbeat";
112                 };
113         };
114
115         reg_audio: regulator_audio {
116                 compatible = "regulator-fixed";
117                 regulator-name = "audio-1.8V";
118                 regulator-min-microvolt = <1800000>;
119                 regulator-max-microvolt = <1800000>;
120                 gpio = <&gpio_exp2 7 GPIO_ACTIVE_HIGH>;
121                 enable-active-high;
122         };
123
124         reg_lcd: regulator-lcd {
125                 compatible = "regulator-fixed";
126                 regulator-name = "lcd_panel_pwr";
127                 regulator-min-microvolt = <3300000>;
128                 regulator-max-microvolt = <3300000>;
129                 gpio = <&gpio_exp1 1 GPIO_ACTIVE_HIGH>;
130                 enable-active-high;
131         };
132
133         reg_lcd_reset: regulator-lcd-reset {
134                 compatible = "regulator-fixed";
135                 regulator-name = "nLCD_RESET";
136                 regulator-min-microvolt = <3300000>;
137                 regulator-max-microvolt = <3300000>;
138                 gpio = <&gpio5 3 GPIO_ACTIVE_HIGH>;
139                 enable-active-high;
140                 vin-supply = <&reg_lcd>;
141         };
142
143         reg_cam0: regulator_camera {
144                 compatible = "regulator-fixed";
145                 regulator-name = "reg_cam0";
146                 regulator-min-microvolt = <1800000>;
147                 regulator-max-microvolt = <1800000>;
148                 gpio = <&gpio_exp2 2 GPIO_ACTIVE_HIGH>;
149                 enable-active-high;
150         };
151
152         reg_cam1: regulator_camera {
153                 compatible = "regulator-fixed";
154                 regulator-name = "reg_cam1";
155                 regulator-min-microvolt = <1800000>;
156                 regulator-max-microvolt = <1800000>;
157                 gpio = <&gpio_exp2 5 GPIO_ACTIVE_HIGH>;
158                 enable-active-high;
159                 startup-delay-us = <100000>;
160         };
161
162         sound_card {
163                 compatible = "audio-graph-card";
164                 label = "rcar-sound";
165                 dais = <&rsnd_port0>, <&rsnd_port1>;
166         };
167
168         vccq_sdhi0: regulator-vccq-sdhi0 {
169                 compatible = "regulator-gpio";
170
171                 regulator-name = "SDHI0 VccQ";
172                 regulator-min-microvolt = <1800000>;
173                 regulator-max-microvolt = <3300000>;
174
175                 gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
176                 gpios-states = <1>;
177                 states = <3300000 1>, <1800000 0>;
178                 regulator-always-on;
179         };
180
181         /* External DU dot clocks */
182         x302_clk: x302-clock {
183                 compatible = "fixed-clock";
184                 #clock-cells = <0>;
185                 clock-frequency = <33000000>;
186         };
187
188         x304_clk: x304-clock {
189                 compatible = "fixed-clock";
190                 #clock-cells = <0>;
191                 clock-frequency = <25000000>;
192         };
193 };
194
195 &audio_clk_a {
196         clock-frequency = <22579200>;
197 };
198
199 &audio_clk_b {
200         clock-frequency = <22579200>;
201 };
202
203 &can0 {
204         pinctrl-0 = <&can0_pins>;
205         pinctrl-names = "default";
206         renesas,can-clock-select = <0x0>;
207         status = "okay";
208 };
209
210 &can1 {
211         pinctrl-0 = <&can1_pins>;
212         pinctrl-names = "default";
213         renesas,can-clock-select = <0x0>;
214         status = "okay";
215 };
216
217 &du {
218         pinctrl-0 = <&du_pins>;
219         pinctrl-names = "default";
220         status = "okay";
221
222         clocks = <&cpg CPG_MOD 724>,
223                 <&cpg CPG_MOD 723>,
224                 <&cpg CPG_MOD 722>,
225                 <&versaclock5 1>,
226                 <&x302_clk>,
227                 <&versaclock5 2>;
228         clock-names = "du.0", "du.1", "du.2",
229                 "dclkin.0", "dclkin.1", "dclkin.2";
230 };
231
232 &ehci0 {
233         dr_mode = "otg";
234         status = "okay";
235         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>, <&versaclock6_bb 4>;
236 };
237
238 &ehci1 {
239         status = "okay";
240         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 4>;
241 };
242
243 &hdmi0 {
244         status = "okay";
245         ports {
246                 #address-cells = <1>;
247                 #size-cells = <0>;
248                 port@0 {
249                         reg = <0>;
250                         dw_hdmi0_in: endpoint {
251                                 remote-endpoint = <&du_out_hdmi0>;
252                         };
253                 };
254                 port@1 {
255                         reg = <1>;
256                         rcar_dw_hdmi0_out: endpoint {
257                                 remote-endpoint = <&hdmi0_con>;
258                         };
259                 };
260                 port@2 {
261                         /* HDMI sound */
262                         reg = <2>;
263                         dw_hdmi0_snd_in: endpoint {
264                                 remote-endpoint = <&rsnd_endpoint1>;
265                         };
266                 };
267         };
268 };
269
270 &hscif1 {
271         pinctrl-0 = <&hscif1_pins>;
272         pinctrl-names = "default";
273         uart-has-rtscts;
274         status = "okay";
275 };
276
277 &hsusb {
278         dr_mode = "otg";
279         status = "okay";
280 };
281
282 &i2c2 {
283         status = "okay";
284         clock-frequency = <100000>;
285         pinctrl-0 = <&i2c2_pins>;
286         pinctrl-names = "default";
287
288         gpio_exp2: gpio@21 {
289                 compatible = "onnn,pca9654";
290                 reg = <0x21>;
291                 gpio-controller;
292                 #gpio-cells = <2>;
293         };
294
295         gpio_exp3: gpio@22 {
296                 compatible = "onnn,pca9654";
297                 reg = <0x22>;
298                 gpio-controller;
299                 #gpio-cells = <2>;
300         };
301
302         versaclock6_bb: versaclock6_bb@6a {
303                 compatible = "idt,5p49v6965";
304                 reg = <0x6a>;
305                 #clock-cells = <1>;
306                 clocks = <&x304_clk>;
307                 clock-names = "xin";
308                 /* CSI0_MCLK, CSI1_MCLK, AUDIO_CLKIN, USB_HUB_MCLK_BB */
309                 assigned-clocks = <&versaclock6_bb 1>,
310                                    <&versaclock6_bb 2>,
311                                    <&versaclock6_bb 3>,
312                                    <&versaclock6_bb 4>;
313                 assigned-clock-rates =  <24000000>, <24000000>, <24000000>, <24000000>;
314         };
315 };
316
317 &i2c0 {
318         status = "okay";
319         clock-frequency = <400000>;
320
321         pinctrl-0 = <&i2c0_pins>;
322         pinctrl-names = "default";
323 };
324
325 &i2c5 {
326         status = "okay";
327         clock-frequency = <100000>;
328         pinctrl-0 = <&i2c5_pins>;
329         pinctrl-names = "default";
330
331         codec: wm8962@1a {
332                 compatible = "wlf,wm8962";
333                 reg = <0x1a>;
334                 DCVDD-supply = <&reg_audio>;
335                 DBVDD-supply = <&reg_audio>;
336                 AVDD-supply = <&reg_audio>;
337                 CPVDD-supply = <&reg_audio>;
338                 MICVDD-supply = <&reg_audio>;
339                 PLLVDD-supply = <&reg_audio>;
340                 SPKVDD1-supply = <&reg_audio>;
341                 SPKVDD2-supply = <&reg_audio>;
342                 gpio-cfg = <
343                         0x0000 /* 0:Default */
344                         0x0000 /* 1:Default */
345                         0x0000 /* 2:Default */
346                         0x0000 /* 3:Default */
347                         0x0000 /* 4:Default */
348                         0x0000 /* 5:Default */
349                 >;
350                 port {
351                         wm8962_endpoint: endpoint {
352                                 remote-endpoint = <&rsnd_endpoint0>;
353                         };
354                 };
355         };
356
357         /* 0 - lcd_reset */
358         /* 1 - lcd_pwr */
359         /* 2 - lcd_select */
360         /* 3 - backlight-enable */
361         /* 4 - Touch_shdwn */
362         /* 5 - LCD_H_pol */
363         /* 6 - lcd_V_pol */
364         gpio_exp1: gpio@20 {
365                 compatible = "onnn,pca9654";
366                 reg = <0x20>;
367                 gpio-controller;
368                 #gpio-cells = <2>;
369         };
370
371         touchscreen@26 {
372                 compatible = "ilitek,ili2117";
373                 reg = <0x26>;
374                 interrupt-parent = <&gpio5>;
375                 interrupts = <9 IRQ_TYPE_EDGE_RISING>;
376                 wakeup-source;
377         };
378 };
379
380 &ohci0 {
381         dr_mode = "otg";
382         status = "okay";
383 };
384
385 &ohci1 {
386         status = "okay";
387 };
388
389 &pciec0 {
390         status = "okay";
391 };
392
393 &pciec1 {
394         status = "okay";
395 };
396
397 &pcie_bus_clk {
398         clock-frequency = <100000000>;
399 };
400
401 &pfc {
402         can0_pins: can0 {
403                 groups = "can0_data_a";
404                 function = "can0";
405         };
406
407         can1_pins: can1 {
408                 groups = "can1_data";
409                 function = "can1";
410         };
411
412         du_pins: du {
413                 groups = "du_rgb888", "du_sync", "du_clk_out_1", "du_disp";
414                 function = "du";
415         };
416
417         i2c2_pins: i2c2 {
418                 groups = "i2c2_a";
419                 function = "i2c2";
420         };
421
422         i2c5_pins: i2c5 {
423                 groups = "i2c5";
424                 function = "i2c5";
425         };
426
427         led_pins: leds {
428                 /* GP_0_4 , AVS1, AVS2, GP_7_3 */
429                 pins = "GP_0_4", "GP_7_0", "GP_7_1", "GP_7_3";
430                 bias-pull-down;
431         };
432
433         msiof1_pins: msiof1 {
434                 groups = "msiof1_clk_g", "msiof1_rxd_g", "msiof1_txd_g";
435                 function = "msiof1";
436         };
437
438         pwm0_pins: pwm0 {
439                 groups = "pwm0";
440                 function = "pwm0";
441         };
442
443         sdhi0_pins: sd0 {
444                 groups = "sdhi0_data4", "sdhi0_ctrl";
445                 function = "sdhi0";
446                 power-source = <3300>;
447         };
448
449         sdhi0_pins_uhs: sd0_uhs {
450                 groups = "sdhi0_data4", "sdhi0_ctrl";
451                 function = "sdhi0";
452                 power-source = <1800>;
453         };
454
455         sound_pins: sound {
456                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
457                 function = "ssi";
458         };
459
460         sound_clk_pins: sound_clk {
461                 groups = "audio_clk_a_a";
462                 function = "audio_clk";
463         };
464
465         usb0_pins: usb0 {
466                 mux {
467                         groups = "usb0";
468                         function = "usb0";
469                 };
470         };
471
472         usb1_pins: usb1 {
473                 mux {
474                         groups = "usb1";
475                         function = "usb1";
476                 };
477         };
478
479         usb30_pins: usb30 {
480                 mux {
481                         groups = "usb30";
482                         function = "usb30";
483                 };
484         };
485 };
486
487 &pwm0 {
488         pinctrl-0 = <&pwm0_pins>;
489         pinctrl-names = "default";
490         status = "okay";
491 };
492
493 &rcar_sound {
494         pinctrl-0 = <&sound_pins &sound_clk_pins>;
495         pinctrl-names = "default";
496
497         /* Single DAI */
498         #sound-dai-cells = <0>;
499
500         /* audio_clkout0/1/2/3 */
501         #clock-cells = <1>;
502         clock-frequency = <11289600>;
503
504         status = "okay";
505
506         clocks = <&cpg CPG_MOD 1005>,
507                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
508                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
509                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
510                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
511                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
512                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
513                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
514                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
515                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
516                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
517                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
518                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
519                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
520                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
521                  <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
522
523         ports {
524                 #address-cells = <1>;
525                 #size-cells = <0>;
526                 rsnd_port0: port@0 {
527                         reg = <0>;
528                         rsnd_endpoint0: endpoint {
529                                 remote-endpoint = <&wm8962_endpoint>;
530
531                                 dai-format = "i2s";
532                                 bitclock-master = <&rsnd_endpoint0>;
533                                 frame-master = <&rsnd_endpoint0>;
534
535                                 playback = <&ssi1 &dvc1 &src1>;
536                                 capture = <&ssi0>;
537                         };
538                 };
539                 rsnd_port1: port@1 {
540                     reg = <0x01>;
541                         rsnd_endpoint1: endpoint {
542                                 remote-endpoint = <&dw_hdmi0_snd_in>;
543
544                                 dai-format = "i2s";
545                                 bitclock-master = <&rsnd_endpoint1>;
546                                 frame-master = <&rsnd_endpoint1>;
547
548                                 playback = <&ssi2>;
549                         };
550                 };
551         };
552 };
553
554 &scif0 {
555         pinctrl-0 = <&scif0_pins>;
556         pinctrl-names = "default";
557         status = "okay";
558 };
559
560 &scif5 {
561         pinctrl-0 = <&scif5_pins>;
562         pinctrl-names = "default";
563         status = "okay";
564 };
565
566 &scif_clk {
567         clock-frequency = <14745600>;
568 };
569
570 &sdhi0 {
571         pinctrl-0 = <&sdhi0_pins>;
572         pinctrl-1 = <&sdhi0_pins_uhs>;
573         pinctrl-names = "default", "state_uhs";
574         vmmc-supply = <&reg_3p3v>;
575         vqmmc-supply = <&vccq_sdhi0>;
576         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
577         bus-width = <4>;
578         sd-uhs-sdr50;
579         sd-uhs-sdr104;
580         status = "okay";
581 };
582
583 &ssi1 {
584         shared-pin;
585 };
586
587 &usb2_phy0 {
588         pinctrl-0 = <&usb0_pins>;
589         pinctrl-names = "default";
590         status = "okay";
591 };
592
593 &usb2_phy1 {
594         pinctrl-0 = <&usb1_pins>;
595         pinctrl-names = "default";
596         status = "okay";
597 };