arch/arm/dts/bcm6858.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com>
   4  */
   5
   6 #include "skeleton64.dtsi"
   7
   8 / {
   9         compatible = "brcm,bcm6858";
  10         #address-cells = <2>;
  11         #size-cells = <2>;
  12
  13         cpus {
  14                 #address-cells = <2>;
  15                 #size-cells = <0>;
  16                 u-boot,dm-pre-reloc;
  17
  18                 cpu0: cpu@0 {
  19                         compatible = "arm,cortex-a53", "arm,armv8";
  20                         device_type = "cpu";
  21                         reg = <0x0 0x0>;
  22                         next-level-cache = <&l2>;
  23                         u-boot,dm-pre-reloc;
  24                 };
  25
  26                 cpu1: cpu@1 {
  27                         compatible = "arm,cortex-a53", "arm,armv8";
  28                         device_type = "cpu";
  29                         reg = <0x0 0x1>;
  30                         next-level-cache = <&l2>;
  31                         u-boot,dm-pre-reloc;
  32                 };
  33
  34                 cpu2: cpu@2 {
  35                         compatible = "arm,cortex-a53", "arm,armv8";
  36                         device_type = "cpu";
  37                         reg = <0x0 0x2>;
  38                         next-level-cache = <&l2>;
  39                         u-boot,dm-pre-reloc;
  40                 };
  41
  42                 cpu3: cpu@3 {
  43                         compatible = "arm,cortex-a53", "arm,armv8";
  44                         device_type = "cpu";
  45                         reg = <0x0 0x3>;
  46                         next-level-cache = <&l2>;
  47                         u-boot,dm-pre-reloc;
  48                 };
  49
  50                 l2: l2-cache0 {
  51                         compatible = "cache";
  52                         u-boot,dm-pre-reloc;
  53                 };
  54         };
  55
  56         clocks {
  57                 compatible = "simple-bus";
  58                 #address-cells = <2>;
  59                 #size-cells = <2>;
  60                 ranges;
  61                 u-boot,dm-pre-reloc;
  62
  63                 periph_osc: periph-osc {
  64                         compatible = "fixed-clock";
  65                         #clock-cells = <0>;
  66                         clock-frequency = <200000000>;
  67                         u-boot,dm-pre-reloc;
  68                 };
  69         };
  70
  71         ubus {
  72                 compatible = "simple-bus";
  73                 #address-cells = <2>;
  74                 #size-cells = <2>;
  75                 u-boot,dm-pre-reloc;
  76
  77                 uart0: serial@ff800640 {
  78                         compatible = "brcm,bcm6858-uart";
  79                         reg = <0x0 0xff800640 0x0 0x18>;
  80                         clocks = <&periph_osc>;
  81
  82                         status = "disabled";
  83                 };
  84         };
  85 };