arch/arm/dts/at91sam9260.dtsi

   1 /*
   2  * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
   3  *
   4  *  Copyright (C) 2011 Atmel,
   5  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
   6  *                2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   7  *
   8  * Licensed under GPLv2 or later.
   9  */
  10
  11 #include "skeleton.dtsi"
  12 #include <dt-bindings/pinctrl/at91.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/clock/at91.h>
  16
  17 / {
  18         model = "Atmel AT91SAM9260 family SoC";
  19         compatible = "atmel,at91sam9260";
  20         interrupt-parent = <&aic>;
  21
  22         aliases {
  23                 serial0 = &dbgu;
  24                 serial1 = &usart0;
  25                 serial2 = &usart1;
  26                 serial3 = &usart2;
  27                 serial4 = &usart3;
  28                 serial5 = &uart0;
  29                 serial6 = &uart1;
  30                 gpio0 = &pioA;
  31                 gpio1 = &pioB;
  32                 gpio2 = &pioC;
  33                 tcb0 = &tcb0;
  34                 tcb1 = &tcb1;
  35                 i2c0 = &i2c0;
  36                 ssc0 = &ssc0;
  37                 spi0 = &spi0;
  38         };
  39         cpus {
  40                 cpu {
  41                         compatible = "arm,arm926ej-s";
  42                         device_type = "cpu";
  43                 };
  44         };
  45
  46         memory {
  47                 reg = <0x20000000 0x04000000>;
  48         };
  49
  50         clocks {
  51                 slow_xtal: slow_xtal {
  52                         compatible = "fixed-clock";
  53                         #clock-cells = <0>;
  54                         clock-frequency = <0>;
  55                 };
  56
  57                 main_xtal: main_xtal {
  58                         compatible = "fixed-clock";
  59                         #clock-cells = <0>;
  60                         clock-frequency = <0>;
  61                 };
  62
  63                 adc_op_clk: adc_op_clk{
  64                         compatible = "fixed-clock";
  65                         #clock-cells = <0>;
  66                         clock-frequency = <5000000>;
  67                 };
  68         };
  69
  70         sram0: sram@002ff000 {
  71                 compatible = "mmio-sram";
  72                 reg = <0x002ff000 0x2000>;
  73         };
  74
  75         ahb {
  76                 compatible = "simple-bus";
  77                 #address-cells = <1>;
  78                 #size-cells = <1>;
  79                 ranges;
  80                 u-boot,dm-pre-reloc;
  81
  82                 apb {
  83                         compatible = "simple-bus";
  84                         #address-cells = <1>;
  85                         #size-cells = <1>;
  86                         ranges;
  87                         u-boot,dm-pre-reloc;
  88
  89                         aic: interrupt-controller@fffff000 {
  90                                 #interrupt-cells = <3>;
  91                                 compatible = "atmel,at91rm9200-aic";
  92                                 interrupt-controller;
  93                                 reg = <0xfffff000 0x200>;
  94                                 atmel,external-irqs = <29 30 31>;
  95                         };
  96
  97                         ramc0: ramc@ffffea00 {
  98                                 compatible = "atmel,at91sam9260-sdramc";
  99                                 reg = <0xffffea00 0x200>;
 100                         };
 101
 102                         pmc: pmc@fffffc00 {
 103                                 compatible = "atmel,at91sam9260-pmc", "syscon";
 104                                 reg = <0xfffffc00 0x100>;
 105                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 106                                 interrupt-controller;
 107                                 #address-cells = <1>;
 108                                 #size-cells = <0>;
 109                                 #interrupt-cells = <1>;
 110                                 u-boot,dm-pre-reloc;
 111
 112                                 main_osc: main_osc {
 113                                         compatible = "atmel,at91rm9200-clk-main-osc";
 114                                         #clock-cells = <0>;
 115                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 116                                         clocks = <&main_xtal>;
 117                                 };
 118
 119                                 main: mainck {
 120                                         compatible = "atmel,at91rm9200-clk-main";
 121                                         #clock-cells = <0>;
 122                                         clocks = <&main_osc>;
 123                                 };
 124
 125                                 slow_rc_osc: slow_rc_osc {
 126                                         compatible = "fixed-clock";
 127                                         #clock-cells = <0>;
 128                                         clock-frequency = <32768>;
 129                                         clock-accuracy = <50000000>;
 130                                 };
 131
 132                                 clk32k: slck {
 133                                         compatible = "atmel,at91sam9260-clk-slow";
 134                                         #clock-cells = <0>;
 135                                         clocks = <&slow_rc_osc>, <&slow_xtal>;
 136                                 };
 137
 138                                 plla: pllack@0 {
 139                                         compatible = "atmel,at91rm9200-clk-pll";
 140                                         #clock-cells = <0>;
 141                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 142                                         clocks = <&main>;
 143                                         reg = <0>;
 144                                         atmel,clk-input-range = <1000000 32000000>;
 145                                         #atmel,pll-clk-output-range-cells = <4>;
 146                                         atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
 147                                                                 <150000000 240000000 2 1>;
 148                                 };
 149
 150                                 pllb: pllbck@1 {
 151                                         compatible = "atmel,at91rm9200-clk-pll";
 152                                         #clock-cells = <0>;
 153                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
 154                                         clocks = <&main>;
 155                                         reg = <1>;
 156                                         atmel,clk-input-range = <1000000 5000000>;
 157                                         #atmel,pll-clk-output-range-cells = <4>;
 158                                         atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
 159                                 };
 160
 161                                 mck: masterck {
 162                                         compatible = "atmel,at91rm9200-clk-master";
 163                                         #clock-cells = <0>;
 164                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 165                                         clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
 166                                         atmel,clk-output-range = <0 105000000>;
 167                                         atmel,clk-divisors = <1 2 4 0>;
 168                                         u-boot,dm-pre-reloc;
 169                                 };
 170
 171                                 usb: usbck {
 172                                         compatible = "atmel,at91rm9200-clk-usb";
 173                                         #clock-cells = <0>;
 174                                         atmel,clk-divisors = <1 2 4 0>;
 175                                         clocks = <&pllb>;
 176                                 };
 177
 178                                 prog: progck {
 179                                         compatible = "atmel,at91rm9200-clk-programmable";
 180                                         #address-cells = <1>;
 181                                         #size-cells = <0>;
 182                                         interrupt-parent = <&pmc>;
 183                                         clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
 184
 185                                         prog0: prog@0 {
 186                                                 #clock-cells = <0>;
 187                                                 reg = <0>;
 188                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 189                                         };
 190
 191                                         prog1: prog@1 {
 192                                                 #clock-cells = <0>;
 193                                                 reg = <1>;
 194                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 195                                         };
 196                                 };
 197
 198                                 systemck {
 199                                         compatible = "atmel,at91rm9200-clk-system";
 200                                         #address-cells = <1>;
 201                                         #size-cells = <0>;
 202
 203                                         uhpck: uhpck@6 {
 204                                                 #clock-cells = <0>;
 205                                                 reg = <6>;
 206                                                 clocks = <&usb>;
 207                                         };
 208
 209                                         udpck: udpck@7 {
 210                                                 #clock-cells = <0>;
 211                                                 reg = <7>;
 212                                                 clocks = <&usb>;
 213                                         };
 214
 215                                         pck0: pck0@8 {
 216                                                 #clock-cells = <0>;
 217                                                 reg = <8>;
 218                                                 clocks = <&prog0>;
 219                                         };
 220
 221                                         pck1: pck1@9 {
 222                                                 #clock-cells = <0>;
 223                                                 reg = <9>;
 224                                                 clocks = <&prog1>;
 225                                         };
 226                                 };
 227
 228                                 periphck {
 229                                         compatible = "atmel,at91rm9200-clk-peripheral";
 230                                         #address-cells = <1>;
 231                                         #size-cells = <0>;
 232                                         clocks = <&mck>;
 233                                         u-boot,dm-pre-reloc;
 234
 235                                         pioA_clk: pioA_clk@2 {
 236                                                 #clock-cells = <0>;
 237                                                 reg = <2>;
 238                                                 u-boot,dm-pre-reloc;
 239                                         };
 240
 241                                         pioB_clk: pioB_clk@3 {
 242                                                 #clock-cells = <0>;
 243                                                 reg = <3>;
 244                                                 u-boot,dm-pre-reloc;
 245                                         };
 246
 247                                         pioC_clk: pioC_clk@4 {
 248                                                 #clock-cells = <0>;
 249                                                 reg = <4>;
 250                                                 u-boot,dm-pre-reloc;
 251                                         };
 252
 253                                         adc_clk: adc_clk@5 {
 254                                                 #clock-cells = <0>;
 255                                                 reg = <5>;
 256                                         };
 257
 258                                         usart0_clk: usart0_clk@6 {
 259                                                 #clock-cells = <0>;
 260                                                 reg = <6>;
 261                                         };
 262
 263                                         usart1_clk: usart1_clk@7 {
 264                                                 #clock-cells = <0>;
 265                                                 reg = <7>;
 266                                         };
 267
 268                                         usart2_clk: usart2_clk@8 {
 269                                                 #clock-cells = <0>;
 270                                                 reg = <8>;
 271                                         };
 272
 273                                         mci0_clk: mci0_clk@9 {
 274                                                 #clock-cells = <0>;
 275                                                 reg = <9>;
 276                                         };
 277
 278                                         udc_clk: udc_clk@10 {
 279                                                 #clock-cells = <0>;
 280                                                 reg = <10>;
 281                                         };
 282
 283                                         twi0_clk: twi0_clk@11 {
 284                                                 reg = <11>;
 285                                                 #clock-cells = <0>;
 286                                         };
 287
 288                                         spi0_clk: spi0_clk@12 {
 289                                                 #clock-cells = <0>;
 290                                                 reg = <12>;
 291                                         };
 292
 293                                         spi1_clk: spi1_clk@13 {
 294                                                 #clock-cells = <0>;
 295                                                 reg = <13>;
 296                                         };
 297
 298                                         ssc0_clk: ssc0_clk@14 {
 299                                                 #clock-cells = <0>;
 300                                                 reg = <14>;
 301                                         };
 302
 303                                         tc0_clk: tc0_clk@17 {
 304                                                 #clock-cells = <0>;
 305                                                 reg = <17>;
 306                                         };
 307
 308                                         tc1_clk: tc1_clk@18 {
 309                                                 #clock-cells = <0>;
 310                                                 reg = <18>;
 311                                         };
 312
 313                                         tc2_clk: tc2_clk@19 {
 314                                                 #clock-cells = <0>;
 315                                                 reg = <19>;
 316                                         };
 317
 318                                         ohci_clk: ohci_clk@20 {
 319                                                 #clock-cells = <0>;
 320                                                 reg = <20>;
 321                                         };
 322
 323                                         macb0_clk: macb0_clk@21 {
 324                                                 #clock-cells = <0>;
 325                                                 reg = <21>;
 326                                         };
 327
 328                                         isi_clk: isi_clk@22 {
 329                                                 #clock-cells = <0>;
 330                                                 reg = <22>;
 331                                         };
 332
 333                                         usart3_clk: usart3_clk@23 {
 334                                                 #clock-cells = <0>;
 335                                                 reg = <23>;
 336                                         };
 337
 338                                         uart0_clk: uart0_clk@24 {
 339                                                 #clock-cells = <0>;
 340                                                 reg = <24>;
 341                                         };
 342
 343                                         uart1_clk: uart1_clk@25 {
 344                                                 #clock-cells = <0>;
 345                                                 reg = <25>;
 346                                         };
 347
 348                                         tc3_clk: tc3_clk@26 {
 349                                                 #clock-cells = <0>;
 350                                                 reg = <26>;
 351                                         };
 352
 353                                         tc4_clk: tc4_clk@27 {
 354                                                 #clock-cells = <0>;
 355                                                 reg = <27>;
 356                                         };
 357
 358                                         tc5_clk: tc5_clk@28 {
 359                                                 #clock-cells = <0>;
 360                                                 reg = <28>;
 361                                         };
 362                                 };
 363                         };
 364
 365                         rstc@fffffd00 {
 366                                 compatible = "atmel,at91sam9260-rstc";
 367                                 reg = <0xfffffd00 0x10>;
 368                                 clocks = <&clk32k>;
 369                         };
 370
 371                         shdwc@fffffd10 {
 372                                 compatible = "atmel,at91sam9260-shdwc";
 373                                 reg = <0xfffffd10 0x10>;
 374                                 clocks = <&clk32k>;
 375                         };
 376
 377                         pit: timer@fffffd30 {
 378                                 compatible = "atmel,at91sam9260-pit";
 379                                 reg = <0xfffffd30 0xf>;
 380                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 381                                 clocks = <&mck>;
 382                         };
 383
 384                         tcb0: timer@fffa0000 {
 385                                 compatible = "atmel,at91rm9200-tcb";
 386                                 reg = <0xfffa0000 0x100>;
 387                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
 388                                               18 IRQ_TYPE_LEVEL_HIGH 0
 389                                               19 IRQ_TYPE_LEVEL_HIGH 0>;
 390                                 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
 391                                 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 392                         };
 393
 394                         tcb1: timer@fffdc000 {
 395                                 compatible = "atmel,at91rm9200-tcb";
 396                                 reg = <0xfffdc000 0x100>;
 397                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
 398                                               27 IRQ_TYPE_LEVEL_HIGH 0
 399                                               28 IRQ_TYPE_LEVEL_HIGH 0>;
 400                                 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>;
 401                                 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 402                         };
 403
 404                         pioA: gpio@fffff400 {
 405                                 compatible = "atmel,at91rm9200-gpio";
 406                                 reg = <0xfffff400 0x200>;
 407                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 408                                 #gpio-cells = <2>;
 409                                 gpio-controller;
 410                                 interrupt-controller;
 411                                 #interrupt-cells = <2>;
 412                                 clocks = <&pioA_clk>;
 413                                 u-boot,dm-pre-reloc;
 414                         };
 415
 416                         pioB: gpio@fffff600 {
 417                                 compatible = "atmel,at91rm9200-gpio";
 418                                 reg = <0xfffff600 0x200>;
 419                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 420                                 #gpio-cells = <2>;
 421                                 gpio-controller;
 422                                 interrupt-controller;
 423                                 #interrupt-cells = <2>;
 424                                 clocks = <&pioB_clk>;
 425                                 u-boot,dm-pre-reloc;
 426                         };
 427
 428                         pioC: gpio@fffff800 {
 429                                 compatible = "atmel,at91rm9200-gpio";
 430                                 reg = <0xfffff800 0x200>;
 431                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 432                                 #gpio-cells = <2>;
 433                                 gpio-controller;
 434                                 interrupt-controller;
 435                                 #interrupt-cells = <2>;
 436                                 clocks = <&pioC_clk>;
 437                                 u-boot,dm-pre-reloc;
 438                         };
 439
 440                         pinctrl@fffff400 {
 441                                 #address-cells = <1>;
 442                                 #size-cells = <1>;
 443                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 444                                 ranges = <0xfffff400 0xfffff400 0x600>;
 445                                 reg = <0xfffff400 0x200         /* pioA */
 446                                        0xfffff600 0x200         /* pioB */
 447                                        0xfffff800 0x200         /* pioC */
 448                                       >;
 449
 450                                 atmel,mux-mask = <
 451                                       /*    A         B     */
 452                                        0xffffffff 0xffc00c3b  /* pioA */
 453                                        0xffffffff 0x7fff3ccf  /* pioB */
 454                                        0xffffffff 0x007fffff  /* pioC */
 455                                       >;
 456                                 u-boot,dm-pre-reloc;
 457
 458                                 /* shared pinctrl settings */
 459                                 dbgu {
 460                                         u-boot,dm-pre-reloc;
 461                                         pinctrl_dbgu: dbgu-0 {
 462                                                 atmel,pins =
 463                                                         <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB14 periph A */
 464                                                          AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB15 periph with pullup */
 465                                         };
 466                                 };
 467
 468                                 usart0 {
 469                                         pinctrl_usart0: usart0-0 {
 470                                                 atmel,pins =
 471                                                         <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB4 periph A */
 472                                                          AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB5 periph A */
 473                                         };
 474
 475                                         pinctrl_usart0_rts: usart0_rts-0 {
 476                                                 atmel,pins =
 477                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
 478                                         };
 479
 480                                         pinctrl_usart0_cts: usart0_cts-0 {
 481                                                 atmel,pins =
 482                                                         <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
 483                                         };
 484
 485                                         pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
 486                                                 atmel,pins =
 487                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB24 periph A */
 488                                                          AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
 489                                         };
 490
 491                                         pinctrl_usart0_dcd: usart0_dcd-0 {
 492                                                 atmel,pins =
 493                                                         <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
 494                                         };
 495
 496                                         pinctrl_usart0_ri: usart0_ri-0 {
 497                                                 atmel,pins =
 498                                                         <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
 499                                         };
 500                                 };
 501
 502                                 usart1 {
 503                                         pinctrl_usart1: usart1-0 {
 504                                                 atmel,pins =
 505                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
 506                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB7 periph A */
 507                                         };
 508
 509                                         pinctrl_usart1_rts: usart1_rts-0 {
 510                                                 atmel,pins =
 511                                                         <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
 512                                         };
 513
 514                                         pinctrl_usart1_cts: usart1_cts-0 {
 515                                                 atmel,pins =
 516                                                         <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
 517                                         };
 518                                 };
 519
 520                                 usart2 {
 521                                         pinctrl_usart2: usart2-0 {
 522                                                 atmel,pins =
 523                                                         <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
 524                                                          AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB9 periph A */
 525                                         };
 526
 527                                         pinctrl_usart2_rts: usart2_rts-0 {
 528                                                 atmel,pins =
 529                                                         <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA4 periph A */
 530                                         };
 531
 532                                         pinctrl_usart2_cts: usart2_cts-0 {
 533                                                 atmel,pins =
 534                                                         <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA5 periph A */
 535                                         };
 536                                 };
 537
 538                                 usart3 {
 539                                         pinctrl_usart3: usart3-0 {
 540                                                 atmel,pins =
 541                                                         <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB10 periph A with pullup */
 542                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
 543                                         };
 544
 545                                         pinctrl_usart3_rts: usart3_rts-0 {
 546                                                 atmel,pins =
 547                                                         <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 548                                         };
 549
 550                                         pinctrl_usart3_cts: usart3_cts-0 {
 551                                                 atmel,pins =
 552                                                         <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 553                                         };
 554                                 };
 555
 556                                 uart0 {
 557                                         pinctrl_uart0: uart0-0 {
 558                                                 atmel,pins =
 559                                                         <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA31 periph B with pullup */
 560                                                          AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
 561                                         };
 562                                 };
 563
 564                                 uart1 {
 565                                         pinctrl_uart1: uart1-0 {
 566                                                 atmel,pins =
 567                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB12 periph A with pullup */
 568                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
 569                                         };
 570                                 };
 571
 572                                 nand {
 573                                         pinctrl_nand: nand-0 {
 574                                                 atmel,pins =
 575                                                         <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP     /* PC13 gpio RDY pin pull_up */
 576                                                          AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;   /* PC14 gpio enable pin pull_up */
 577                                         };
 578                                 };
 579
 580                                 macb {
 581                                         pinctrl_macb_rmii: macb_rmii-0 {
 582                                                 atmel,pins =
 583                                                         <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A */
 584                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA13 periph A */
 585                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA14 periph A */
 586                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA15 periph A */
 587                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA16 periph A */
 588                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 589                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA18 periph A */
 590                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA19 periph A */
 591                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA20 periph A */
 592                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
 593                                         };
 594
 595                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 596                                                 atmel,pins =
 597                                                         <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B */
 598                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA23 periph B */
 599                                                          AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 600                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 601                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA26 periph B */
 602                                                          AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 603                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 604                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 605                                         };
 606
 607                                         pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
 608                                                 atmel,pins =
 609                                                         <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA10 periph B */
 610                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA11 periph B */
 611                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B */
 612                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 613                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA26 periph B */
 614                                                          AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 615                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 616                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 617                                         };
 618                                 };
 619
 620                                 mmc0 {
 621                                         pinctrl_mmc0_clk: mmc0_clk-0 {
 622                                                 atmel,pins =
 623                                                         <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA8 periph A */
 624                                         };
 625
 626                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
 627                                                 atmel,pins =
 628                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
 629                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA6 periph A with pullup */
 630                                         };
 631
 632                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 633                                                 atmel,pins =
 634                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
 635                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA10 periph A with pullup */
 636                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA11 periph A with pullup */
 637                                         };
 638
 639                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
 640                                                 atmel,pins =
 641                                                         <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
 642                                                          AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA0 periph B with pullup */
 643                                         };
 644
 645                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
 646                                                 atmel,pins =
 647                                                         <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
 648                                                          AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
 649                                                          AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA3 periph B with pullup */
 650                                         };
 651                                 };
 652
 653                                 ssc0 {
 654                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 655                                                 atmel,pins =
 656                                                         <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB16 periph A */
 657                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB17 periph A */
 658                                                          AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
 659                                         };
 660
 661                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 662                                                 atmel,pins =
 663                                                         <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB19 periph A */
 664                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB20 periph A */
 665                                                          AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
 666                                         };
 667                                 };
 668
 669                                 spi0 {
 670                                         pinctrl_spi0: spi0-0 {
 671                                                 atmel,pins =
 672                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A SPI0_MISO pin */
 673                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA1 periph A SPI0_MOSI pin */
 674                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A SPI0_SPCK pin */
 675                                         };
 676                                 };
 677
 678                                 spi1 {
 679                                         pinctrl_spi1: spi1-0 {
 680                                                 atmel,pins =
 681                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A SPI1_MISO pin */
 682                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A SPI1_MOSI pin */
 683                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB2 periph A SPI1_SPCK pin */
 684                                         };
 685                                 };
 686
 687                                 i2c_gpio0 {
 688                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
 689                                                 atmel,pins =
 690                                                         <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
 691                                                          AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
 692                                         };
 693                                 };
 694
 695                                 tcb0 {
 696                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 697                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 698                                         };
 699
 700                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 701                                                 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 702                                         };
 703
 704                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 705                                                 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 706                                         };
 707
 708                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 709                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 710                                         };
 711
 712                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 713                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 714                                         };
 715
 716                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 717                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 718                                         };
 719
 720                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 721                                                 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 722                                         };
 723
 724                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 725                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 726                                         };
 727
 728                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 729                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 730                                         };
 731                                 };
 732
 733                                 tcb1 {
 734                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 735                                                 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 736                                         };
 737
 738                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 739                                                 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 740                                         };
 741
 742                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 743                                                 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 744                                         };
 745
 746                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 747                                                 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 748                                         };
 749
 750                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 751                                                 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 752                                         };
 753
 754                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 755                                                 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 756                                         };
 757
 758                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 759                                                 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 760                                         };
 761
 762                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 763                                                 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 764                                         };
 765
 766                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 767                                                 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 768                                         };
 769                                 };
 770                         };
 771
 772                         dbgu: serial@fffff200 {
 773                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 774                                 reg = <0xfffff200 0x200>;
 775                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 776                                 pinctrl-names = "default";
 777                                 pinctrl-0 = <&pinctrl_dbgu>;
 778                                 clocks = <&mck>;
 779                                 clock-names = "usart";
 780                                 status = "disabled";
 781                         };
 782
 783                         usart0: serial@fffb0000 {
 784                                 compatible = "atmel,at91sam9260-usart";
 785                                 reg = <0xfffb0000 0x200>;
 786                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 787                                 atmel,use-dma-rx;
 788                                 atmel,use-dma-tx;
 789                                 pinctrl-names = "default";
 790                                 pinctrl-0 = <&pinctrl_usart0>;
 791                                 clocks = <&usart0_clk>;
 792                                 clock-names = "usart";
 793                                 status = "disabled";
 794                         };
 795
 796                         usart1: serial@fffb4000 {
 797                                 compatible = "atmel,at91sam9260-usart";
 798                                 reg = <0xfffb4000 0x200>;
 799                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 800                                 atmel,use-dma-rx;
 801                                 atmel,use-dma-tx;
 802                                 pinctrl-names = "default";
 803                                 pinctrl-0 = <&pinctrl_usart1>;
 804                                 clocks = <&usart1_clk>;
 805                                 clock-names = "usart";
 806                                 status = "disabled";
 807                         };
 808
 809                         usart2: serial@fffb8000 {
 810                                 compatible = "atmel,at91sam9260-usart";
 811                                 reg = <0xfffb8000 0x200>;
 812                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 813                                 atmel,use-dma-rx;
 814                                 atmel,use-dma-tx;
 815                                 pinctrl-names = "default";
 816                                 pinctrl-0 = <&pinctrl_usart2>;
 817                                 clocks = <&usart2_clk>;
 818                                 clock-names = "usart";
 819                                 status = "disabled";
 820                         };
 821
 822                         usart3: serial@fffd0000 {
 823                                 compatible = "atmel,at91sam9260-usart";
 824                                 reg = <0xfffd0000 0x200>;
 825                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
 826                                 atmel,use-dma-rx;
 827                                 atmel,use-dma-tx;
 828                                 pinctrl-names = "default";
 829                                 pinctrl-0 = <&pinctrl_usart3>;
 830                                 clocks = <&usart3_clk>;
 831                                 clock-names = "usart";
 832                                 status = "disabled";
 833                         };
 834
 835                         uart0: serial@fffd4000 {
 836                                 compatible = "atmel,at91sam9260-usart";
 837                                 reg = <0xfffd4000 0x200>;
 838                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
 839                                 atmel,use-dma-rx;
 840                                 atmel,use-dma-tx;
 841                                 pinctrl-names = "default";
 842                                 pinctrl-0 = <&pinctrl_uart0>;
 843                                 clocks = <&uart0_clk>;
 844                                 clock-names = "usart";
 845                                 status = "disabled";
 846                         };
 847
 848                         uart1: serial@fffd8000 {
 849                                 compatible = "atmel,at91sam9260-usart";
 850                                 reg = <0xfffd8000 0x200>;
 851                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
 852                                 atmel,use-dma-rx;
 853                                 atmel,use-dma-tx;
 854                                 pinctrl-names = "default";
 855                                 pinctrl-0 = <&pinctrl_uart1>;
 856                                 clocks = <&uart1_clk>;
 857                                 clock-names = "usart";
 858                                 status = "disabled";
 859                         };
 860
 861                         macb0: ethernet@fffc4000 {
 862                                 compatible = "cdns,at91sam9260-macb", "cdns,macb";
 863                                 reg = <0xfffc4000 0x100>;
 864                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
 865                                 pinctrl-names = "default";
 866                                 pinctrl-0 = <&pinctrl_macb_rmii>;
 867                                 clocks = <&macb0_clk>, <&macb0_clk>;
 868                                 clock-names = "hclk", "pclk";
 869                                 status = "disabled";
 870                         };
 871
 872                         usb1: gadget@fffa4000 {
 873                                 compatible = "atmel,at91sam9260-udc";
 874                                 reg = <0xfffa4000 0x4000>;
 875                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
 876                                 clocks = <&udc_clk>, <&udpck>;
 877                                 clock-names = "pclk", "hclk";
 878                                 status = "disabled";
 879                         };
 880
 881                         i2c0: i2c@fffac000 {
 882                                 compatible = "atmel,at91sam9260-i2c";
 883                                 reg = <0xfffac000 0x100>;
 884                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
 885                                 #address-cells = <1>;
 886                                 #size-cells = <0>;
 887                                 clocks = <&twi0_clk>;
 888                                 status = "disabled";
 889                         };
 890
 891                         mmc0: mmc@fffa8000 {
 892                                 compatible = "atmel,hsmci";
 893                                 reg = <0xfffa8000 0x600>;
 894                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
 895                                 #address-cells = <1>;
 896                                 #size-cells = <0>;
 897                                 pinctrl-names = "default";
 898                                 clocks = <&mci0_clk>;
 899                                 clock-names = "mci_clk";
 900                                 status = "disabled";
 901                         };
 902
 903                         ssc0: ssc@fffbc000 {
 904                                 compatible = "atmel,at91rm9200-ssc";
 905                                 reg = <0xfffbc000 0x4000>;
 906                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 907                                 pinctrl-names = "default";
 908                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 909                                 clocks = <&ssc0_clk>;
 910                                 clock-names = "pclk";
 911                                 status = "disabled";
 912                         };
 913
 914                         spi0: spi@fffc8000 {
 915                                 #address-cells = <1>;
 916                                 #size-cells = <0>;
 917                                 compatible = "atmel,at91rm9200-spi";
 918                                 reg = <0xfffc8000 0x200>;
 919                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
 920                                 pinctrl-names = "default";
 921                                 pinctrl-0 = <&pinctrl_spi0>;
 922                                 clocks = <&spi0_clk>;
 923                                 clock-names = "spi_clk";
 924                                 status = "disabled";
 925                         };
 926
 927                         spi1: spi@fffcc000 {
 928                                 #address-cells = <1>;
 929                                 #size-cells = <0>;
 930                                 compatible = "atmel,at91rm9200-spi";
 931                                 reg = <0xfffcc000 0x200>;
 932                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
 933                                 pinctrl-names = "default";
 934                                 pinctrl-0 = <&pinctrl_spi1>;
 935                                 clocks = <&spi1_clk>;
 936                                 clock-names = "spi_clk";
 937                                 status = "disabled";
 938                         };
 939
 940                         adc0: adc@fffe0000 {
 941                                 #address-cells = <1>;
 942                                 #size-cells = <0>;
 943                                 compatible = "atmel,at91sam9260-adc";
 944                                 reg = <0xfffe0000 0x100>;
 945                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
 946                                 clocks = <&adc_clk>, <&adc_op_clk>;
 947                                 clock-names = "adc_clk", "adc_op_clk";
 948                                 atmel,adc-use-external-triggers;
 949                                 atmel,adc-channels-used = <0xf>;
 950                                 atmel,adc-vref = <3300>;
 951                                 atmel,adc-startup-time = <15>;
 952                                 atmel,adc-res = <8 10>;
 953                                 atmel,adc-res-names = "lowres", "highres";
 954                                 atmel,adc-use-res = "highres";
 955
 956                                 trigger@0 {
 957                                         reg = <0>;
 958                                         trigger-name = "timer-counter-0";
 959                                         trigger-value = <0x1>;
 960                                 };
 961                                 trigger@1 {
 962                                         reg = <1>;
 963                                         trigger-name = "timer-counter-1";
 964                                         trigger-value = <0x3>;
 965                                 };
 966
 967                                 trigger@2 {
 968                                         reg = <2>;
 969                                         trigger-name = "timer-counter-2";
 970                                         trigger-value = <0x5>;
 971                                 };
 972
 973                                 trigger@3 {
 974                                         reg = <3>;
 975                                         trigger-name = "external";
 976                                         trigger-value = <0xd>;
 977                                         trigger-external;
 978                                 };
 979                         };
 980
 981                         rtc@fffffd20 {
 982                                 compatible = "atmel,at91sam9260-rtt";
 983                                 reg = <0xfffffd20 0x10>;
 984                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 985                                 clocks = <&clk32k>;
 986                                 status = "disabled";
 987                         };
 988
 989                         watchdog@fffffd40 {
 990                                 compatible = "atmel,at91sam9260-wdt";
 991                                 reg = <0xfffffd40 0x10>;
 992                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 993                                 clocks = <&clk32k>;
 994                                 atmel,watchdog-type = "hardware";
 995                                 atmel,reset-type = "all";
 996                                 atmel,dbg-halt;
 997                                 status = "disabled";
 998                         };
 999
1000                         gpbr: syscon@fffffd50 {
1001                                 compatible = "atmel,at91sam9260-gpbr", "syscon";
1002                                 reg = <0xfffffd50 0x10>;
1003                                 status = "disabled";
1004                         };
1005                 };
1006
1007                 nand0: nand@40000000 {
1008                         compatible = "atmel,at91rm9200-nand";
1009                         #address-cells = <1>;
1010                         #size-cells = <1>;
1011                         reg = <0x40000000 0x10000000
1012                                0xffffe800 0x200
1013                               >;
1014                         atmel,nand-addr-offset = <21>;
1015                         atmel,nand-cmd-offset = <22>;
1016                         pinctrl-names = "default";
1017                         pinctrl-0 = <&pinctrl_nand>;
1018                         gpios = <&pioC 13 GPIO_ACTIVE_HIGH
1019                                  &pioC 14 GPIO_ACTIVE_HIGH
1020                                  0
1021                                 >;
1022                         status = "disabled";
1023                 };
1024
1025                 usb0: ohci@00500000 {
1026                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1027                         reg = <0x00500000 0x100000>;
1028                         interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
1029                         clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
1030                         clock-names = "ohci_clk", "hclk", "uhpck";
1031                         status = "disabled";
1032                 };
1033         };
1034
1035         i2c@0 {
1036                 compatible = "i2c-gpio";
1037                 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
1038                          &pioA 24 GPIO_ACTIVE_HIGH /* scl */
1039                         >;
1040                 i2c-gpio,sda-open-drain;
1041                 i2c-gpio,scl-open-drain;
1042                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1043                 #address-cells = <1>;
1044                 #size-cells = <0>;
1045                 pinctrl-names = "default";
1046                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1047                 status = "disabled";
1048         };
1049 };