arch/arm/dts/ast2600-evb.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2
   3 /dts-v1/;
   4
   5 #include "ast2600-u-boot.dtsi"
   6
   7 / {
   8         memory {
   9                 device_type = "memory";
  10                 reg = <0x80000000 0x40000000>;
  11         };
  12
  13         chosen {
  14                 stdout-path = &uart5;
  15         };
  16
  17         aliases {
  18                 mmc0 = &emmc_slot0;
  19                 mmc1 = &sdhci_slot0;
  20                 mmc2 = &sdhci_slot1;
  21                 spi0 = &fmc;
  22                 spi1 = &spi1;
  23                 spi2 = &spi2;
  24                 ethernet0 = &mac0;
  25                 ethernet1 = &mac1;
  26                 ethernet2 = &mac2;
  27                 ethernet3 = &mac3;
  28         };
  29
  30         cpus {
  31                 cpu@0 {
  32                         clock-frequency = <800000000>;
  33                 };
  34                 cpu@1 {
  35                         clock-frequency = <800000000>;
  36                 };
  37         };
  38 };
  39
  40 &pwm {
  41         status = "okay";
  42         pinctrl-names = "default";
  43         pinctrl-0 = <&pinctrl_pwm0_default
  44                         &pinctrl_pwm1_default
  45                         &pinctrl_pwm2_default
  46                         &pinctrl_pwm3_default
  47                         &pinctrl_pwm4_default
  48                         &pinctrl_pwm5_default
  49                         &pinctrl_pwm6_default
  50                         &pinctrl_pwm7_default
  51                         &pinctrl_pwm8g1_default
  52                         &pinctrl_pwm9g1_default
  53                         &pinctrl_pwm10g1_default
  54                         &pinctrl_pwm11g1_default
  55                         &pinctrl_pwm12g1_default
  56                         &pinctrl_pwm13g1_default
  57                         &pinctrl_pwm14g1_default>;
  58 };
  59
  60 &uart5 {
  61         u-boot,dm-pre-reloc;
  62         status = "okay";
  63 };
  64
  65 &sdrammc {
  66         clock-frequency = <400000000>;
  67 };
  68
  69 &wdt1 {
  70         status = "okay";
  71 };
  72
  73 &fmc {
  74         status = "okay";
  75
  76         pinctrl-names = "default";
  77         pinctrl-0 = <&pinctrl_fmcquad_default>;
  78
  79         flash@0 {
  80                 compatible = "spi-flash", "sst,w25q256";
  81                 status = "okay";
  82                 spi-max-frequency = <50000000>;
  83                 spi-tx-bus-width = <4>;
  84                 spi-rx-bus-width = <4>;
  85         };
  86
  87         flash@1 {
  88                 compatible = "spi-flash", "sst,w25q256";
  89                 status = "okay";
  90                 spi-max-frequency = <50000000>;
  91                 spi-tx-bus-width = <4>;
  92                 spi-rx-bus-width = <4>;
  93         };
  94
  95         flash@2 {
  96                 compatible = "spi-flash", "sst,w25q256";
  97                 status = "okay";
  98                 spi-max-frequency = <50000000>;
  99                 spi-tx-bus-width = <4>;
 100                 spi-rx-bus-width = <4>;
 101         };
 102 };
 103
 104 &spi1 {
 105         status = "okay";
 106
 107         pinctrl-names = "default";
 108         pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
 109                         &pinctrl_spi1cs1_default &pinctrl_spi1wp_default
 110                         &pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
 111
 112         flash@0 {
 113                 compatible = "spi-flash", "sst,w25q256";
 114                 status = "okay";
 115                 spi-max-frequency = <50000000>;
 116                 spi-tx-bus-width = <4>;
 117                 spi-rx-bus-width = <4>;
 118         };
 119 };
 120
 121 &spi2 {
 122         status = "okay";
 123
 124         pinctrl-names = "default";
 125         pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
 126                         &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
 127
 128         flash@0 {
 129                 compatible = "spi-flash", "sst,w25q256";
 130                 status = "okay";
 131                 spi-max-frequency = <50000000>;
 132                 spi-tx-bus-width = <4>;
 133                 spi-rx-bus-width = <4>;
 134         };
 135 };
 136
 137 &emmc {
 138         u-boot,dm-pre-reloc;
 139         timing-phase = <0x700ff>;
 140 };
 141
 142 &emmc_slot0 {
 143         u-boot,dm-pre-reloc;
 144         status = "okay";
 145         bus-width = <4>;
 146         pinctrl-names = "default";
 147         pinctrl-0 = <&pinctrl_emmc_default>;
 148         sdhci-drive-type = <1>;
 149 };
 150
 151 &i2c4 {
 152         status = "okay";
 153
 154         pinctrl-names = "default";
 155         pinctrl-0 = <&pinctrl_i2c5_default>;
 156 };
 157
 158 &i2c5 {
 159         status = "okay";
 160
 161         pinctrl-names = "default";
 162         pinctrl-0 = <&pinctrl_i2c6_default>;
 163 };
 164
 165 &i2c6 {
 166         status = "okay";
 167
 168         pinctrl-names = "default";
 169         pinctrl-0 = <&pinctrl_i2c7_default>;
 170 };
 171
 172 &i2c7 {
 173         status = "okay";
 174
 175         pinctrl-names = "default";
 176         pinctrl-0 = <&pinctrl_i2c8_default>;
 177 };
 178
 179 &i2c8 {
 180         status = "okay";
 181
 182         pinctrl-names = "default";
 183         pinctrl-0 = <&pinctrl_i2c9_default>;
 184 };
 185
 186 &mdio0 {
 187         status = "okay";
 188         #address-cells = <1>;
 189         #size-cells = <0>;
 190         ethphy0: ethernet-phy@0 {
 191                 reg = <0>;
 192         };
 193 };
 194
 195 &mdio1 {
 196         status = "okay";
 197         #address-cells = <1>;
 198         #size-cells = <0>;
 199         ethphy1: ethernet-phy@0 {
 200                 reg = <0>;
 201         };
 202 };
 203
 204 &mdio2 {
 205         status = "okay";
 206         #address-cells = <1>;
 207         #size-cells = <0>;
 208         ethphy2: ethernet-phy@0 {
 209                 reg = <0>;
 210         };
 211 };
 212
 213 &mdio3 {
 214         status = "okay";
 215         #address-cells = <1>;
 216         #size-cells = <0>;
 217         ethphy3: ethernet-phy@0 {
 218                 reg = <0>;
 219         };
 220 };
 221
 222 &mac0 {
 223         status = "okay";
 224         phy-mode = "rgmii-rxid";
 225         phy-handle = <&ethphy0>;
 226         pinctrl-names = "default";
 227         pinctrl-0 = <&pinctrl_rgmii1_default>;
 228 };
 229
 230 &mac1 {
 231         status = "okay";
 232         phy-mode = "rgmii-rxid";
 233         phy-handle = <&ethphy1>;
 234         pinctrl-names = "default";
 235         pinctrl-0 = <&pinctrl_rgmii2_default>;
 236 };
 237
 238 &mac2 {
 239         status = "okay";
 240         phy-mode = "rgmii";
 241         phy-handle = <&ethphy2>;
 242         pinctrl-names = "default";
 243         pinctrl-0 = <&pinctrl_rgmii3_default>;
 244 };
 245
 246 &mac3 {
 247         status = "okay";
 248         phy-mode = "rgmii";
 249         phy-handle = <&ethphy3>;
 250         pinctrl-names = "default";
 251         pinctrl-0 = <&pinctrl_rgmii4_default>;
 252 };
 253
 254 &scu {
 255         mac0-clk-delay = <0x1d 0x1c
 256                           0x10 0x17
 257                           0x10 0x17>;
 258         mac1-clk-delay = <0x1d 0x10
 259                           0x10 0x10
 260                           0x10 0x10>;
 261         mac2-clk-delay = <0x0a 0x04
 262                           0x08 0x04
 263                           0x08 0x04>;
 264         mac3-clk-delay = <0x0a 0x04
 265                           0x08 0x04
 266                           0x08 0x04>;
 267 };
 268
 269 &hace {
 270         u-boot,dm-pre-reloc;
 271         status = "okay";
 272 };
 273
 274 &acry {
 275         u-boot,dm-pre-reloc;
 276         status = "okay";
 277 };