1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/reset/ast2500-reset.h>
5 #include "ast2500.dtsi"
8 scu: clock-controller@1e6e2000 {
9 compatible = "aspeed,ast2500-scu";
10 reg = <0x1e6e2000 0x1000>;
16 rst: reset-controller {
18 compatible = "aspeed,ast2500-reset";
22 sdrammc: sdrammc@1e6e0000 {
24 compatible = "aspeed,ast2500-sdrammc";
25 reg = <0x1e6e0000 0x174
28 clocks = <&scu ASPEED_CLK_MPLL>;
29 resets = <&rst ASPEED_RESET_SDRAM>;
38 sdhci0: sdhci@1e740100 {
39 compatible = "aspeed,ast2500-sdhci";
42 clocks = <&scu ASPEED_CLK_SDIO>;
43 resets = <&rst ASPEED_RESET_SDIO>;
46 sdhci1: sdhci@1e740200 {
47 compatible = "aspeed,ast2500-sdhci";
50 clocks = <&scu ASPEED_CLK_SDIO>;
51 resets = <&rst ASPEED_RESET_SDIO>;
59 clocks = <&scu ASPEED_CLK_GATE_UART1CLK>;
63 clocks = <&scu ASPEED_CLK_GATE_UART2CLK>;
67 clocks = <&scu ASPEED_CLK_GATE_UART3CLK>;
71 clocks = <&scu ASPEED_CLK_GATE_UART4CLK>;
75 clocks = <&scu ASPEED_CLK_GATE_UART5CLK>;
83 clocks = <&scu ASPEED_CLK_GATE_MAC1CLK>, <&scu ASPEED_CLK_D2PLL>;
87 clocks = <&scu ASPEED_CLK_GATE_MAC1CLK>, <&scu ASPEED_CLK_D2PLL>;