1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for Synology DS414
5 * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
7 * Note: this Device Tree assumes that the bootloader has remapped the
8 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
10 * bootloaders provided by Marvell. It is used in recent versions of
11 * DSM software provided by Synology. Nonetheless, some earlier boards
12 * were delivered with an older version of u-boot that left internal
13 * registers mapped at 0xd0000000. If you have such a device you will
14 * not be able to directly boot a kernel based on this Device Tree. In
15 * that case, the preferred solution is to update your bootloader (e.g.
16 * by upgrading to latest version of DSM, or building a new one and
17 * installing it from u-boot prompt) or adjust the Devive Tree
18 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "armada-xp-mv78230.dtsi"
28 model = "Synology DS414";
29 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
30 "marvell,armadaxp", "marvell,armada-370-xp";
33 bootargs = "console=ttyS0,115200 earlyprintk";
42 device_type = "memory";
43 reg = <0 0x00000000 0 0x40000000>; /* 1GB */
47 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
48 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
49 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
50 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
54 /* RTC is provided by Seiko S-35390A below */
60 clock-frequency = <400000>;
64 compatible = "sii,s35390a";
69 /* Connected to a header on device's PCB. This
70 * provides the main console for the device.
72 * Warning: the device may not boot with a 3.3V
73 * USB-serial converter connected when the power
74 * button is pressed. The converter needs to be
75 * connected a few seconds after pressing the
76 * power button. This is possibly due to UART0_TXD
77 * pin being sampled at reset (bit 0 of SAR).
84 /* Connected to a Microchip PIC16F883 for power control */
90 compatible = "synology,power-off";
91 reg = <0x12100 0x100>;
92 clocks = <&coreclk 0>;
95 /* Front USB 2.0 port */
102 pinctrl-0 = <&ge0_rgmii_pins>;
103 pinctrl-names = "default";
105 phy-mode = "rgmii-id";
109 pinctrl-0 = <&ge1_rgmii_pins>;
110 pinctrl-names = "default";
113 phy-mode = "rgmii-id";
119 compatible = "simple-bus";
120 #address-cells = <1>;
122 pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
123 &sata3_pwr_pin &sata4_pwr_pin>;
124 pinctrl-names = "default";
126 sata1_regulator: sata1-regulator@1 {
127 compatible = "regulator-fixed";
129 regulator-name = "SATA1 Power";
130 regulator-min-microvolt = <5000000>;
131 regulator-max-microvolt = <5000000>;
132 startup-delay-us = <2000000>;
136 gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
139 sata2_regulator: sata2-regulator@2 {
140 compatible = "regulator-fixed";
142 regulator-name = "SATA2 Power";
143 regulator-min-microvolt = <5000000>;
144 regulator-max-microvolt = <5000000>;
145 startup-delay-us = <4000000>;
149 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
152 sata3_regulator: sata3-regulator@3 {
153 compatible = "regulator-fixed";
155 regulator-name = "SATA3 Power";
156 regulator-min-microvolt = <5000000>;
157 regulator-max-microvolt = <5000000>;
158 startup-delay-us = <6000000>;
162 gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
165 sata4_regulator: sata4-regulator@4 {
166 compatible = "regulator-fixed";
168 regulator-name = "SATA4 Power";
169 regulator-min-microvolt = <5000000>;
170 regulator-max-microvolt = <5000000>;
171 startup-delay-us = <8000000>;
175 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
184 * Connected to Marvell 88SX7042 SATA-II controller
185 * handling the four disks.
194 * Connected to EtronTech EJ168A XHCI controller
195 * providing the two rear USB 3.0 ports.
205 phy0: ethernet-phy@0 { /* Marvell 88E1512 */
209 phy1: ethernet-phy@1 { /* Marvell 88E1512 */
215 sata1_pwr_pin: sata1-pwr-pin {
216 marvell,pins = "mpp42";
217 marvell,function = "gpio";
220 sata2_pwr_pin: sata2-pwr-pin {
221 marvell,pins = "mpp44";
222 marvell,function = "gpio";
225 sata3_pwr_pin: sata3-pwr-pin {
226 marvell,pins = "mpp45";
227 marvell,function = "gpio";
230 sata4_pwr_pin: sata4-pwr-pin {
231 marvell,pins = "mpp46";
232 marvell,function = "gpio";
235 sata1_pres_pin: sata1-pres-pin {
236 marvell,pins = "mpp34";
237 marvell,function = "gpio";
240 sata2_pres_pin: sata2-pres-pin {
241 marvell,pins = "mpp35";
242 marvell,function = "gpio";
245 sata3_pres_pin: sata3-pres-pin {
246 marvell,pins = "mpp40";
247 marvell,function = "gpio";
250 sata4_pres_pin: sata4-pres-pin {
251 marvell,pins = "mpp41";
252 marvell,function = "gpio";
255 syno_id_bit0_pin: syno-id-bit0-pin {
256 marvell,pins = "mpp26";
257 marvell,function = "gpio";
260 syno_id_bit1_pin: syno-id-bit1-pin {
261 marvell,pins = "mpp28";
262 marvell,function = "gpio";
265 syno_id_bit2_pin: syno-id-bit2-pin {
266 marvell,pins = "mpp29";
267 marvell,function = "gpio";
270 fan1_alarm_pin: fan1-alarm-pin {
271 marvell,pins = "mpp33";
272 marvell,function = "gpio";
275 fan2_alarm_pin: fan2-alarm-pin {
276 marvell,pins = "mpp32";
277 marvell,function = "gpio";
285 #address-cells = <1>;
287 compatible = "micron,n25q064", "jedec,spi-nor";
288 reg = <0>; /* Chip select 0 */
289 spi-max-frequency = <20000000>;
294 * Synology u-boot uses its compiled-in environment
295 * and it seems Synology did not care to change u-boot
296 * default configuration in order to allow saving a
297 * modified environment at a sensible location. So,
298 * if you do a 'saveenv' under u-boot, your modified
299 * environment will be saved at 1MB after the start
300 * of the flash, i.e. in the middle of the uImage.
301 * For that reason, it is strongly advised not to
302 * change the default environment, unless you know
303 * what you are doing.
305 partition@0 { /* u-boot */
307 reg = <0x00000000 0x000d0000>; /* 832KB */
310 partition@c0000 { /* uImage */
312 reg = <0x000d0000 0x002d0000>; /* 2880KB */
315 partition@3a0000 { /* uInitramfs */
317 reg = <0x003a0000 0x00430000>; /* 4250KB */
320 partition@7d0000 { /* MAC address and serial number */
322 reg = <0x007d0000 0x00010000>; /* 64KB */
326 label = "RedBoot config";
327 reg = <0x007e0000 0x00010000>; /* 64KB */
331 label = "FIS directory";
332 reg = <0x007f0000 0x00010000>; /* 64KB */