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44 * Device Tree file for Marvell Armada CP110 Master.
47 #include <dt-bindings/comphy/comphy_data.h>
53 compatible = "simple-bus";
54 interrupt-parent = <&gic>;
60 compatible = "simple-bus";
61 interrupt-parent = <&gic>;
62 ranges = <0x0 0x0 0xf2000000 0x2000000>;
64 cpm_ethernet: ethernet@0 {
65 compatible = "marvell,armada-7k-pp22";
66 reg = <0x0 0x100000>, <0x129000 0xb000>;
67 clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>;
68 clock-names = "pp_clk", "gop_clk", "mg_clk";
73 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
80 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
87 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
94 cpm_mdio: mdio@12a200 {
97 compatible = "marvell,orion-mdio";
98 reg = <0x12a200 0x10>;
99 device-name = "cpm-mdio";
102 cpm_xmdio: mdio@12a600 {
103 #address-cells = <1>;
105 compatible = "marvell,xmdio";
106 reg = <0x12a600 0x16>;
108 device-name = "cpm-xmdio";
111 cpm_syscon0: system-controller@440000 {
112 compatible = "marvell,cp110-system-controller0",
114 reg = <0x440000 0x1000>;
116 core-clock-output-names =
117 "cpm-apll", "cpm-ppv2-core", "cpm-eip",
118 "cpm-core", "cpm-nand-core";
119 gate-clock-output-names =
120 "cpm-audio", "cpm-communit", "cpm-nand",
121 "cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
122 "cpm-mg-core", "cpm-xor1", "cpm-xor0",
123 "cpm-gop-dp", "none", "cpm-pcie_x10",
124 "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
125 "cpm-sata", "cpm-sata-usb", "cpm-main",
126 "cpm-sd-mmc", "none", "none",
127 "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
128 "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
131 cpm_pinctl: cpm-pinctl@440000 {
132 compatible = "marvell,mvebu-pinctrl",
133 "marvell,armada-7k-pinctrl",
134 "marvell,armada-8k-cpm-pinctrl";
135 bank-name ="cp0-110";
136 reg = <0x440000 0x20>;
140 cpm_i2c0_pins: cpm-i2c-pins-0 {
141 marvell,pins = < 37 38 >;
142 marvell,function = <2>;
144 cpm_i2c1_pins: cpm-i2c-pins-1 {
145 marvell,pins = < 35 36 >;
146 marvell,function = <2>;
148 cpm_ge2_rgmii_pins: cpm-ge-rgmii-pins-0 {
149 marvell,pins = < 44 45 46 47 48 49 50 51
151 marvell,function = <1>;
153 pca0_pins: cpm-pca0_pins {
155 marvell,function = <0>;
157 cpm_sdhci_pins: cpm-sdhi-pins-0 {
158 marvell,pins = < 56 57 58 59 60 61 >;
159 marvell,function = <14>;
161 cpm_spi0_pins: cpm-spi-pins-0 {
162 marvell,pins = < 13 14 15 16 >;
163 marvell,function = <3>;
167 cpm_gpio0: gpio@440100 {
168 compatible = "marvell,orion-gpio";
169 reg = <0x440100 0x40>;
176 cpm_gpio1: gpio@440140 {
177 compatible = "marvell,orion-gpio";
178 reg = <0x440140 0x40>;
185 cpm_sata0: sata@540000 {
186 compatible = "marvell,armada-8k-ahci";
187 reg = <0x540000 0x30000>;
188 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
189 clocks = <&cpm_syscon0 1 15>;
193 cpm_usb3_0: usb3@500000 {
194 compatible = "marvell,armada-8k-xhci",
196 reg = <0x500000 0x4000>;
198 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
199 clocks = <&cpm_syscon0 1 22>;
203 cpm_usb3_1: usb3@510000 {
204 compatible = "marvell,armada-8k-xhci",
206 reg = <0x510000 0x4000>;
208 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
209 clocks = <&cpm_syscon0 1 23>;
213 cpm_spi0: spi@700600 {
214 compatible = "marvell,armada-380-spi";
215 reg = <0x700600 0x50>;
216 #address-cells = <0x1>;
219 clocks = <&cpm_syscon0 0 3>;
223 cpm_spi1: spi@700680 {
224 compatible = "marvell,armada-380-spi";
225 reg = <0x700680 0x50>;
226 #address-cells = <1>;
229 clocks = <&cpm_syscon0 1 21>;
233 cpm_i2c0: i2c@701000 {
234 compatible = "marvell,mv78230-i2c";
235 reg = <0x701000 0x20>;
236 #address-cells = <1>;
238 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
239 clocks = <&cpm_syscon0 1 21>;
243 cpm_i2c1: i2c@701100 {
244 compatible = "marvell,mv78230-i2c";
245 reg = <0x701100 0x20>;
246 #address-cells = <1>;
248 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
249 clocks = <&cpm_syscon0 1 21>;
253 cpm_comphy: comphy@441000 {
254 compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110";
255 reg = <0x441000 0x8>,
261 cpm_utmi0: utmi@580000 {
262 compatible = "marvell,mvebu-utmi-2.6.0";
263 reg = <0x580000 0x1000>, /* utmi-unit */
264 <0x440420 0x4>, /* usb-cfg */
265 <0x440440 0x4>; /* utmi-cfg */
266 utmi-port = <UTMI_PHY_TO_USB3_HOST0>;
270 cpm_utmi1: utmi@581000 {
271 compatible = "marvell,mvebu-utmi-2.6.0";
272 reg = <0x581000 0x1000>, /* utmi-unit */
273 <0x440420 0x4>, /* usb-cfg */
274 <0x440444 0x4>; /* utmi-cfg */
275 utmi-port = <UTMI_PHY_TO_USB3_HOST1>;
279 cpm_sdhci0: sdhci@780000 {
280 compatible = "marvell,armada-8k-sdhci";
281 reg = <0x780000 0x300>;
282 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
287 cpm_nand: nand@720000 {
288 compatible = "marvell,mvebu-pxa3xx-nand";
289 reg = <0x720000 0x100>;
290 #address-cells = <1>;
292 clocks = <&cpm_syscon0 1 2>;
295 nand-ecc-strength = <4>;
296 nand-ecc-step-size = <512>;
302 cpm_pcie0: pcie@f2600000 {
303 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
304 reg = <0 0xf2600000 0 0x10000>,
305 <0 0xf6f00000 0 0x80000>;
306 reg-names = "ctrl", "config";
307 #address-cells = <3>;
309 #interrupt-cells = <1>;
313 bus-range = <0 0xff>;
316 <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000
317 /* non-prefetchable memory */
318 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>;
319 interrupt-map-mask = <0 0 0 0>;
320 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
321 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
323 clocks = <&cpm_syscon0 1 13>;
327 cpm_pcie1: pcie@f2620000 {
328 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
329 reg = <0 0xf2620000 0 0x10000>,
330 <0 0xf7f00000 0 0x80000>;
331 reg-names = "ctrl", "config";
332 #address-cells = <3>;
334 #interrupt-cells = <1>;
338 bus-range = <0 0xff>;
341 <0x81000000 0 0xf9010000 0 0xf9010000 0 0x10000
342 /* non-prefetchable memory */
343 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>;
344 interrupt-map-mask = <0 0 0 0>;
345 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
346 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
349 clocks = <&cpm_syscon0 1 11>;
353 cpm_pcie2: pcie@f2640000 {
354 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
355 reg = <0 0xf2640000 0 0x10000>,
356 <0 0xf8f00000 0 0x80000>;
357 reg-names = "ctrl", "config";
358 #address-cells = <3>;
360 #interrupt-cells = <1>;
364 bus-range = <0 0xff>;
367 <0x81000000 0 0xf9020000 0 0xf9020000 0 0x10000
368 /* non-prefetchable memory */
369 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>;
370 interrupt-map-mask = <0 0 0 0>;
371 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
372 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
375 clocks = <&cpm_syscon0 1 12>;