arch/arm/dts/armada-38x.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree Include file for Marvell Armada 38x family of SoCs.
   4  *
   5  * Copyright (C) 2014 Marvell
   6  *
   7  * Lior Amsalem <alior@marvell.com>
   8  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   9  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  10  */
  11
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14
  15 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
  16
  17 / {
  18         #address-cells = <1>;
  19         #size-cells = <1>;
  20
  21         model = "Marvell Armada 38x family SoC";
  22         compatible = "marvell,armada380";
  23
  24         aliases {
  25                 gpio0 = &gpio0;
  26                 gpio1 = &gpio1;
  27                 serial0 = &uart0;
  28                 serial1 = &uart1;
  29         };
  30
  31         pmu {
  32                 compatible = "arm,cortex-a9-pmu";
  33                 interrupts-extended = <&mpic 3>;
  34         };
  35
  36         soc {
  37                 compatible = "marvell,armada380-mbus", "simple-bus";
  38                 u-boot,dm-pre-reloc;
  39                 #address-cells = <2>;
  40                 #size-cells = <1>;
  41                 controller = <&mbusc>;
  42                 interrupt-parent = <&gic>;
  43                 pcie-mem-aperture = <0xe0000000 0x8000000>;
  44                 pcie-io-aperture  = <0xe8000000 0x100000>;
  45
  46                 bootrom {
  47                         compatible = "marvell,bootrom";
  48                         reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
  49                 };
  50
  51                 devbus_bootcs: devbus-bootcs {
  52                         compatible = "marvell,mvebu-devbus";
  53                         reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
  54                         ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         clocks = <&coreclk 0>;
  58                         status = "disabled";
  59                 };
  60
  61                 devbus_cs0: devbus-cs0 {
  62                         compatible = "marvell,mvebu-devbus";
  63                         reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
  64                         ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
  65                         #address-cells = <1>;
  66                         #size-cells = <1>;
  67                         clocks = <&coreclk 0>;
  68                         status = "disabled";
  69                 };
  70
  71                 devbus_cs1: devbus-cs1 {
  72                         compatible = "marvell,mvebu-devbus";
  73                         reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
  74                         ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
  75                         #address-cells = <1>;
  76                         #size-cells = <1>;
  77                         clocks = <&coreclk 0>;
  78                         status = "disabled";
  79                 };
  80
  81                 devbus_cs2: devbus-cs2 {
  82                         compatible = "marvell,mvebu-devbus";
  83                         reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
  84                         ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
  85                         #address-cells = <1>;
  86                         #size-cells = <1>;
  87                         clocks = <&coreclk 0>;
  88                         status = "disabled";
  89                 };
  90
  91                 devbus_cs3: devbus-cs3 {
  92                         compatible = "marvell,mvebu-devbus";
  93                         reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
  94                         ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
  95                         #address-cells = <1>;
  96                         #size-cells = <1>;
  97                         clocks = <&coreclk 0>;
  98                         status = "disabled";
  99                 };
 100
 101                 internal-regs {
 102                         compatible = "simple-bus";
 103                         u-boot,dm-pre-reloc;
 104                         #address-cells = <1>;
 105                         #size-cells = <1>;
 106                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
 107
 108                         sdramc: sdramc@1400 {
 109                                 compatible = "marvell,armada-xp-sdram-controller";
 110                                 reg = <0x1400 0x500>;
 111                         };
 112
 113                         L2: cache-controller@8000 {
 114                                 compatible = "arm,pl310-cache";
 115                                 reg = <0x8000 0x1000>;
 116                                 cache-unified;
 117                                 cache-level = <2>;
 118                                 arm,double-linefill-incr = <0>;
 119                                 arm,double-linefill-wrap = <0>;
 120                                 arm,double-linefill = <0>;
 121                                 prefetch-data = <1>;
 122                         };
 123
 124                         scu@c000 {
 125                                 compatible = "arm,cortex-a9-scu";
 126                                 reg = <0xc000 0x58>;
 127                         };
 128
 129                         timer@c200 {
 130                                 compatible = "arm,cortex-a9-global-timer";
 131                                 reg = <0xc200 0x20>;
 132                                 interrupts = <GIC_PPI 11 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
 133                                 clocks = <&coreclk 2>;
 134                         };
 135
 136                         timer@c600 {
 137                                 compatible = "arm,cortex-a9-twd-timer";
 138                                 reg = <0xc600 0x20>;
 139                                 interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
 140                                 clocks = <&coreclk 2>;
 141                         };
 142
 143                         gic: interrupt-controller@d000 {
 144                                 compatible = "arm,cortex-a9-gic";
 145                                 #interrupt-cells = <3>;
 146                                 #size-cells = <0>;
 147                                 interrupt-controller;
 148                                 reg = <0xd000 0x1000>,
 149                                       <0xc100 0x100>;
 150                         };
 151
 152                         i2c0: i2c@11000 {
 153                                 compatible = "marvell,mv78230-a0-i2c", "marvell,mv64xxx-i2c";
 154                                 reg = <0x11000 0x20>;
 155                                 #address-cells = <1>;
 156                                 #size-cells = <0>;
 157                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 158                                 clocks = <&coreclk 0>;
 159                                 status = "disabled";
 160                         };
 161
 162                         i2c1: i2c@11100 {
 163                                 compatible = "marvell,mv78230-a0-i2c", "marvell,mv64xxx-i2c";
 164                                 reg = <0x11100 0x20>;
 165                                 #address-cells = <1>;
 166                                 #size-cells = <0>;
 167                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 168                                 clocks = <&coreclk 0>;
 169                                 status = "disabled";
 170                         };
 171
 172                         uart0: serial@12000 {
 173                                 compatible = "marvell,armada-38x-uart", "ns16550a";
 174                                 reg = <0x12000 0x100>;
 175                                 reg-shift = <2>;
 176                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 177                                 reg-io-width = <1>;
 178                                 clocks = <&coreclk 0>;
 179                                 status = "disabled";
 180                         };
 181
 182                         uart1: serial@12100 {
 183                                 compatible = "marvell,armada-38x-uart", "ns16550a";
 184                                 reg = <0x12100 0x100>;
 185                                 reg-shift = <2>;
 186                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 187                                 reg-io-width = <1>;
 188                                 clocks = <&coreclk 0>;
 189                                 status = "disabled";
 190                         };
 191
 192                         pinctrl: pinctrl@18000 {
 193                                 reg = <0x18000 0x20>;
 194
 195                                 ge0_rgmii_pins: ge-rgmii-pins-0 {
 196                                         marvell,pins = "mpp6", "mpp7", "mpp8",
 197                                                        "mpp9", "mpp10", "mpp11",
 198                                                        "mpp12", "mpp13", "mpp14",
 199                                                        "mpp15", "mpp16", "mpp17";
 200                                         marvell,function = "ge0";
 201                                 };
 202
 203                                 ge1_rgmii_pins: ge-rgmii-pins-1 {
 204                                         marvell,pins = "mpp21", "mpp27", "mpp28",
 205                                                        "mpp29", "mpp30", "mpp31",
 206                                                        "mpp32", "mpp37", "mpp38",
 207                                                        "mpp39", "mpp40", "mpp41";
 208                                         marvell,function = "ge1";
 209                                 };
 210
 211                                 i2c0_pins: i2c-pins-0 {
 212                                         marvell,pins = "mpp2", "mpp3";
 213                                         marvell,function = "i2c0";
 214                                 };
 215
 216                                 mdio_pins: mdio-pins {
 217                                         marvell,pins = "mpp4", "mpp5";
 218                                         marvell,function = "ge";
 219                                 };
 220
 221                                 ref_clk0_pins: ref-clk-pins-0 {
 222                                         marvell,pins = "mpp45";
 223                                         marvell,function = "ref";
 224                                 };
 225
 226                                 ref_clk1_pins: ref-clk-pins-1 {
 227                                         marvell,pins = "mpp46";
 228                                         marvell,function = "ref";
 229                                 };
 230
 231                                 spi0_pins: spi-pins-0 {
 232                                         marvell,pins = "mpp22", "mpp23", "mpp24",
 233                                                        "mpp25";
 234                                         marvell,function = "spi0";
 235                                 };
 236
 237                                 spi1_pins: spi-pins-1 {
 238                                         marvell,pins = "mpp56", "mpp57", "mpp58",
 239                                                        "mpp59";
 240                                         marvell,function = "spi1";
 241                                 };
 242
 243                                 nand_pins: nand-pins {
 244                                         marvell,pins = "mpp22", "mpp34", "mpp23",
 245                                                        "mpp33", "mpp38", "mpp28",
 246                                                        "mpp40", "mpp42", "mpp35",
 247                                                        "mpp36", "mpp25", "mpp30",
 248                                                        "mpp32";
 249                                         marvell,function = "dev";
 250                                 };
 251
 252                                 nand_rb: nand-rb {
 253                                         marvell,pins = "mpp41";
 254                                         marvell,function = "nand";
 255                                 };
 256
 257                                 uart0_pins: uart-pins-0 {
 258                                         marvell,pins = "mpp0", "mpp1";
 259                                         marvell,function = "ua0";
 260                                 };
 261
 262                                 uart1_pins: uart-pins-1 {
 263                                         marvell,pins = "mpp19", "mpp20";
 264                                         marvell,function = "ua1";
 265                                 };
 266
 267                                 sdhci_pins: sdhci-pins {
 268                                         marvell,pins = "mpp48", "mpp49", "mpp50",
 269                                                        "mpp52", "mpp53", "mpp54",
 270                                                        "mpp55", "mpp57", "mpp58",
 271                                                        "mpp59";
 272                                         marvell,function = "sd0";
 273                                 };
 274
 275                                 sata0_pins: sata-pins-0 {
 276                                         marvell,pins = "mpp20";
 277                                         marvell,function = "sata0";
 278                                 };
 279
 280                                 sata1_pins: sata-pins-1 {
 281                                         marvell,pins = "mpp19";
 282                                         marvell,function = "sata1";
 283                                 };
 284
 285                                 sata2_pins: sata-pins-2 {
 286                                         marvell,pins = "mpp47";
 287                                         marvell,function = "sata2";
 288                                 };
 289
 290                                 sata3_pins: sata-pins-3 {
 291                                         marvell,pins = "mpp44";
 292                                         marvell,function = "sata3";
 293                                 };
 294                         };
 295
 296                         gpio0: gpio@18100 {
 297                                 compatible = "marvell,armada-370-gpio",
 298                                              "marvell,orion-gpio";
 299                                 reg = <0x18100 0x40>, <0x181c0 0x08>;
 300                                 reg-names = "gpio", "pwm";
 301                                 ngpios = <32>;
 302                                 gpio-controller;
 303                                 gpio-ranges = <&pinctrl 0 0 32>;
 304                                 #gpio-cells = <2>;
 305                                 #pwm-cells = <2>;
 306                                 interrupt-controller;
 307                                 #interrupt-cells = <2>;
 308                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 309                                              <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 310                                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 311                                              <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 312                                 clocks = <&coreclk 0>;
 313                         };
 314
 315                         gpio1: gpio@18140 {
 316                                 compatible = "marvell,armada-370-gpio",
 317                                              "marvell,orion-gpio";
 318                                 reg = <0x18140 0x40>, <0x181c8 0x08>;
 319                                 reg-names = "gpio", "pwm";
 320                                 ngpios = <28>;
 321                                 gpio-controller;
 322                                 gpio-ranges = <&pinctrl 0 32 28>;
 323                                 #gpio-cells = <2>;
 324                                 #pwm-cells = <2>;
 325                                 interrupt-controller;
 326                                 #interrupt-cells = <2>;
 327                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 328                                              <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 329                                              <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 330                                              <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 331                                 clocks = <&coreclk 0>;
 332                         };
 333
 334                         systemc: system-controller@18200 {
 335                                 compatible = "marvell,armada-380-system-controller",
 336                                              "marvell,armada-370-xp-system-controller";
 337                                 reg = <0x18200 0x100>;
 338                                 #reset-cells = <2>;
 339                         };
 340
 341                         gateclk: clock-gating-control@18220 {
 342                                 compatible = "marvell,armada-380-gating-clock";
 343                                 reg = <0x18220 0x4>;
 344                                 clocks = <&coreclk 0>;
 345                                 #clock-cells = <1>;
 346                         };
 347
 348                         comphy: phy@18300 {
 349                                 compatible = "marvell,armada-380-comphy";
 350                                 reg-names = "comphy", "conf";
 351                                 reg = <0x18300 0x100>, <0x18460 4>;
 352                                 #address-cells = <1>;
 353                                 #size-cells = <0>;
 354
 355                                 comphy0: phy@0 {
 356                                         reg = <0>;
 357                                         #phy-cells = <1>;
 358                                 };
 359
 360                                 comphy1: phy@1 {
 361                                         reg = <1>;
 362                                         #phy-cells = <1>;
 363                                 };
 364
 365                                 comphy2: phy@2 {
 366                                         reg = <2>;
 367                                         #phy-cells = <1>;
 368                                 };
 369
 370                                 comphy3: phy@3 {
 371                                         reg = <3>;
 372                                         #phy-cells = <1>;
 373                                 };
 374
 375                                 comphy4: phy@4 {
 376                                         reg = <4>;
 377                                         #phy-cells = <1>;
 378                                 };
 379
 380                                 comphy5: phy@5 {
 381                                         reg = <5>;
 382                                         #phy-cells = <1>;
 383                                 };
 384                         };
 385
 386                         coreclk: mvebu-sar@18600 {
 387                                 compatible = "marvell,armada-380-core-clock";
 388                                 reg = <0x18600 0x04>;
 389                                 #clock-cells = <1>;
 390                         };
 391
 392                         mbusc: mbus-controller@20000 {
 393                                 compatible = "marvell,mbus-controller";
 394                                 reg = <0x20000 0x100>, <0x20180 0x20>,
 395                                       <0x20250 0x8>;
 396                         };
 397
 398                         mpic: interrupt-controller@20a00 {
 399                                 compatible = "marvell,mpic";
 400                                 reg = <0x20a00 0x2d0>, <0x21070 0x58>;
 401                                 #interrupt-cells = <1>;
 402                                 #size-cells = <1>;
 403                                 interrupt-controller;
 404                                 msi-controller;
 405                                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
 406                         };
 407
 408                         timer: timer@20300 {
 409                                 compatible = "marvell,armada-380-timer",
 410                                              "marvell,armada-xp-timer";
 411                                 reg = <0x20300 0x30>, <0x21040 0x30>;
 412                                 interrupts-extended = <&gic  GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
 413                                                       <&gic  GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
 414                                                       <&gic  GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
 415                                                       <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 416                                                       <&mpic 5>,
 417                                                       <&mpic 6>;
 418                                 clocks = <&coreclk 2>, <&refclk>;
 419                                 clock-names = "nbclk", "fixed";
 420                         };
 421
 422                         watchdog: watchdog@20300 {
 423                                 compatible = "marvell,armada-380-wdt";
 424                                 reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
 425                                 clocks = <&coreclk 2>, <&refclk>;
 426                                 clock-names = "nbclk", "fixed";
 427                                 interrupts-extended = <&gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
 428                                                       <&gic GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>;
 429                         };
 430
 431                         cpurst: cpurst@20800 {
 432                                 compatible = "marvell,armada-370-cpu-reset";
 433                                 reg = <0x20800 0x10>;
 434                         };
 435
 436                         mpcore-soc-ctrl@20d20 {
 437                                 compatible = "marvell,armada-380-mpcore-soc-ctrl";
 438                                 reg = <0x20d20 0x6c>;
 439                         };
 440
 441                         coherencyfab: coherency-fabric@21010 {
 442                                 compatible = "marvell,armada-380-coherency-fabric";
 443                                 reg = <0x21010 0x1c>;
 444                         };
 445
 446                         pmsu: pmsu@22000 {
 447                                 compatible = "marvell,armada-380-pmsu";
 448                                 reg = <0x22000 0x1000>;
 449                         };
 450
 451                         /*
 452                          * As a special exception to the "order by
 453                          * register address" rule, the eth0 node is
 454                          * placed here to ensure that it gets
 455                          * registered as the first interface, since
 456                          * the network subsystem doesn't allow naming
 457                          * interfaces using DT aliases. Without this,
 458                          * the ordering of interfaces is different
 459                          * from the one used in U-Boot and the
 460                          * labeling of interfaces on the boards, which
 461                          * is very confusing for users.
 462                          */
 463                         eth0: ethernet@70000 {
 464                                 compatible = "marvell,armada-370-neta";
 465                                 reg = <0x70000 0x4000>;
 466                                 interrupts-extended = <&mpic 8>;
 467                                 clocks = <&gateclk 4>;
 468                                 tx-csum-limit = <9800>;
 469                                 status = "disabled";
 470                         };
 471
 472                         eth1: ethernet@30000 {
 473                                 compatible = "marvell,armada-370-neta";
 474                                 reg = <0x30000 0x4000>;
 475                                 interrupts-extended = <&mpic 10>;
 476                                 clocks = <&gateclk 3>;
 477                                 status = "disabled";
 478                         };
 479
 480                         eth2: ethernet@34000 {
 481                                 compatible = "marvell,armada-370-neta";
 482                                 reg = <0x34000 0x4000>;
 483                                 interrupts-extended = <&mpic 12>;
 484                                 clocks = <&gateclk 2>;
 485                                 status = "disabled";
 486                         };
 487
 488                         usb0: usb@58000 {
 489                                 compatible = "marvell,orion-ehci";
 490                                 reg = <0x58000 0x500>;
 491                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 492                                 clocks = <&gateclk 18>;
 493                                 status = "disabled";
 494                         };
 495
 496                         xor0: xor@60800 {
 497                                 compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 498                                 reg = <0x60800 0x100
 499                                        0x60a00 0x100>;
 500                                 clocks = <&gateclk 22>;
 501                                 status = "okay";
 502
 503                                 xor00 {
 504                                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 505                                         dmacap,memcpy;
 506                                         dmacap,xor;
 507                                 };
 508                                 xor01 {
 509                                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 510                                         dmacap,memcpy;
 511                                         dmacap,xor;
 512                                         dmacap,memset;
 513                                 };
 514                         };
 515
 516                         xor1: xor@60900 {
 517                                 compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 518                                 reg = <0x60900 0x100
 519                                        0x60b00 0x100>;
 520                                 clocks = <&gateclk 28>;
 521                                 status = "okay";
 522
 523                                 xor10 {
 524                                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 525                                         dmacap,memcpy;
 526                                         dmacap,xor;
 527                                 };
 528                                 xor11 {
 529                                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 530                                         dmacap,memcpy;
 531                                         dmacap,xor;
 532                                         dmacap,memset;
 533                                 };
 534                         };
 535
 536                         mdio: mdio@72004 {
 537                                 #address-cells = <1>;
 538                                 #size-cells = <0>;
 539                                 compatible = "marvell,orion-mdio";
 540                                 reg = <0x72004 0x4>;
 541                                 clocks = <&gateclk 4>;
 542                         };
 543
 544                         cesa: crypto@90000 {
 545                                 compatible = "marvell,armada-38x-crypto";
 546                                 reg = <0x90000 0x10000>;
 547                                 reg-names = "regs";
 548                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
 549                                              <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 550                                 clocks = <&gateclk 23>, <&gateclk 21>,
 551                                          <&gateclk 14>, <&gateclk 16>;
 552                                 clock-names = "cesa0", "cesa1",
 553                                               "cesaz0", "cesaz1";
 554                                 marvell,crypto-srams = <&crypto_sram0>,
 555                                                        <&crypto_sram1>;
 556                                 marvell,crypto-sram-size = <0x800>;
 557                         };
 558
 559                         rtc: rtc@a3800 {
 560                                 compatible = "marvell,armada-380-rtc";
 561                                 reg = <0xa3800 0x20>, <0x184a0 0x0c>;
 562                                 reg-names = "rtc", "rtc-soc";
 563                                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 564                         };
 565
 566                         ahci0: sata@a8000 {
 567                                 compatible = "marvell,armada-380-ahci";
 568                                 reg = <0xa8000 0x2000>;
 569                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 570                                 clocks = <&gateclk 15>;
 571                                 status = "disabled";
 572                         };
 573
 574                         bm: bm@c8000 {
 575                                 compatible = "marvell,armada-380-neta-bm";
 576                                 reg = <0xc8000 0xac>;
 577                                 clocks = <&gateclk 13>;
 578                                 internal-mem = <&bm_bppi>;
 579                                 status = "disabled";
 580                         };
 581
 582                         ahci1: sata@e0000 {
 583                                 compatible = "marvell,armada-380-ahci";
 584                                 reg = <0xe0000 0x2000>;
 585                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 586                                 clocks = <&gateclk 30>;
 587                                 status = "disabled";
 588                         };
 589
 590                         coredivclk: clock@e4250 {
 591                                 compatible = "marvell,armada-380-corediv-clock";
 592                                 reg = <0xe4250 0xc>;
 593                                 #clock-cells = <1>;
 594                                 clocks = <&mainpll>;
 595                                 clock-output-names = "nand";
 596                         };
 597
 598                         thermal: thermal@e8078 {
 599                                 compatible = "marvell,armada380-thermal";
 600                                 reg = <0xe4078 0x4>, <0xe4070 0x8>;
 601                                 status = "okay";
 602                         };
 603
 604                         nand_controller: nand-controller@d0000 {
 605                                 compatible = "marvell,armada370-nand-controller";
 606                                 reg = <0xd0000 0x54>;
 607                                 #address-cells = <1>;
 608                                 #size-cells = <0>;
 609                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 610                                 clocks = <&coredivclk 0>;
 611                                 status = "disabled";
 612                         };
 613
 614                         sdhci: sdhci@d8000 {
 615                                 compatible = "marvell,armada-380-sdhci";
 616                                 reg-names = "sdhci", "mbus", "conf-sdio3";
 617                                 reg = <0xd8000 0x1000>,
 618                                         <0xdc000 0x100>,
 619                                         <0x18454 0x4>;
 620                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 621                                 clocks = <&gateclk 17>;
 622                                 mrvl,clk-delay-cycles = <0x1F>;
 623                                 status = "disabled";
 624                         };
 625
 626                         usb3_0: usb3@f0000 {
 627                                 compatible = "marvell,armada-380-xhci";
 628                                 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
 629                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 630                                 clocks = <&gateclk 9>;
 631                                 status = "disabled";
 632                         };
 633
 634                         usb3_1: usb3@f8000 {
 635                                 compatible = "marvell,armada-380-xhci";
 636                                 reg = <0xf8000 0x4000>,<0xfc000 0x4000>;
 637                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 638                                 clocks = <&gateclk 10>;
 639                                 status = "disabled";
 640                         };
 641                 };
 642
 643                 crypto_sram0: sa-sram0 {
 644                         compatible = "mmio-sram";
 645                         reg = <MBUS_ID(0x09, 0x19) 0 0x800>;
 646                         clocks = <&gateclk 23>;
 647                         #address-cells = <1>;
 648                         #size-cells = <1>;
 649                         ranges = <0 MBUS_ID(0x09, 0x19) 0 0x800>;
 650                 };
 651
 652                 crypto_sram1: sa-sram1 {
 653                         compatible = "mmio-sram";
 654                         reg = <MBUS_ID(0x09, 0x15) 0 0x800>;
 655                         clocks = <&gateclk 21>;
 656                         #address-cells = <1>;
 657                         #size-cells = <1>;
 658                         ranges = <0 MBUS_ID(0x09, 0x15) 0 0x800>;
 659                 };
 660
 661                 bm_bppi: bm-bppi {
 662                         compatible = "mmio-sram";
 663                         reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
 664                         ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
 665                         #address-cells = <1>;
 666                         #size-cells = <1>;
 667                         clocks = <&gateclk 13>;
 668                         no-memory-wc;
 669                         status = "disabled";
 670                 };
 671
 672                 spi0: spi@10600 {
 673                         compatible = "marvell,armada-380-spi",
 674                                         "marvell,orion-spi";
 675                         reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
 676                         #address-cells = <1>;
 677                         #size-cells = <0>;
 678                         cell-index = <0>;
 679                         interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
 680                         clocks = <&coreclk 0>;
 681                         status = "disabled";
 682                 };
 683
 684                 spi1: spi@10680 {
 685                         compatible = "marvell,armada-380-spi",
 686                                         "marvell,orion-spi";
 687                         reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
 688                         #address-cells = <1>;
 689                         #size-cells = <0>;
 690                         cell-index = <1>;
 691                         interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 692                         clocks = <&coreclk 0>;
 693                         status = "disabled";
 694                 };
 695         };
 696
 697         clocks {
 698                 /* 1 GHz fixed main PLL */
 699                 mainpll: mainpll {
 700                         compatible = "fixed-clock";
 701                         #clock-cells = <0>;
 702                         clock-frequency = <1000000000>;
 703                 };
 704
 705                 /* 25 MHz reference crystal */
 706                 refclk: oscillator {
 707                         compatible = "fixed-clock";
 708                         #clock-cells = <0>;
 709                         clock-frequency = <25000000>;
 710                 };
 711         };
 712 };