2 * Device Tree file for Marvell Armada 385 development board
5 * Copyright (C) 2014 Marvell
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
14 * a) This file is licensed under the terms of the GNU General Public
15 * License version 2. This program is licensed "as is" without
16 * any warranty of any kind, whether express or implied.
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
43 #include "armada-388.dtsi"
44 #include <dt-bindings/gpio/gpio.h>
47 model = "Marvell Armada 385 GP";
48 compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
51 stdout-path = "serial0:115200n8";
61 device_type = "memory";
62 reg = <0x00000000 0x80000000>; /* 2 GB */
66 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
67 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&spi0_pins>;
82 compatible = "st,m25p128", "jedec,spi-nor";
83 reg = <0>; /* Chip select 0 */
84 spi-max-frequency = <50000000>;
90 pinctrl-names = "default";
91 pinctrl-0 = <&i2c0_pins>;
93 clock-frequency = <100000>;
95 * The EEPROM located at adresse 54 is needed
96 * for the boot - DO NOT ERASE IT -
99 expander0: pca9555@20 {
100 compatible = "nxp,pca9555";
101 pinctrl-names = "default";
102 pinctrl-0 = <&pca0_pins>;
103 interrupt-parent = <&gpio0>;
104 interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
107 interrupt-controller;
108 #interrupt-cells = <2>;
112 expander1: pca9555@21 {
113 compatible = "nxp,pca9555";
114 pinctrl-names = "default";
115 interrupt-parent = <&gpio0>;
116 interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
119 interrupt-controller;
120 #interrupt-cells = <2>;
128 * Exported on the micro USB connector CON16
132 pinctrl-names = "default";
133 pinctrl-0 = <&uart0_pins>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&ge1_rgmii_pins>;
144 phy-mode = "rgmii-id";
149 vcc-supply = <®_usb2_0_vbus>;
155 pinctrl-names = "default";
157 * The Reference Clock 0 is used to provide a
160 pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
163 phy-mode = "rgmii-id";
168 pinctrl-names = "default";
169 pinctrl-0 = <&mdio_pins>;
171 phy0: ethernet-phy@1 {
175 phy1: ethernet-phy@0 {
181 pinctrl-names = "default";
182 pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
184 #address-cells = <1>;
189 target-supply = <®_5v_sata0>;
194 target-supply = <®_5v_sata1>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
202 #address-cells = <1>;
207 target-supply = <®_5v_sata2>;
212 target-supply = <®_5v_sata3>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&sdhci_pins>;
219 cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
228 vcc-supply = <®_usb2_1_vbus>;
234 vcc-supply = <®_usb3_vbus>;
242 * One PCIe units is accessible through
243 * standard PCIe slot on the board.
251 * The two other PCIe units are accessible
252 * through mini PCIe slot on the board.
265 compatible = "gpio-fan";
266 gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
267 gpio-fan,speed-map = < 0 0
272 reg_usb3_vbus: usb3-vbus {
273 compatible = "regulator-fixed";
274 regulator-name = "usb3-vbus";
275 regulator-min-microvolt = <5000000>;
276 regulator-max-microvolt = <5000000>;
279 gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
282 reg_usb2_0_vbus: v5-vbus0 {
283 compatible = "regulator-fixed";
284 regulator-name = "v5.0-vbus0";
285 regulator-min-microvolt = <5000000>;
286 regulator-max-microvolt = <5000000>;
289 gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
292 reg_usb2_1_vbus: v5-vbus1 {
293 compatible = "regulator-fixed";
294 regulator-name = "v5.0-vbus1";
295 regulator-min-microvolt = <5000000>;
296 regulator-max-microvolt = <5000000>;
299 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
302 reg_usb2_1_vbus: v5-vbus1 {
303 compatible = "regulator-fixed";
304 regulator-name = "v5.0-vbus1";
305 regulator-min-microvolt = <5000000>;
306 regulator-max-microvolt = <5000000>;
309 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
312 reg_sata0: pwr-sata0 {
313 compatible = "regulator-fixed";
314 regulator-name = "pwr_en_sata0";
320 reg_5v_sata0: v5-sata0 {
321 compatible = "regulator-fixed";
322 regulator-name = "v5.0-sata0";
323 regulator-min-microvolt = <5000000>;
324 regulator-max-microvolt = <5000000>;
326 vin-supply = <®_sata0>;
329 reg_12v_sata0: v12-sata0 {
330 compatible = "regulator-fixed";
331 regulator-name = "v12.0-sata0";
332 regulator-min-microvolt = <12000000>;
333 regulator-max-microvolt = <12000000>;
335 vin-supply = <®_sata0>;
338 reg_sata1: pwr-sata1 {
339 regulator-name = "pwr_en_sata1";
340 compatible = "regulator-fixed";
341 regulator-min-microvolt = <12000000>;
342 regulator-max-microvolt = <12000000>;
345 gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
348 reg_5v_sata1: v5-sata1 {
349 compatible = "regulator-fixed";
350 regulator-name = "v5.0-sata1";
351 regulator-min-microvolt = <5000000>;
352 regulator-max-microvolt = <5000000>;
354 vin-supply = <®_sata1>;
357 reg_12v_sata1: v12-sata1 {
358 compatible = "regulator-fixed";
359 regulator-name = "v12.0-sata1";
360 regulator-min-microvolt = <12000000>;
361 regulator-max-microvolt = <12000000>;
363 vin-supply = <®_sata1>;
366 reg_sata2: pwr-sata2 {
367 compatible = "regulator-fixed";
368 regulator-name = "pwr_en_sata2";
371 gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
374 reg_5v_sata2: v5-sata2 {
375 compatible = "regulator-fixed";
376 regulator-name = "v5.0-sata2";
377 regulator-min-microvolt = <5000000>;
378 regulator-max-microvolt = <5000000>;
380 vin-supply = <®_sata2>;
383 reg_12v_sata2: v12-sata2 {
384 compatible = "regulator-fixed";
385 regulator-name = "v12.0-sata2";
386 regulator-min-microvolt = <12000000>;
387 regulator-max-microvolt = <12000000>;
389 vin-supply = <®_sata2>;
392 reg_sata3: pwr-sata3 {
393 compatible = "regulator-fixed";
394 regulator-name = "pwr_en_sata3";
397 gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
400 reg_5v_sata3: v5-sata3 {
401 compatible = "regulator-fixed";
402 regulator-name = "v5.0-sata3";
403 regulator-min-microvolt = <5000000>;
404 regulator-max-microvolt = <5000000>;
406 vin-supply = <®_sata3>;
409 reg_12v_sata3: v12-sata3 {
410 compatible = "regulator-fixed";
411 regulator-name = "v12.0-sata3";
412 regulator-min-microvolt = <12000000>;
413 regulator-max-microvolt = <12000000>;
415 vin-supply = <®_sata3>;
420 pca0_pins: pca0_pins {
421 marvell,pins = "mpp18";
422 marvell,function = "gpio";