arch/arm/dts/am43x-epos-evm.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
   4  */
   5
   6 /* AM43x EPOS EVM */
   7
   8 /dts-v1/;
   9
  10 #include "am4372.dtsi"
  11 #include <dt-bindings/pinctrl/am43xx.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/pwm/pwm.h>
  14 #include <dt-bindings/sound/tlv320aic31xx-micbias.h>
  15
  16 / {
  17         model = "TI AM43x EPOS EVM";
  18         compatible = "ti,am43x-epos-evm","ti,am438x","ti,am43";
  19
  20         aliases {
  21                 display0 = &lcd0;
  22         };
  23
  24         chosen {
  25                 stdout-path = &uart0;
  26                 tick-timer = &timer2;
  27         };
  28
  29         vmmcsd_fixed: fixedregulator-sd {
  30                 compatible = "regulator-fixed";
  31                 regulator-name = "vmmcsd_fixed";
  32                 regulator-min-microvolt = <3300000>;
  33                 regulator-max-microvolt = <3300000>;
  34                 enable-active-high;
  35         };
  36
  37         vbat: fixedregulator@0 {
  38                 compatible = "regulator-fixed";
  39                 regulator-name = "vbat";
  40                 regulator-min-microvolt = <5000000>;
  41                 regulator-max-microvolt = <5000000>;
  42                 regulator-boot-on;
  43         };
  44
  45         lcd0: display {
  46                 compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
  47                 label = "lcd";
  48
  49                 panel-timing {
  50                         clock-frequency = <33000000>;
  51                         hactive = <800>;
  52                         vactive = <480>;
  53                         hfront-porch = <210>;
  54                         hback-porch = <16>;
  55                         hsync-len = <30>;
  56                         vback-porch = <10>;
  57                         vfront-porch = <22>;
  58                         vsync-len = <13>;
  59                         hsync-active = <0>;
  60                         vsync-active = <0>;
  61                         de-active = <1>;
  62                         pixelclk-active = <1>;
  63                 };
  64
  65                 port {
  66                         lcd_in: endpoint {
  67                                 remote-endpoint = <&dpi_out>;
  68                         };
  69                 };
  70         };
  71
  72         matrix_keypad: matrix_keypad@0 {
  73                 compatible = "gpio-matrix-keypad";
  74                 debounce-delay-ms = <5>;
  75                 col-scan-delay-us = <2>;
  76
  77                 row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH         /* Bank0, pin12 */
  78                              &gpio0 13 GPIO_ACTIVE_HIGH         /* Bank0, pin13 */
  79                              &gpio0 14 GPIO_ACTIVE_HIGH         /* Bank0, pin14 */
  80                              &gpio0 15 GPIO_ACTIVE_HIGH>;       /* Bank0, pin15 */
  81
  82                 col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH          /* Bank3, pin9 */
  83                              &gpio3 10 GPIO_ACTIVE_HIGH         /* Bank3, pin10 */
  84                              &gpio2 18 GPIO_ACTIVE_HIGH         /* Bank2, pin18 */
  85                              &gpio2 19 GPIO_ACTIVE_HIGH>;       /* Bank2, pin19 */
  86
  87                 linux,keymap = <0x00000201      /* P1 */
  88                         0x01000204      /* P4 */
  89                         0x02000207      /* P7 */
  90                         0x0300020a      /* NUMERIC_STAR */
  91                         0x00010202      /* P2 */
  92                         0x01010205      /* P5 */
  93                         0x02010208      /* P8 */
  94                         0x03010200      /* P0 */
  95                         0x00020203      /* P3 */
  96                         0x01020206      /* P6 */
  97                         0x02020209      /* P9 */
  98                         0x0302020b      /* NUMERIC_POUND */
  99                         0x00030067      /* UP */
 100                         0x0103006a      /* RIGHT */
 101                         0x0203006c      /* DOWN */
 102                         0x03030069>;    /* LEFT */
 103         };
 104
 105         backlight {
 106                 compatible = "pwm-backlight";
 107                 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
 108                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
 109                 default-brightness-level = <8>;
 110         };
 111
 112         sound0: sound@0 {
 113                 compatible = "simple-audio-card";
 114                 simple-audio-card,name = "AM43-EPOS-EVM";
 115                 simple-audio-card,widgets =
 116                         "Microphone", "Microphone Jack",
 117                         "Headphone", "Headphone Jack",
 118                         "Speaker", "Speaker";
 119                 simple-audio-card,routing =
 120                         "MIC1LP", "Microphone Jack",
 121                         "MIC1RP", "Microphone Jack",
 122                         "MIC1LP", "MICBIAS",
 123                         "MIC1RP", "MICBIAS",
 124                         "Headphone Jack", "HPL",
 125                         "Headphone Jack", "HPR",
 126                         "Speaker", "SPL",
 127                         "Speaker", "SPR";
 128                 simple-audio-card,format = "dsp_b";
 129                 simple-audio-card,bitclock-master = <&sound0_master>;
 130                 simple-audio-card,frame-master = <&sound0_master>;
 131                 simple-audio-card,bitclock-inversion;
 132
 133                 simple-audio-card,cpu {
 134                         sound-dai = <&mcasp1>;
 135                         system-clock-frequency = <12000000>;
 136                 };
 137
 138                 sound0_master: simple-audio-card,codec {
 139                         sound-dai = <&tlv320aic3111>;
 140                         system-clock-frequency = <12000000>;
 141                 };
 142         };
 143 };
 144
 145 &am43xx_pinmux {
 146                 cpsw_default: cpsw_default {
 147                         pinctrl-single,pins = <
 148                                 /* Slave 1 */
 149                                 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_crs.rmii1_crs */
 150                                 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxerr.rmii1_rxerr */
 151                                 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txen.rmii1_txen */
 152                                 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxdv.rmii1_rxdv */
 153                                 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txd1.rmii1_txd1 */
 154                                 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txd0.rmii1_txd0 */
 155                                 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd1.rmii1_rxd1 */
 156                                 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd0.rmii1_rxd0 */
 157                                 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* rmii1_refclk.rmii1_refclk */
 158                         >;
 159                 };
 160
 161                 cpsw_sleep: cpsw_sleep {
 162                         pinctrl-single,pins = <
 163                                 /* Slave 1 reset value */
 164                                 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 165                                 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
 166                                 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 167                                 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 168                                 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 169                                 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 170                                 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 171                                 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 172                                 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
 173                         >;
 174                 };
 175
 176                 davinci_mdio_default: davinci_mdio_default {
 177                         pinctrl-single,pins = <
 178                                 /* MDIO */
 179                                 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 180                                 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 181                         >;
 182                 };
 183
 184                 davinci_mdio_sleep: davinci_mdio_sleep {
 185                         pinctrl-single,pins = <
 186                                 /* MDIO reset value */
 187                                 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 188                                 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 189                         >;
 190                 };
 191
 192                 i2c0_pins: pinmux_i2c0_pins {
 193                         pinctrl-single,pins = <
 194                                 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
 195                                 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
 196                         >;
 197                 };
 198
 199                 nand_flash_x8: nand_flash_x8 {
 200                         pinctrl-single,pins = <
 201                                 AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a0.SELQSPIorNAND/GPIO */
 202                                 AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad0.gpmc_ad0 */
 203                                 AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad1.gpmc_ad1 */
 204                                 AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad2.gpmc_ad2 */
 205                                 AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad3.gpmc_ad3 */
 206                                 AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
 207                                 AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
 208                                 AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
 209                                 AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
 210                                 AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
 211                                 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wpn.gpmc_wpn */
 212                                 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
 213                                 AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
 214                                 AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
 215                                 AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
 216                                 AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
 217                         >;
 218                 };
 219
 220                 ecap0_pins: backlight_pins {
 221                         pinctrl-single,pins = <
 222                                 AM4372_IOPAD(0x964, MUX_MODE0)         /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
 223                         >;
 224                 };
 225
 226                 i2c2_pins: pinmux_i2c2_pins {
 227                         pinctrl-single,pins = <
 228                                 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_sda.i2c2_sda */
 229                                 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_scl.i2c2_scl */
 230                         >;
 231                 };
 232
 233                 spi0_pins: pinmux_spi0_pins {
 234                         pinctrl-single,pins = <
 235                                 AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0)           /* spi0_clk.spi0_clk */
 236                                 AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0)           /* spi0_d0.spi0_d0 */
 237                                 AM4372_IOPAD(0x958, PIN_INPUT | MUX_MODE0)           /* spi0_d1.spi0_d1 */
 238                                 AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0)          /* spi0_cs0.spi0_cs0 */
 239                         >;
 240                 };
 241
 242                 spi1_pins: pinmux_spi1_pins {
 243                         pinctrl-single,pins = <
 244                                 AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3)           /* mcasp0_aclkx.spi1_clk */
 245                                 AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3)           /* mcasp0_fsx.spi1_d0 */
 246                                 AM4372_IOPAD(0x998, PIN_INPUT | MUX_MODE3)           /* mcasp0_axr0.spi1_d1 */
 247                                 AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3)          /* mcasp0_ahclkr.spi1_cs0 */
 248                         >;
 249                 };
 250
 251                 mmc1_pins: pinmux_mmc1_pins {
 252                         pinctrl-single,pins = <
 253                                 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 254                         >;
 255                 };
 256
 257                 qspi1_default: qspi1_default {
 258                         pinctrl-single,pins = <
 259                                 AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
 260                                 AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
 261                                 AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)
 262                                 AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)
 263                                 AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)
 264                                 AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
 265                         >;
 266                 };
 267
 268                 pixcir_ts_pins: pixcir_ts_pins {
 269                         pinctrl-single,pins = <
 270                                 AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7)       /* gpmc_a1.gpio1_17 */
 271                         >;
 272                 };
 273
 274                 hdq_pins: pinmux_hdq_pins {
 275                         pinctrl-single,pins = <
 276                                 AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1)    /* cam1_wen.hdq_gpio */
 277                         >;
 278                 };
 279
 280                 dss_pins: dss_pins {
 281                         pinctrl-single,pins = <
 282                                 AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
 283                                 AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
 284                                 AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
 285                                 AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
 286                                 AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
 287                                 AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
 288                                 AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
 289                                 AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
 290                                 AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
 291                                 AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 292                                 AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 293                                 AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
 294                                 AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 295                                 AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 296                                 AM4372_IOPAD(0x8B8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 297                                 AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
 298                                 AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 299                                 AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 300                                 AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 301                                 AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
 302                                 AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 303                                 AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 304                                 AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 305                                 AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
 306                                 AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
 307                                 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
 308                                 AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
 309                                 AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
 310                         >;
 311                 };
 312
 313                 display_mux_pins: display_mux_pins {
 314                         pinctrl-single,pins = <
 315                                 /* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
 316                                 AM4372_IOPAD(0x88C, PIN_OUTPUT_PULLUP | MUX_MODE7)
 317                         >;
 318                 };
 319
 320                 vpfe1_pins_default: vpfe1_pins_default {
 321                         pinctrl-single,pins = <
 322                                 AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0 */
 323                                 AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0 */
 324                                 AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0 */
 325                                 AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0 */
 326                                 AM4372_IOPAD(0x9dc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0 */
 327                                 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0 */
 328                                 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0 */
 329                                 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0 */
 330                                 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0 */
 331                                 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0 */
 332                                 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0 */
 333                                 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0 */
 334                                 AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0 */
 335                         >;
 336                 };
 337
 338                 vpfe1_pins_sleep: vpfe1_pins_sleep {
 339                         pinctrl-single,pins = <
 340                                 AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 341                                 AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 342                                 AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 343                                 AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 344                                 AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 345                                 AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 346                                 AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 347                                 AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 348                                 AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 349                                 AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 350                                 AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 351                                 AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 352                                 AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 353                         >;
 354                 };
 355
 356                 mcasp1_pins: mcasp1_pins {
 357                         pinctrl-single,pins = <
 358                                 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
 359                                 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
 360                                 AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
 361                                 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
 362                         >;
 363                 };
 364
 365                 mcasp1_sleep_pins: mcasp1_sleep_pins {
 366                         pinctrl-single,pins = <
 367                                 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
 368                                 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
 369                                 AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 370                                 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
 371                         >;
 372                 };
 373 };
 374
 375 &mmc1 {
 376         status = "okay";
 377         vmmc-supply = <&vmmcsd_fixed>;
 378         bus-width = <4>;
 379         pinctrl-names = "default";
 380         pinctrl-0 = <&mmc1_pins>;
 381         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 382 };
 383
 384 &mac {
 385         pinctrl-names = "default", "sleep";
 386         pinctrl-0 = <&cpsw_default>;
 387         pinctrl-1 = <&cpsw_sleep>;
 388         status = "okay";
 389         slaves = <1>;
 390 };
 391
 392 &davinci_mdio {
 393         pinctrl-names = "default", "sleep";
 394         pinctrl-0 = <&davinci_mdio_default>;
 395         pinctrl-1 = <&davinci_mdio_sleep>;
 396         status = "okay";
 397
 398         ethphy0: ethernet-phy@16 {
 399                 reg = <16>;
 400         };
 401 };
 402
 403 &cpsw_emac0 {
 404         phy-handle = <&ethphy0>;
 405         phy-mode = "rmii";
 406 };
 407
 408 &phy_sel {
 409         rmii-clock-ext;
 410 };
 411
 412 &i2c0 {
 413         status = "okay";
 414         pinctrl-names = "default";
 415         pinctrl-0 = <&i2c0_pins>;
 416         clock-frequency = <400000>;
 417
 418         tps65218: tps65218@24 {
 419                 reg = <0x24>;
 420                 compatible = "ti,tps65218";
 421                 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
 422                 interrupt-controller;
 423                 #interrupt-cells = <2>;
 424
 425                 dcdc1: regulator-dcdc1 {
 426                         compatible = "ti,tps65218-dcdc1";
 427                         regulator-name = "vdd_core";
 428                         regulator-min-microvolt = <912000>;
 429                         regulator-max-microvolt = <1144000>;
 430                         regulator-boot-on;
 431                         regulator-always-on;
 432                 };
 433
 434                 dcdc2: regulator-dcdc2 {
 435                         compatible = "ti,tps65218-dcdc2";
 436                         regulator-name = "vdd_mpu";
 437                         regulator-min-microvolt = <912000>;
 438                         regulator-max-microvolt = <1378000>;
 439                         regulator-boot-on;
 440                         regulator-always-on;
 441                 };
 442
 443                 dcdc3: regulator-dcdc3 {
 444                         compatible = "ti,tps65218-dcdc3";
 445                         regulator-name = "vdcdc3";
 446                         regulator-min-microvolt = <1500000>;
 447                         regulator-max-microvolt = <1500000>;
 448                         regulator-boot-on;
 449                         regulator-always-on;
 450                 };
 451
 452                 dcdc4: regulator-dcdc4 {
 453                         compatible = "ti,tps65218-dcdc4";
 454                         regulator-name = "vdcdc4";
 455                         regulator-min-microvolt = <3300000>;
 456                         regulator-max-microvolt = <3300000>;
 457                         regulator-boot-on;
 458                         regulator-always-on;
 459                 };
 460
 461                 dcdc5: regulator-dcdc5 {
 462                         compatible = "ti,tps65218-dcdc5";
 463                         regulator-name = "v1_0bat";
 464                         regulator-min-microvolt = <1000000>;
 465                         regulator-max-microvolt = <1000000>;
 466                 };
 467
 468                 dcdc6: regulator-dcdc6 {
 469                         compatible = "ti,tps65218-dcdc6";
 470                         regulator-name = "v1_8bat";
 471                         regulator-min-microvolt = <1800000>;
 472                         regulator-max-microvolt = <1800000>;
 473                 };
 474
 475                 ldo1: regulator-ldo1 {
 476                         compatible = "ti,tps65218-ldo1";
 477                         regulator-min-microvolt = <1800000>;
 478                         regulator-max-microvolt = <1800000>;
 479                         regulator-boot-on;
 480                         regulator-always-on;
 481                 };
 482         };
 483
 484         at24@50 {
 485                 compatible = "at24,24c256";
 486                 pagesize = <64>;
 487                 reg = <0x50>;
 488         };
 489
 490         pixcir_ts@5c {
 491                 compatible = "pixcir,pixcir_tangoc";
 492                 pinctrl-names = "default";
 493                 pinctrl-0 = <&pixcir_ts_pins>;
 494                 reg = <0x5c>;
 495                 interrupt-parent = <&gpio1>;
 496                 interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
 497
 498                 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 499
 500                 touchscreen-size-x = <1024>;
 501                 touchscreen-size-y = <600>;
 502         };
 503
 504         tlv320aic3111: tlv320aic3111@18 {
 505                 #sound-dai-cells = <0>;
 506                 compatible = "ti,tlv320aic3111";
 507                 reg = <0x18>;
 508                 status = "okay";
 509
 510                 ai31xx-micbias-vg = <MICBIAS_2_0V>;
 511
 512                 /* Regulators */
 513                 HPVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
 514                 SPRVDD-supply = <&vbat>; /* vbat */
 515                 SPLVDD-supply = <&vbat>; /* vbat */
 516                 AVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
 517                 IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */
 518                 DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */
 519         };
 520 };
 521
 522 &i2c2 {
 523         pinctrl-names = "default";
 524         pinctrl-0 = <&i2c2_pins>;
 525         status = "okay";
 526 };
 527
 528 &gpio0 {
 529         status = "okay";
 530 };
 531
 532 &gpio1 {
 533         status = "okay";
 534 };
 535
 536 &gpio2 {
 537         pinctrl-names = "default";
 538         pinctrl-0 = <&display_mux_pins>;
 539         status = "okay";
 540
 541         p1 {
 542                 /*
 543                  * SelLCDorHDMI selects between display and audio paths:
 544                  * Low: HDMI display with audio via HDMI
 545                  * High: LCD display with analog audio via aic3111 codec
 546                  */
 547                 gpio-hog;
 548                 gpios = <1 GPIO_ACTIVE_HIGH>;
 549                 output-high;
 550                 line-name = "SelLCDorHDMI";
 551         };
 552 };
 553
 554 &gpio3 {
 555         status = "okay";
 556 };
 557
 558 &elm {
 559         status = "okay";
 560 };
 561
 562 &gpmc {
 563         status = "okay";        /* Disable QSPI when enabling GPMC (NAND) */
 564         pinctrl-names = "default";
 565         pinctrl-0 = <&nand_flash_x8>;
 566         ranges = <0 0 0x08000000 0x01000000>;   /* CS0 space. Min partition = 16MB */
 567         nand@0,0 {
 568                 compatible = "ti,omap2-nand";
 569                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 570                 interrupt-parent = <&gpmc>;
 571                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 572                              <1 IRQ_TYPE_NONE>; /* termcount */
 573                 ti,nand-ecc-opt = "bch16";
 574                 ti,elm-id = <&elm>;
 575                 nand-bus-width = <8>;
 576                 gpmc,device-width = <1>;
 577                 gpmc,sync-clk-ps = <0>;
 578                 gpmc,cs-on-ns = <0>;
 579                 gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
 580                 gpmc,cs-wr-off-ns = <40>;
 581                 gpmc,adv-on-ns = <0>;  /* cs-on-ns */
 582                 gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
 583                 gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
 584                 gpmc,we-on-ns = <0>;   /* cs-on-ns */
 585                 gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
 586                 gpmc,oe-on-ns = <3>;  /* cs-on-ns + tRR + 2 */
 587                 gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
 588                 gpmc,access-ns = <30>; /* tCEA + 4*/
 589                 gpmc,rd-cycle-ns = <40>;
 590                 gpmc,wr-cycle-ns = <40>;
 591                 gpmc,bus-turnaround-ns = <0>;
 592                 gpmc,cycle2cycle-delay-ns = <0>;
 593                 gpmc,clk-activation-ns = <0>;
 594                 gpmc,wr-access-ns = <40>;
 595                 gpmc,wr-data-mux-bus-ns = <0>;
 596                 /* MTD partition table */
 597                 /* All SPL-* partitions are sized to minimal length
 598                  * which can be independently programmable. For
 599                  * NAND flash this is equal to size of erase-block */
 600                 #address-cells = <1>;
 601                 #size-cells = <1>;
 602                 partition@0 {
 603                         label = "NAND.SPL";
 604                         reg = <0x00000000 0x00040000>;
 605                 };
 606                 partition@1 {
 607                         label = "NAND.SPL.backup1";
 608                         reg = <0x00040000 0x00040000>;
 609                 };
 610                 partition@2 {
 611                         label = "NAND.SPL.backup2";
 612                         reg = <0x00080000 0x00040000>;
 613                 };
 614                 partition@3 {
 615                         label = "NAND.SPL.backup3";
 616                         reg = <0x000C0000 0x00040000>;
 617                 };
 618                 partition@4 {
 619                         label = "NAND.u-boot-spl-os";
 620                         reg = <0x00100000 0x00080000>;
 621                 };
 622                 partition@5 {
 623                         label = "NAND.u-boot";
 624                         reg = <0x00180000 0x00100000>;
 625                 };
 626                 partition@6 {
 627                         label = "NAND.u-boot-env";
 628                         reg = <0x00280000 0x00040000>;
 629                 };
 630                 partition@7 {
 631                         label = "NAND.u-boot-env.backup1";
 632                         reg = <0x002C0000 0x00040000>;
 633                 };
 634                 partition@8 {
 635                         label = "NAND.kernel";
 636                         reg = <0x00300000 0x00700000>;
 637                 };
 638                 partition@9 {
 639                         label = "NAND.file-system";
 640                         reg = <0x00a00000 0x1f600000>;
 641                 };
 642         };
 643 };
 644
 645 &epwmss0 {
 646         status = "okay";
 647 };
 648
 649 &tscadc {
 650         status = "okay";
 651
 652         adc {
 653                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
 654         };
 655 };
 656
 657 &ecap0 {
 658                 status = "okay";
 659                 pinctrl-names = "default";
 660                 pinctrl-0 = <&ecap0_pins>;
 661 };
 662
 663 &spi0 {
 664         pinctrl-names = "default";
 665         pinctrl-0 = <&spi0_pins>;
 666         status = "okay";
 667 };
 668
 669 &spi1 {
 670         pinctrl-names = "default";
 671         pinctrl-0 = <&spi1_pins>;
 672         status = "okay";
 673 };
 674
 675 &usb2_phy1 {
 676         status = "okay";
 677 };
 678
 679 &usb1 {
 680         dr_mode = "peripheral";
 681         status = "okay";
 682 };
 683
 684 &usb2_phy2 {
 685         status = "okay";
 686 };
 687
 688 &usb2 {
 689         dr_mode = "host";
 690         status = "okay";
 691 };
 692
 693 &qspi {
 694         status = "disabled";    /* Disable GPMC (NAND) when enabling QSPI */
 695         pinctrl-names = "default";
 696         pinctrl-0 = <&qspi1_default>;
 697
 698         spi-max-frequency = <48000000>;
 699         m25p80@0 {
 700                 compatible = "mx66l51235l";
 701                 spi-max-frequency = <48000000>;
 702                 reg = <0>;
 703                 spi-cpol;
 704                 spi-cpha;
 705                 spi-tx-bus-width = <1>;
 706                 spi-rx-bus-width = <4>;
 707                 #address-cells = <1>;
 708                 #size-cells = <1>;
 709
 710                 /* MTD partition table.
 711                  * The ROM checks the first 512KiB
 712                  * for a valid file to boot(XIP).
 713                  */
 714                 partition@0 {
 715                         label = "QSPI.U_BOOT";
 716                         reg = <0x00000000 0x000080000>;
 717                 };
 718                 partition@1 {
 719                         label = "QSPI.U_BOOT.backup";
 720                         reg = <0x00080000 0x00080000>;
 721                 };
 722                 partition@2 {
 723                         label = "QSPI.U-BOOT-SPL_OS";
 724                         reg = <0x00100000 0x00010000>;
 725                 };
 726                 partition@3 {
 727                         label = "QSPI.U_BOOT_ENV";
 728                         reg = <0x00110000 0x00010000>;
 729                 };
 730                 partition@4 {
 731                         label = "QSPI.U-BOOT-ENV.backup";
 732                         reg = <0x00120000 0x00010000>;
 733                 };
 734                 partition@5 {
 735                         label = "QSPI.KERNEL";
 736                         reg = <0x00130000 0x0800000>;
 737                 };
 738                 partition@6 {
 739                         label = "QSPI.FILESYSTEM";
 740                         reg = <0x00930000 0x36D0000>;
 741                 };
 742         };
 743 };
 744
 745 &hdq {
 746         status = "okay";
 747         pinctrl-names = "default";
 748         pinctrl-0 = <&hdq_pins>;
 749 };
 750
 751 &dss {
 752         status = "okay";
 753
 754         pinctrl-names = "default";
 755         pinctrl-0 = <&dss_pins>;
 756
 757         port {
 758                 dpi_out: endpoint@0 {
 759                         remote-endpoint = <&lcd_in>;
 760                         data-lines = <24>;
 761                 };
 762         };
 763 };
 764
 765 &vpfe1 {
 766         status = "okay";
 767         pinctrl-names = "default", "sleep";
 768         pinctrl-0 = <&vpfe1_pins_default>;
 769         pinctrl-1 = <&vpfe1_pins_sleep>;
 770
 771         port {
 772                 vpfe1_ep: endpoint {
 773                         /* remote-endpoint = <&sensor>; add once we have it */
 774                         ti,am437x-vpfe-interface = <0>;
 775                         bus-width = <8>;
 776                         hsync-active = <0>;
 777                         vsync-active = <0>;
 778                 };
 779         };
 780 };
 781
 782 &mcasp1 {
 783         #sound-dai-cells = <0>;
 784         pinctrl-names = "default", "sleep";
 785         pinctrl-0 = <&mcasp1_pins>;
 786         pinctrl-1 = <&mcasp1_sleep_pins>;
 787
 788         status = "okay";
 789
 790         op-mode = <0>;          /* MCASP_IIS_MODE */
 791         tdm-slots = <2>;
 792         /* 4 serializer */
 793         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
 794                 1 2 0 0
 795         >;
 796         tx-num-evt = <32>;
 797         rx-num-evt = <32>;
 798 };
 799
 800 &synctimer_32kclk {
 801         assigned-clocks = <&mux_synctimer32k_ck>;
 802         assigned-clock-parents = <&clkdiv32k_ick>;
 803 };