arch/arm/dts/am3517-som.dtsi

   1 /*
   2  * Copyright (C) 2016 Derald D. Woods <woods.technical@gmail.com>
   3  *
   4  * Based on am3517-evm.dts
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 / {
  12         cpus {
  13                 cpu@0 {
  14                         cpu0-supply = <&vdd_core_reg>;
  15                 };
  16         };
  17
  18         wl12xx_buffer: wl12xx_buf {
  19                 compatible = "regulator-fixed";
  20                 regulator-name = "wl1271_buf";
  21                 regulator-min-microvolt = <1800000>;
  22                 regulator-max-microvolt = <1800000>;
  23                 pinctrl-names = "default";
  24                 pinctrl-0 = <&wl12xx_buffer_pins>;
  25                 gpio = <&gpio5 1 GPIO_ACTIVE_LOW>; /* gpio 129 */
  26                 regulator-always-on;
  27                 vin-supply = <&vdd_1v8_reg>;
  28         };
  29
  30         wl12xx_vmmc2: wl12xx_vmmc2 {
  31                 compatible = "regulator-fixed";
  32                 regulator-name = "vwl1271";
  33                 regulator-min-microvolt = <1800000>;
  34                 regulator-max-microvolt = <1800000>;
  35                 pinctrl-names = "default";
  36                 pinctrl-0 = <&wl12xx_wkup_pins>;
  37                 gpio = <&gpio1 3 GPIO_ACTIVE_HIGH >; /* gpio 3 */
  38                 startup-delay-us = <70000>;
  39                 enable-active-high;
  40                 regulator-always-on;
  41                 vin-supply = <&wl12xx_buffer>;
  42         };
  43 };
  44
  45 &gpmc {
  46         ranges = <0 0 0x30000000 0x1000000>;    /* CS0: 16MB for NAND */
  47
  48         nand@0,0 {
  49                 compatible = "ti,omap2-nand";
  50                 linux,mtd-name = "micron,mt29f4g16abchch";
  51                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  52                 nand-bus-width = <16>;
  53                 ti,nand-ecc-opt = "bch8";
  54                 gpmc,sync-clk-ps = <0>;
  55                 gpmc,cs-on-ns = <0>;
  56                 gpmc,cs-rd-off-ns = <44>;
  57                 gpmc,cs-wr-off-ns = <44>;
  58                 gpmc,adv-on-ns = <6>;
  59                 gpmc,adv-rd-off-ns = <34>;
  60                 gpmc,adv-wr-off-ns = <44>;
  61                 gpmc,we-off-ns = <40>;
  62                 gpmc,oe-off-ns = <54>;
  63                 gpmc,access-ns = <64>;
  64                 gpmc,rd-cycle-ns = <82>;
  65                 gpmc,wr-cycle-ns = <82>;
  66                 gpmc,wr-access-ns = <40>;
  67                 gpmc,wr-data-mux-bus-ns = <0>;
  68                 gpmc,device-width = <2>;
  69                 #address-cells = <1>;
  70                 #size-cells = <1>;
  71         };
  72 };
  73
  74 &i2c1 {
  75         clock-frequency = <400000>;
  76
  77         s35390a: s35390a@30 {
  78                 compatible = "sii,s35390a";
  79                 reg = <0x30>;
  80
  81                 pinctrl-names = "default";
  82                 pinctrl-0 = <&rtc_pins>;
  83                 interrupts-extended = <&gpio2 23 IRQ_TYPE_EDGE_FALLING>; /* gpio_55 */
  84         };
  85
  86         tps: tps65023@48 {
  87                 compatible = "ti,tps65023";
  88                 reg = <0x48>;
  89
  90                 regulators {
  91                         vdd_core_reg: VDCDC1 {
  92                                 regulator-name = "vdd_core";
  93                                 regulator-always-on;
  94                                 regulator-min-microvolt = <1200000>;
  95                                 regulator-max-microvolt = <1200000>;
  96                         };
  97
  98                         vdd_io_reg: VDCDC2 {
  99                                 regulator-name = "vdd_io";
 100                                 regulator-always-on;
 101                                 regulator-min-microvolt = <3300000>;
 102                                 regulator-max-microvolt = <3300000>;
 103                         };
 104
 105                         vdd_1v8_reg: VDCDC3 {
 106                                 regulator-name = "vdd_1v8";
 107                                 regulator-always-on;
 108                                 regulator-min-microvolt = <1800000>;
 109                                 regulator-max-microvolt = <1800000>;
 110                         };
 111
 112                         vdd_usb18_reg: LDO1 {
 113                                 regulator-name = "vdd_usb18";
 114                                 regulator-always-on;
 115                                 regulator-min-microvolt = <1800000>;
 116                                 regulator-max-microvolt = <1800000>;
 117                         };
 118
 119                         vdd_usb33_reg: LDO2 {
 120                                 regulator-name = "vdd_usb33";
 121                                 regulator-always-on;
 122                                 regulator-min-microvolt = <3300000>;
 123                                 regulator-max-microvolt = <3300000>;
 124                         };
 125                 };
 126         };
 127
 128         touchscreen: tsc2004@4b {
 129                 compatible = "ti,tsc2004";
 130                 reg = <0x4b>;
 131
 132                 vio-supply = <&vdd_io_reg>;
 133
 134                 pinctrl-names = "default";
 135                 pinctrl-0 = <&tsc2004_pins>;
 136                 interrupts-extended = <&gpio3 1 IRQ_TYPE_EDGE_RISING>; /* gpio_65 */
 137
 138                 touchscreen-fuzz-x = <4>;
 139                 touchscreen-fuzz-y = <7>;
 140                 touchscreen-fuzz-pressure = <2>;
 141                 touchscreen-size-x = <480>;
 142                 touchscreen-size-y = <272>;
 143                 touchscreen-max-pressure = <2048>;
 144
 145                 ti,x-plate-ohms = <280>;
 146                 ti,esd-recovery-timeout-ms = <8000>;
 147         };
 148 };
 149
 150 &mmc2 {
 151         interrupts-extended = <&intc 86 /* &omap3_pmx_core 0x12c */>;
 152
 153         status = "okay";
 154         pinctrl-names = "default";
 155         pinctrl-0 = <&mmc2_pins>;
 156         vmmc-supply = <&wl12xx_vmmc2>;
 157         non-removable;
 158         bus-width = <4>;
 159         cap-power-off-card;
 160         #address-cells = <1>;
 161         #size-cells = <0>;
 162         wlcore: wlcore@2 {
 163                 compatible = "ti,wl1271";
 164                 reg = <2>;
 165                 interrupt-parent = <&gpio6>;
 166                 interrupts = <10 IRQ_TYPE_EDGE_RISING>; /* gpio_170 */
 167                 ref-clock-frequency = <26000000>;
 168                 tcxo-clock-frequency = <26000000>;
 169         };
 170 };
 171
 172 &uart2 {
 173         pinctrl-names = "default";
 174         pinctrl-0 = <&uart2_pins>;
 175
 176         bluetooth {
 177                 compatible = "ti,wl1271-st";
 178                 enable-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; /* gpio 56 */
 179                 max-speed = <3000000>;
 180         };
 181 };
 182
 183 &omap3_pmx_core {
 184
 185         wl12xx_buffer_pins: pinmux_wl12xx_buffer_pins {
 186                 pinctrl-single,pins = <
 187                         OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4)  /* mmc1_dat7.gpio_129 */
 188                 >;
 189         };
 190
 191         mmc2_pins: pinmux_mmc2_pins {
 192                 pinctrl-single,pins = <
 193                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_clk.mmc2_clk */
 194                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_cmd.mmc2_cmd */
 195                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat0.mmc2_dat0 */
 196                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat1.mmc2_dat1 */
 197                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat2.mmc2_dat2 */
 198                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat3.mmc2_dat3 */
 199                         OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat4.mmc2_dir_dat0 */
 200                         OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat5.mmc2_dir_dat1 */
 201                         OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat6.mmc2_dir_cmd */
 202                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* mmc2_dat7.mmc2_clkin */
 203                         OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE4) /* hdq_sio.gpio_170 */
 204                 >;
 205         };
 206
 207         rtc_pins: pinmux_rtc_pins {
 208                 pinctrl-single,pins = <
 209                         OMAP3_CORE1_IOPAD(0x20b6, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs4.gpio_55 */
 210                 >;
 211         };
 212
 213         tsc2004_pins: pinmux_tsc2004_pins {
 214                 pinctrl-single,pins = <
 215                         OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT | MUX_MODE4) /* gpmc_wait3.gpio_65 */
 216                 >;
 217         };
 218
 219         uart2_pins: pinmux_uart2_pins {
 220                 pinctrl-single,pins = <
 221                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)         /* uart2_cts */
 222                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* uart2_rts */
 223                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
 224                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
 225                         OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT | MUX_MODE0)                /* gpio_56 */
 226                 >;
 227         };
 228 };
 229
 230 &omap3_pmx_wkup {
 231
 232         wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
 233                 pinctrl-single,pins = <
 234                         OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)        /* sys_boot1.gpio_3 */
 235                 >;
 236         };
 237 };