2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
13 #include <dt-bindings/clock/am3.h>
16 compatible = "ti,am33xx";
17 interrupt-parent = <&intc>;
38 ethernet0 = &cpsw_emac0;
39 ethernet1 = &cpsw_emac1;
48 compatible = "arm,cortex-a8";
52 operating-points-v2 = <&cpu0_opp_table>;
54 clocks = <&dpll_mpu_ck>;
57 clock-latency = <300000>; /* From omap-cpufreq driver */
61 cpu0_opp_table: opp-table {
62 compatible = "operating-points-v2-ti-cpu";
66 * The three following nodes are marked with opp-suspend
67 * because the can not be enabled simultaneously on a
71 opp-hz = /bits/ 64 <300000000>;
72 opp-microvolt = <950000 931000 969000>;
73 opp-supported-hw = <0x06 0x0010>;
78 opp-hz = /bits/ 64 <275000000>;
79 opp-microvolt = <1100000 1078000 1122000>;
80 opp-supported-hw = <0x01 0x00FF>;
85 opp-hz = /bits/ 64 <300000000>;
86 opp-microvolt = <1100000 1078000 1122000>;
87 opp-supported-hw = <0x06 0x0020>;
92 opp-hz = /bits/ 64 <500000000>;
93 opp-microvolt = <1100000 1078000 1122000>;
94 opp-supported-hw = <0x01 0xFFFF>;
98 opp-hz = /bits/ 64 <600000000>;
99 opp-microvolt = <1100000 1078000 1122000>;
100 opp-supported-hw = <0x06 0x0040>;
104 opp-hz = /bits/ 64 <600000000>;
105 opp-microvolt = <1200000 1176000 1224000>;
106 opp-supported-hw = <0x01 0xFFFF>;
110 opp-hz = /bits/ 64 <720000000>;
111 opp-microvolt = <1200000 1176000 1224000>;
112 opp-supported-hw = <0x06 0x0080>;
116 opp-hz = /bits/ 64 <720000000>;
117 opp-microvolt = <1260000 1234800 1285200>;
118 opp-supported-hw = <0x01 0xFFFF>;
122 opp-hz = /bits/ 64 <800000000>;
123 opp-microvolt = <1260000 1234800 1285200>;
124 opp-supported-hw = <0x06 0x0100>;
127 oppnitro-1000000000 {
128 opp-hz = /bits/ 64 <1000000000>;
129 opp-microvolt = <1325000 1298500 1351500>;
130 opp-supported-hw = <0x04 0x0200>;
135 compatible = "arm,cortex-a8-pmu";
137 reg = <0x4b000000 0x1000000>;
138 ti,hwmods = "debugss";
142 * The soc node represents the soc top level view. It is used for IPs
143 * that are not memory mapped in the MPU view or for the MPU itself.
146 compatible = "ti,omap-infra";
148 compatible = "ti,omap3-mpu";
150 pm-sram = <&pm_sram_code
156 * XXX: Use a flat representation of the AM33XX interconnect.
157 * The real AM33XX interconnect network is quite complex. Since
158 * it will not bring real advantage to represent that in DT
159 * for the moment, just use a fake OCP bus entry to represent
160 * the whole bus hierarchy.
163 compatible = "simple-bus";
164 #address-cells = <1>;
167 ti,hwmods = "l3_main";
169 l4_wkup: l4_wkup@44c00000 {
170 compatible = "ti,am3-l4-wkup", "simple-bus";
171 #address-cells = <1>;
173 ranges = <0 0x44c00000 0x280000>;
175 wkup_m3: wkup_m3@100000 {
176 compatible = "ti,am3352-wkup-m3";
177 reg = <0x100000 0x4000>,
179 reg-names = "umem", "dmem";
180 ti,hwmods = "wkup_m3";
181 ti,pm-firmware = "am335x-pm-firmware.elf";
185 compatible = "ti,am3-prcm", "simple-bus";
186 reg = <0x200000 0x4000>;
187 #address-cells = <1>;
189 ranges = <0 0x200000 0x4000>;
191 prcm_clocks: clocks {
192 #address-cells = <1>;
196 prcm_clockdomains: clockdomains {
201 compatible = "ti,am3-scm", "simple-bus";
202 reg = <0x210000 0x2000>;
203 #address-cells = <1>;
205 #pinctrl-cells = <1>;
206 ranges = <0 0x210000 0x2000>;
208 am33xx_pinmux: pinmux@800 {
209 compatible = "pinctrl-single";
211 #address-cells = <1>;
213 #pinctrl-cells = <1>;
214 pinctrl-single,register-width = <32>;
215 pinctrl-single,function-mask = <0x7f>;
218 scm_conf: scm_conf@0 {
219 compatible = "syscon", "simple-bus";
221 #address-cells = <1>;
223 ranges = <0 0 0x800>;
226 #address-cells = <1>;
231 wkup_m3_ipc: wkup_m3_ipc@1324 {
232 compatible = "ti,am3352-wkup-m3-ipc";
235 ti,rproc = <&wkup_m3>;
236 mboxes = <&mailbox &mbox_wkupm3>;
239 edma_xbar: dma-router@f90 {
240 compatible = "ti,am335x-edma-crossbar";
244 dma-masters = <&edma>;
247 scm_clockdomains: clockdomains {
252 intc: interrupt-controller@48200000 {
253 compatible = "ti,am33xx-intc";
254 interrupt-controller;
255 #interrupt-cells = <1>;
256 reg = <0x48200000 0x1000>;
259 edma: edma@49000000 {
260 compatible = "ti,edma3-tpcc";
262 reg = <0x49000000 0x10000>;
263 reg-names = "edma3_cc";
264 interrupts = <12 13 14>;
265 interrupt-names = "edma3_ccint", "edma3_mperr",
270 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
273 ti,edma-memcpy-channels = <20 21>;
276 edma_tptc0: tptc@49800000 {
277 compatible = "ti,edma3-tptc";
279 reg = <0x49800000 0x100000>;
281 interrupt-names = "edma3_tcerrint";
284 edma_tptc1: tptc@49900000 {
285 compatible = "ti,edma3-tptc";
287 reg = <0x49900000 0x100000>;
289 interrupt-names = "edma3_tcerrint";
292 edma_tptc2: tptc@49a00000 {
293 compatible = "ti,edma3-tptc";
295 reg = <0x49a00000 0x100000>;
297 interrupt-names = "edma3_tcerrint";
300 gpio0: gpio@44e07000 {
301 compatible = "ti,omap4-gpio";
305 interrupt-controller;
306 #interrupt-cells = <2>;
307 reg = <0x44e07000 0x1000>;
311 gpio1: gpio@4804c000 {
312 compatible = "ti,omap4-gpio";
316 interrupt-controller;
317 #interrupt-cells = <2>;
318 reg = <0x4804c000 0x1000>;
322 gpio2: gpio@481ac000 {
323 compatible = "ti,omap4-gpio";
327 interrupt-controller;
328 #interrupt-cells = <2>;
329 reg = <0x481ac000 0x1000>;
333 gpio3: gpio@481ae000 {
334 compatible = "ti,omap4-gpio";
338 interrupt-controller;
339 #interrupt-cells = <2>;
340 reg = <0x481ae000 0x1000>;
344 uart0: serial@44e09000 {
345 compatible = "ti,am3352-uart", "ti,omap3-uart";
347 clock-frequency = <48000000>;
348 reg = <0x44e09000 0x2000>;
351 dmas = <&edma 26 0>, <&edma 27 0>;
352 dma-names = "tx", "rx";
355 uart1: serial@48022000 {
356 compatible = "ti,am3352-uart", "ti,omap3-uart";
358 clock-frequency = <48000000>;
359 reg = <0x48022000 0x2000>;
362 dmas = <&edma 28 0>, <&edma 29 0>;
363 dma-names = "tx", "rx";
366 uart2: serial@48024000 {
367 compatible = "ti,am3352-uart", "ti,omap3-uart";
369 clock-frequency = <48000000>;
370 reg = <0x48024000 0x2000>;
373 dmas = <&edma 30 0>, <&edma 31 0>;
374 dma-names = "tx", "rx";
377 uart3: serial@481a6000 {
378 compatible = "ti,am3352-uart", "ti,omap3-uart";
380 clock-frequency = <48000000>;
381 reg = <0x481a6000 0x2000>;
386 uart4: serial@481a8000 {
387 compatible = "ti,am3352-uart", "ti,omap3-uart";
389 clock-frequency = <48000000>;
390 reg = <0x481a8000 0x2000>;
395 uart5: serial@481aa000 {
396 compatible = "ti,am3352-uart", "ti,omap3-uart";
398 clock-frequency = <48000000>;
399 reg = <0x481aa000 0x2000>;
405 compatible = "ti,omap4-i2c";
406 #address-cells = <1>;
409 reg = <0x44e0b000 0x1000>;
415 compatible = "ti,omap4-i2c";
416 #address-cells = <1>;
419 reg = <0x4802a000 0x1000>;
425 compatible = "ti,omap4-i2c";
426 #address-cells = <1>;
429 reg = <0x4819c000 0x1000>;
435 compatible = "ti,omap4-hsmmc";
438 ti,needs-special-reset;
439 ti,needs-special-hs-handling;
440 dmas = <&edma_xbar 24 0 0
442 dma-names = "tx", "rx";
444 reg = <0x48060000 0x1000>;
449 compatible = "ti,omap4-hsmmc";
451 ti,needs-special-reset;
454 dma-names = "tx", "rx";
456 reg = <0x481d8000 0x1000>;
461 compatible = "ti,omap4-hsmmc";
463 ti,needs-special-reset;
465 reg = <0x47810000 0x1000>;
469 hwspinlock: spinlock@480ca000 {
470 compatible = "ti,omap4-hwspinlock";
471 reg = <0x480ca000 0x1000>;
472 ti,hwmods = "spinlock";
477 compatible = "ti,omap3-wdt";
478 ti,hwmods = "wd_timer2";
479 reg = <0x44e35000 0x1000>;
483 dcan0: can@481cc000 {
484 compatible = "ti,am3352-d_can";
485 ti,hwmods = "d_can0";
486 reg = <0x481cc000 0x2000>;
487 clocks = <&dcan0_fck>;
489 syscon-raminit = <&scm_conf 0x644 0>;
494 dcan1: can@481d0000 {
495 compatible = "ti,am3352-d_can";
496 ti,hwmods = "d_can1";
497 reg = <0x481d0000 0x2000>;
498 clocks = <&dcan1_fck>;
500 syscon-raminit = <&scm_conf 0x644 1>;
505 mailbox: mailbox@480c8000 {
506 compatible = "ti,omap4-mailbox";
507 reg = <0x480C8000 0x200>;
509 ti,hwmods = "mailbox";
511 ti,mbox-num-users = <4>;
512 ti,mbox-num-fifos = <8>;
513 mbox_wkupm3: wkup_m3 {
515 ti,mbox-tx = <0 0 0>;
516 ti,mbox-rx = <0 0 3>;
520 timer1: timer@44e31000 {
521 compatible = "ti,am335x-timer-1ms";
522 reg = <0x44e31000 0x400>;
524 ti,hwmods = "timer1";
526 clocks = <&timer1_fck>;
530 timer2: timer@48040000 {
531 compatible = "ti,am335x-timer";
532 reg = <0x48040000 0x400>;
534 ti,hwmods = "timer2";
535 clocks = <&timer2_fck>;
539 timer3: timer@48042000 {
540 compatible = "ti,am335x-timer";
541 reg = <0x48042000 0x400>;
543 ti,hwmods = "timer3";
546 timer4: timer@48044000 {
547 compatible = "ti,am335x-timer";
548 reg = <0x48044000 0x400>;
550 ti,hwmods = "timer4";
554 timer5: timer@48046000 {
555 compatible = "ti,am335x-timer";
556 reg = <0x48046000 0x400>;
558 ti,hwmods = "timer5";
562 timer6: timer@48048000 {
563 compatible = "ti,am335x-timer";
564 reg = <0x48048000 0x400>;
566 ti,hwmods = "timer6";
570 timer7: timer@4804a000 {
571 compatible = "ti,am335x-timer";
572 reg = <0x4804a000 0x400>;
574 ti,hwmods = "timer7";
579 compatible = "ti,am3352-rtc", "ti,da830-rtc";
580 reg = <0x44e3e000 0x1000>;
584 clocks = <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
585 clock-names = "int-clk";
589 compatible = "ti,omap4-mcspi";
590 #address-cells = <1>;
592 reg = <0x48030000 0x400>;
600 dma-names = "tx0", "rx0", "tx1", "rx1";
605 compatible = "ti,omap4-mcspi";
606 #address-cells = <1>;
608 reg = <0x481a0000 0x400>;
616 dma-names = "tx0", "rx0", "tx1", "rx1";
621 compatible = "ti,am33xx-usb";
622 reg = <0x47400000 0x1000>;
624 #address-cells = <1>;
626 ti,hwmods = "usb_otg_hs";
629 usb_ctrl_mod: control@44e10620 {
630 compatible = "ti,am335x-usb-ctrl-module";
631 reg = <0x44e10620 0x10
633 reg-names = "phy_ctrl", "wakeup";
637 usb0_phy: usb-phy@47401300 {
638 compatible = "ti,am335x-usb-phy";
639 reg = <0x47401300 0x100>;
642 ti,ctrl_mod = <&usb_ctrl_mod>;
647 compatible = "ti,musb-am33xx";
649 reg = <0x47401400 0x400
651 reg-names = "mc", "control";
654 interrupt-names = "mc";
656 mentor,multipoint = <1>;
657 mentor,num-eps = <16>;
658 mentor,ram-bits = <12>;
659 mentor,power = <500>;
662 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
663 &cppi41dma 2 0 &cppi41dma 3 0
664 &cppi41dma 4 0 &cppi41dma 5 0
665 &cppi41dma 6 0 &cppi41dma 7 0
666 &cppi41dma 8 0 &cppi41dma 9 0
667 &cppi41dma 10 0 &cppi41dma 11 0
668 &cppi41dma 12 0 &cppi41dma 13 0
669 &cppi41dma 14 0 &cppi41dma 0 1
670 &cppi41dma 1 1 &cppi41dma 2 1
671 &cppi41dma 3 1 &cppi41dma 4 1
672 &cppi41dma 5 1 &cppi41dma 6 1
673 &cppi41dma 7 1 &cppi41dma 8 1
674 &cppi41dma 9 1 &cppi41dma 10 1
675 &cppi41dma 11 1 &cppi41dma 12 1
676 &cppi41dma 13 1 &cppi41dma 14 1>;
678 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
679 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
681 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
682 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
686 usb1_phy: usb-phy@47401b00 {
687 compatible = "ti,am335x-usb-phy";
688 reg = <0x47401b00 0x100>;
691 ti,ctrl_mod = <&usb_ctrl_mod>;
696 compatible = "ti,musb-am33xx";
698 reg = <0x47401c00 0x400
700 reg-names = "mc", "control";
702 interrupt-names = "mc";
704 mentor,multipoint = <1>;
705 mentor,num-eps = <16>;
706 mentor,ram-bits = <12>;
707 mentor,power = <500>;
710 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
711 &cppi41dma 17 0 &cppi41dma 18 0
712 &cppi41dma 19 0 &cppi41dma 20 0
713 &cppi41dma 21 0 &cppi41dma 22 0
714 &cppi41dma 23 0 &cppi41dma 24 0
715 &cppi41dma 25 0 &cppi41dma 26 0
716 &cppi41dma 27 0 &cppi41dma 28 0
717 &cppi41dma 29 0 &cppi41dma 15 1
718 &cppi41dma 16 1 &cppi41dma 17 1
719 &cppi41dma 18 1 &cppi41dma 19 1
720 &cppi41dma 20 1 &cppi41dma 21 1
721 &cppi41dma 22 1 &cppi41dma 23 1
722 &cppi41dma 24 1 &cppi41dma 25 1
723 &cppi41dma 26 1 &cppi41dma 27 1
724 &cppi41dma 28 1 &cppi41dma 29 1>;
726 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
727 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
729 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
730 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
734 cppi41dma: dma-controller@47402000 {
735 compatible = "ti,am3359-cppi41";
736 reg = <0x47400000 0x1000
740 reg-names = "glue", "controller", "scheduler", "queuemgr";
742 interrupt-names = "glue";
744 #dma-channels = <30>;
745 #dma-requests = <256>;
750 epwmss0: epwmss@48300000 {
751 compatible = "ti,am33xx-pwmss";
752 reg = <0x48300000 0x10>;
753 ti,hwmods = "epwmss0";
754 #address-cells = <1>;
757 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
758 0x48300180 0x48300180 0x80 /* EQEP */
759 0x48300200 0x48300200 0x80>; /* EHRPWM */
761 ecap0: ecap@48300100 {
762 compatible = "ti,am3352-ecap",
765 reg = <0x48300100 0x80>;
766 clocks = <&l4ls_gclk>;
769 interrupt-names = "ecap0";
773 ehrpwm0: pwm@48300200 {
774 compatible = "ti,am3352-ehrpwm",
777 reg = <0x48300200 0x80>;
778 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
779 clock-names = "tbclk", "fck";
784 epwmss1: epwmss@48302000 {
785 compatible = "ti,am33xx-pwmss";
786 reg = <0x48302000 0x10>;
787 ti,hwmods = "epwmss1";
788 #address-cells = <1>;
791 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
792 0x48302180 0x48302180 0x80 /* EQEP */
793 0x48302200 0x48302200 0x80>; /* EHRPWM */
795 ecap1: ecap@48302100 {
796 compatible = "ti,am3352-ecap",
799 reg = <0x48302100 0x80>;
800 clocks = <&l4ls_gclk>;
803 interrupt-names = "ecap1";
807 ehrpwm1: pwm@48302200 {
808 compatible = "ti,am3352-ehrpwm",
811 reg = <0x48302200 0x80>;
812 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
813 clock-names = "tbclk", "fck";
818 epwmss2: epwmss@48304000 {
819 compatible = "ti,am33xx-pwmss";
820 reg = <0x48304000 0x10>;
821 ti,hwmods = "epwmss2";
822 #address-cells = <1>;
825 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
826 0x48304180 0x48304180 0x80 /* EQEP */
827 0x48304200 0x48304200 0x80>; /* EHRPWM */
829 ecap2: ecap@48304100 {
830 compatible = "ti,am3352-ecap",
833 reg = <0x48304100 0x80>;
834 clocks = <&l4ls_gclk>;
837 interrupt-names = "ecap2";
841 ehrpwm2: pwm@48304200 {
842 compatible = "ti,am3352-ehrpwm",
845 reg = <0x48304200 0x80>;
846 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
847 clock-names = "tbclk", "fck";
852 mac: ethernet@4a100000 {
853 compatible = "ti,am335x-cpsw","ti,cpsw";
854 ti,hwmods = "cpgmac0";
855 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
856 clock-names = "fck", "cpts";
857 cpdma_channels = <8>;
858 ale_entries = <1024>;
859 bd_ram_size = <0x2000>;
860 mac_control = <0x20>;
863 cpts_clock_mult = <0x80000000>;
864 cpts_clock_shift = <29>;
865 reg = <0x4a100000 0x800
867 #address-cells = <1>;
875 interrupts = <40 41 42 43>;
877 syscon = <&scm_conf>;
880 davinci_mdio: mdio@4a101000 {
881 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
882 #address-cells = <1>;
884 ti,hwmods = "davinci_mdio";
885 bus_freq = <1000000>;
886 reg = <0x4a101000 0x100>;
890 cpsw_emac0: slave@4a100200 {
891 /* Filled in by U-Boot */
892 mac-address = [ 00 00 00 00 00 00 ];
895 cpsw_emac1: slave@4a100300 {
896 /* Filled in by U-Boot */
897 mac-address = [ 00 00 00 00 00 00 ];
900 phy_sel: cpsw-phy-sel@44e10650 {
901 compatible = "ti,am3352-cpsw-phy-sel";
902 reg= <0x44e10650 0x4>;
903 reg-names = "gmii-sel";
907 ocmcram: ocmcram@40300000 {
908 compatible = "mmio-sram";
909 reg = <0x40300000 0x10000>; /* 64k */
910 ranges = <0x0 0x40300000 0x10000>;
911 #address-cells = <1>;
914 pm_sram_code: pm-sram-code@0 {
915 compatible = "ti,sram";
920 pm_sram_data: pm-sram-data@1000 {
921 compatible = "ti,sram";
922 reg = <0x1000 0x1000>;
928 compatible = "ti,am3352-elm";
929 reg = <0x48080000 0x2000>;
935 lcdc: lcdc@4830e000 {
936 compatible = "ti,am33xx-tilcdc";
937 reg = <0x4830e000 0x1000>;
943 tscadc: tscadc@44e0d000 {
944 compatible = "ti,am3359-tscadc";
945 reg = <0x44e0d000 0x1000>;
947 ti,hwmods = "adc_tsc";
949 dmas = <&edma 53 0>, <&edma 57 0>;
950 dma-names = "fifo0", "fifo1";
953 compatible = "ti,am3359-tsc";
956 #io-channel-cells = <1>;
957 compatible = "ti,am3359-adc";
961 emif: emif@4c000000 {
962 compatible = "ti,emif-am3352";
963 reg = <0x4c000000 0x1000000>;
966 sram = <&pm_sram_code
971 gpmc: gpmc@50000000 {
972 compatible = "ti,am3352-gpmc";
975 reg = <0x50000000 0x2000>;
980 gpmc,num-waitpins = <2>;
981 #address-cells = <2>;
983 interrupt-controller;
984 #interrupt-cells = <2>;
990 sham: sham@53100000 {
991 compatible = "ti,omap4-sham";
993 reg = <0x53100000 0x200>;
1000 compatible = "ti,omap4-aes";
1002 reg = <0x53500000 0xa0>;
1006 dma-names = "tx", "rx";
1009 mcasp0: mcasp@48038000 {
1010 compatible = "ti,am33xx-mcasp-audio";
1011 ti,hwmods = "mcasp0";
1012 reg = <0x48038000 0x2000>,
1013 <0x46000000 0x400000>;
1014 reg-names = "mpu", "dat";
1015 interrupts = <80>, <81>;
1016 interrupt-names = "tx", "rx";
1017 status = "disabled";
1020 dma-names = "tx", "rx";
1023 mcasp1: mcasp@4803c000 {
1024 compatible = "ti,am33xx-mcasp-audio";
1025 ti,hwmods = "mcasp1";
1026 reg = <0x4803C000 0x2000>,
1027 <0x46400000 0x400000>;
1028 reg-names = "mpu", "dat";
1029 interrupts = <82>, <83>;
1030 interrupt-names = "tx", "rx";
1031 status = "disabled";
1032 dmas = <&edma 10 2>,
1034 dma-names = "tx", "rx";
1038 compatible = "ti,omap4-rng";
1040 reg = <0x48310000 0x2000>;
1046 #include "am33xx-clocks.dtsi"