arch/arm/dts/am33xx.dtsi

   1 /*
   2  * Device Tree Source for AM33XX SoC
   3  *
   4  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/bus/ti-sysc.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/pinctrl/am33xx.h>
  14 #include <dt-bindings/clock/am3.h>
  15
  16 / {
  17         compatible = "ti,am33xx";
  18         interrupt-parent = <&intc>;
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         chosen { };
  22
  23         aliases {
  24                 i2c0 = &i2c0;
  25                 i2c1 = &i2c1;
  26                 i2c2 = &i2c2;
  27                 serial0 = &uart0;
  28                 serial1 = &uart1;
  29                 serial2 = &uart2;
  30                 serial3 = &uart3;
  31                 serial4 = &uart4;
  32                 serial5 = &uart5;
  33                 d-can0 = &dcan0;
  34                 d-can1 = &dcan1;
  35                 usb0 = &usb0;
  36                 usb1 = &usb1;
  37                 phy0 = &usb0_phy;
  38                 phy1 = &usb1_phy;
  39                 ethernet0 = &cpsw_emac0;
  40                 ethernet1 = &cpsw_emac1;
  41                 spi0 = &spi0;
  42                 spi1 = &spi1;
  43         };
  44
  45         cpus {
  46                 #address-cells = <1>;
  47                 #size-cells = <0>;
  48                 cpu@0 {
  49                         compatible = "arm,cortex-a8";
  50                         enable-method = "ti,am3352";
  51                         device_type = "cpu";
  52                         reg = <0>;
  53
  54                         operating-points-v2 = <&cpu0_opp_table>;
  55
  56                         clocks = <&dpll_mpu_ck>;
  57                         clock-names = "cpu";
  58
  59                         clock-latency = <300000>; /* From omap-cpufreq driver */
  60                         cpu-idle-states = <&mpu_gate>;
  61                 };
  62
  63                 idle-states {
  64                         mpu_gate: mpu_gate {
  65                                 compatible = "arm,idle-state";
  66                                 entry-latency-us = <40>;
  67                                 exit-latency-us = <90>;
  68                                 min-residency-us = <300>;
  69                                 ti,idle-wkup-m3;
  70                         };
  71                 };
  72         };
  73
  74         cpu0_opp_table: opp-table {
  75                 compatible = "operating-points-v2-ti-cpu";
  76                 syscon = <&scm_conf>;
  77
  78                 /*
  79                  * The three following nodes are marked with opp-suspend
  80                  * because the can not be enabled simultaneously on a
  81                  * single SoC.
  82                  */
  83                 opp50-300000000 {
  84                         opp-hz = /bits/ 64 <300000000>;
  85                         opp-microvolt = <950000 931000 969000>;
  86                         opp-supported-hw = <0x06 0x0010>;
  87                         opp-suspend;
  88                 };
  89
  90                 opp100-275000000 {
  91                         opp-hz = /bits/ 64 <275000000>;
  92                         opp-microvolt = <1100000 1078000 1122000>;
  93                         opp-supported-hw = <0x01 0x00FF>;
  94                         opp-suspend;
  95                 };
  96
  97                 opp100-300000000 {
  98                         opp-hz = /bits/ 64 <300000000>;
  99                         opp-microvolt = <1100000 1078000 1122000>;
 100                         opp-supported-hw = <0x06 0x0020>;
 101                         opp-suspend;
 102                 };
 103
 104                 opp100-500000000 {
 105                         opp-hz = /bits/ 64 <500000000>;
 106                         opp-microvolt = <1100000 1078000 1122000>;
 107                         opp-supported-hw = <0x01 0xFFFF>;
 108                 };
 109
 110                 opp100-600000000 {
 111                         opp-hz = /bits/ 64 <600000000>;
 112                         opp-microvolt = <1100000 1078000 1122000>;
 113                         opp-supported-hw = <0x06 0x0040>;
 114                 };
 115
 116                 opp120-600000000 {
 117                         opp-hz = /bits/ 64 <600000000>;
 118                         opp-microvolt = <1200000 1176000 1224000>;
 119                         opp-supported-hw = <0x01 0xFFFF>;
 120                 };
 121
 122                 opp120-720000000 {
 123                         opp-hz = /bits/ 64 <720000000>;
 124                         opp-microvolt = <1200000 1176000 1224000>;
 125                         opp-supported-hw = <0x06 0x0080>;
 126                 };
 127
 128                 oppturbo-720000000 {
 129                         opp-hz = /bits/ 64 <720000000>;
 130                         opp-microvolt = <1260000 1234800 1285200>;
 131                         opp-supported-hw = <0x01 0xFFFF>;
 132                 };
 133
 134                 oppturbo-800000000 {
 135                         opp-hz = /bits/ 64 <800000000>;
 136                         opp-microvolt = <1260000 1234800 1285200>;
 137                         opp-supported-hw = <0x06 0x0100>;
 138                 };
 139
 140                 oppnitro-1000000000 {
 141                         opp-hz = /bits/ 64 <1000000000>;
 142                         opp-microvolt = <1325000 1298500 1351500>;
 143                         opp-supported-hw = <0x04 0x0200>;
 144                 };
 145         };
 146
 147         pmu@4b000000 {
 148                 compatible = "arm,cortex-a8-pmu";
 149                 interrupts = <3>;
 150                 reg = <0x4b000000 0x1000000>;
 151                 ti,hwmods = "debugss";
 152         };
 153
 154         /*
 155          * The soc node represents the soc top level view. It is used for IPs
 156          * that are not memory mapped in the MPU view or for the MPU itself.
 157          */
 158         soc {
 159                 compatible = "ti,omap-infra";
 160                 mpu {
 161                         compatible = "ti,omap3-mpu";
 162                         ti,hwmods = "mpu";
 163                         pm-sram = <&pm_sram_code
 164                                    &pm_sram_data>;
 165                 };
 166         };
 167
 168         /*
 169          * XXX: Use a flat representation of the AM33XX interconnect.
 170          * The real AM33XX interconnect network is quite complex. Since
 171          * it will not bring real advantage to represent that in DT
 172          * for the moment, just use a fake OCP bus entry to represent
 173          * the whole bus hierarchy.
 174          */
 175         ocp {
 176                 compatible = "simple-bus";
 177                 #address-cells = <1>;
 178                 #size-cells = <1>;
 179                 ranges;
 180                 ti,hwmods = "l3_main";
 181
 182                 l4_wkup: l4_wkup@44c00000 {
 183                         wkup_m3: wkup_m3@100000 {
 184                                 compatible = "ti,am3352-wkup-m3";
 185                                 reg = <0x100000 0x4000>,
 186                                       <0x180000 0x2000>;
 187                                 reg-names = "umem", "dmem";
 188                                 ti,hwmods = "wkup_m3";
 189                                 ti,pm-firmware = "am335x-pm-firmware.elf";
 190                         };
 191                 };
 192                 l4_per: interconnect@48000000 {
 193                 };
 194                 l4_fw: interconnect@47c00000 {
 195                 };
 196                 l4_fast: interconnect@4a000000 {
 197                 };
 198                 l4_mpuss: interconnect@4b140000 {
 199                 };
 200
 201                 intc: interrupt-controller@48200000 {
 202                         compatible = "ti,am33xx-intc";
 203                         interrupt-controller;
 204                         #interrupt-cells = <1>;
 205                         reg = <0x48200000 0x1000>;
 206                 };
 207
 208                 target-module@49000000 {
 209                         compatible = "ti,sysc-omap4", "ti,sysc";
 210                         reg = <0x49000000 0x4>;
 211                         reg-names = "rev";
 212                         clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
 213                         clock-names = "fck";
 214                         #address-cells = <1>;
 215                         #size-cells = <1>;
 216                         ranges = <0x0 0x49000000 0x10000>;
 217
 218                         edma: dma@0 {
 219                                 compatible = "ti,edma3-tpcc";
 220                                 reg = <0 0x10000>;
 221                                 reg-names = "edma3_cc";
 222                                 interrupts = <12 13 14>;
 223                                 interrupt-names = "edma3_ccint", "edma3_mperr",
 224                                                   "edma3_ccerrint";
 225                                 dma-requests = <64>;
 226                                 #dma-cells = <2>;
 227
 228                                 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
 229                                            <&edma_tptc2 0>;
 230
 231                                 ti,edma-memcpy-channels = <20 21>;
 232                         };
 233                 };
 234
 235                 target-module@49800000 {
 236                         compatible = "ti,sysc-omap4", "ti,sysc";
 237                         reg = <0x49800000 0x4>,
 238                               <0x49800010 0x4>;
 239                         reg-names = "rev", "sysc";
 240                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 241                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 242                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 243                                         <SYSC_IDLE_SMART>;
 244                         clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
 245                         clock-names = "fck";
 246                         #address-cells = <1>;
 247                         #size-cells = <1>;
 248                         ranges = <0x0 0x49800000 0x100000>;
 249
 250                         edma_tptc0: dma@0 {
 251                                 compatible = "ti,edma3-tptc";
 252                                 reg = <0 0x100000>;
 253                                 interrupts = <112>;
 254                                 interrupt-names = "edma3_tcerrint";
 255                         };
 256                 };
 257
 258                 target-module@49900000 {
 259                         compatible = "ti,sysc-omap4", "ti,sysc";
 260                         reg = <0x49900000 0x4>,
 261                               <0x49900010 0x4>;
 262                         reg-names = "rev", "sysc";
 263                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 264                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 265                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 266                                         <SYSC_IDLE_SMART>;
 267                         clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
 268                         clock-names = "fck";
 269                         #address-cells = <1>;
 270                         #size-cells = <1>;
 271                         ranges = <0x0 0x49900000 0x100000>;
 272
 273                         edma_tptc1: dma@0 {
 274                                 compatible = "ti,edma3-tptc";
 275                                 reg = <0 0x100000>;
 276                                 interrupts = <113>;
 277                                 interrupt-names = "edma3_tcerrint";
 278                         };
 279                 };
 280
 281                 target-module@49a00000 {
 282                         compatible = "ti,sysc-omap4", "ti,sysc";
 283                         reg = <0x49a00000 0x4>,
 284                               <0x49a00010 0x4>;
 285                         reg-names = "rev", "sysc";
 286                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 287                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 288                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 289                                         <SYSC_IDLE_SMART>;
 290                         clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
 291                         clock-names = "fck";
 292                         #address-cells = <1>;
 293                         #size-cells = <1>;
 294                         ranges = <0x0 0x49a00000 0x100000>;
 295
 296                         edma_tptc2: dma@0 {
 297                                 compatible = "ti,edma3-tptc";
 298                                 reg = <0 0x100000>;
 299                                 interrupts = <114>;
 300                                 interrupt-names = "edma3_tcerrint";
 301                         };
 302                 };
 303
 304                 i2c0: i2c@44e0b000 {
 305                         compatible = "ti,omap4-i2c";
 306                         #address-cells = <1>;
 307                         #size-cells = <0>;
 308                         ti,hwmods = "i2c1";
 309                         reg = <0x44e0b000 0x1000>;
 310                         interrupts = <70>;
 311                         status = "disabled";
 312                 };
 313
 314                 i2c1: i2c@4802a000 {
 315                         compatible = "ti,omap4-i2c";
 316                         #address-cells = <1>;
 317                         #size-cells = <0>;
 318                         ti,hwmods = "i2c2";
 319                         reg = <0x4802a000 0x1000>;
 320                         interrupts = <71>;
 321                         status = "disabled";
 322                 };
 323
 324                 i2c2: i2c@4819c000 {
 325                         compatible = "ti,omap4-i2c";
 326                         #address-cells = <1>;
 327                         #size-cells = <0>;
 328                         ti,hwmods = "i2c3";
 329                         reg = <0x4819c000 0x1000>;
 330                         interrupts = <30>;
 331                         status = "disabled";
 332                 };
 333
 334                 mmc1: mmc@48060000 {
 335                         compatible = "ti,omap4-hsmmc";
 336                         ti,hwmods = "mmc1";
 337                         ti,dual-volt;
 338                         ti,needs-special-reset;
 339                         ti,needs-special-hs-handling;
 340                         dmas = <&edma_xbar 24 0 0
 341                                 &edma_xbar 25 0 0>;
 342                         dma-names = "tx", "rx";
 343                         interrupts = <64>;
 344                         reg = <0x48060000 0x1000>;
 345                         status = "disabled";
 346                 };
 347
 348                 mmc2: mmc@481d8000 {
 349                         compatible = "ti,omap4-hsmmc";
 350                         ti,hwmods = "mmc2";
 351                         ti,needs-special-reset;
 352                         dmas = <&edma 2 0
 353                                 &edma 3 0>;
 354                         dma-names = "tx", "rx";
 355                         interrupts = <28>;
 356                         reg = <0x481d8000 0x1000>;
 357                         status = "disabled";
 358                 };
 359
 360                 mmc3: mmc@47810000 {
 361                         compatible = "ti,omap4-hsmmc";
 362                         ti,hwmods = "mmc3";
 363                         ti,needs-special-reset;
 364                         interrupts = <29>;
 365                         reg = <0x47810000 0x1000>;
 366                         status = "disabled";
 367                 };
 368
 369                 wdt2: wdt@44e35000 {
 370                         compatible = "ti,omap3-wdt";
 371                         ti,hwmods = "wd_timer2";
 372                         reg = <0x44e35000 0x1000>;
 373                         interrupts = <91>;
 374                 };
 375
 376                 usb: usb@47400000 {
 377                         compatible = "ti,am33xx-usb";
 378                         reg = <0x47400000 0x1000>;
 379                         ranges;
 380                         #address-cells = <1>;
 381                         #size-cells = <1>;
 382                         ti,hwmods = "usb_otg_hs";
 383                         status = "disabled";
 384
 385                         usb_ctrl_mod: control@44e10620 {
 386                                 compatible = "ti,am335x-usb-ctrl-module";
 387                                 reg = <0x44e10620 0x10
 388                                         0x44e10648 0x4>;
 389                                 reg-names = "phy_ctrl", "wakeup";
 390                                 status = "disabled";
 391                         };
 392
 393                         usb0_phy: usb-phy@47401300 {
 394                                 compatible = "ti,am335x-usb-phy";
 395                                 reg = <0x47401300 0x100>;
 396                                 reg-names = "phy";
 397                                 status = "disabled";
 398                                 ti,ctrl_mod = <&usb_ctrl_mod>;
 399                                 #phy-cells = <0>;
 400                         };
 401
 402                         usb0: usb@47401000 {
 403                                 compatible = "ti,musb-am33xx";
 404                                 status = "disabled";
 405                                 reg = <0x47401400 0x400
 406                                         0x47401000 0x200>;
 407                                 reg-names = "mc", "control";
 408
 409                                 interrupts = <18>;
 410                                 interrupt-names = "mc";
 411                                 dr_mode = "otg";
 412                                 mentor,multipoint = <1>;
 413                                 mentor,num-eps = <16>;
 414                                 mentor,ram-bits = <12>;
 415                                 mentor,power = <500>;
 416                                 phys = <&usb0_phy>;
 417
 418                                 dmas = <&cppi41dma  0 0 &cppi41dma  1 0
 419                                         &cppi41dma  2 0 &cppi41dma  3 0
 420                                         &cppi41dma  4 0 &cppi41dma  5 0
 421                                         &cppi41dma  6 0 &cppi41dma  7 0
 422                                         &cppi41dma  8 0 &cppi41dma  9 0
 423                                         &cppi41dma 10 0 &cppi41dma 11 0
 424                                         &cppi41dma 12 0 &cppi41dma 13 0
 425                                         &cppi41dma 14 0 &cppi41dma  0 1
 426                                         &cppi41dma  1 1 &cppi41dma  2 1
 427                                         &cppi41dma  3 1 &cppi41dma  4 1
 428                                         &cppi41dma  5 1 &cppi41dma  6 1
 429                                         &cppi41dma  7 1 &cppi41dma  8 1
 430                                         &cppi41dma  9 1 &cppi41dma 10 1
 431                                         &cppi41dma 11 1 &cppi41dma 12 1
 432                                         &cppi41dma 13 1 &cppi41dma 14 1>;
 433                                 dma-names =
 434                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
 435                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
 436                                         "rx14", "rx15",
 437                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
 438                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
 439                                         "tx14", "tx15";
 440                         };
 441
 442                         usb1_phy: usb-phy@47401b00 {
 443                                 compatible = "ti,am335x-usb-phy";
 444                                 reg = <0x47401b00 0x100>;
 445                                 reg-names = "phy";
 446                                 status = "disabled";
 447                                 ti,ctrl_mod = <&usb_ctrl_mod>;
 448                                 #phy-cells = <0>;
 449                         };
 450
 451                         usb1: usb@47401800 {
 452                                 compatible = "ti,musb-am33xx";
 453                                 status = "disabled";
 454                                 reg = <0x47401c00 0x400
 455                                         0x47401800 0x200>;
 456                                 reg-names = "mc", "control";
 457                                 interrupts = <19>;
 458                                 interrupt-names = "mc";
 459                                 dr_mode = "otg";
 460                                 mentor,multipoint = <1>;
 461                                 mentor,num-eps = <16>;
 462                                 mentor,ram-bits = <12>;
 463                                 mentor,power = <500>;
 464                                 phys = <&usb1_phy>;
 465
 466                                 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
 467                                         &cppi41dma 17 0 &cppi41dma 18 0
 468                                         &cppi41dma 19 0 &cppi41dma 20 0
 469                                         &cppi41dma 21 0 &cppi41dma 22 0
 470                                         &cppi41dma 23 0 &cppi41dma 24 0
 471                                         &cppi41dma 25 0 &cppi41dma 26 0
 472                                         &cppi41dma 27 0 &cppi41dma 28 0
 473                                         &cppi41dma 29 0 &cppi41dma 15 1
 474                                         &cppi41dma 16 1 &cppi41dma 17 1
 475                                         &cppi41dma 18 1 &cppi41dma 19 1
 476                                         &cppi41dma 20 1 &cppi41dma 21 1
 477                                         &cppi41dma 22 1 &cppi41dma 23 1
 478                                         &cppi41dma 24 1 &cppi41dma 25 1
 479                                         &cppi41dma 26 1 &cppi41dma 27 1
 480                                         &cppi41dma 28 1 &cppi41dma 29 1>;
 481                                 dma-names =
 482                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
 483                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
 484                                         "rx14", "rx15",
 485                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
 486                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
 487                                         "tx14", "tx15";
 488                         };
 489
 490                         cppi41dma: dma-controller@2000 {
 491                                 compatible = "ti,am3359-cppi41";
 492                                 reg =  <0x0000 0x1000>,
 493                                        <0x2000 0x1000>,
 494                                        <0x3000 0x1000>,
 495                                        <0x4000 0x4000>;
 496                                 reg-names = "glue", "controller", "scheduler", "queuemgr";
 497                                 interrupts = <17>;
 498                                 interrupt-names = "glue";
 499                                 #dma-cells = <2>;
 500                                 #dma-channels = <30>;
 501                                 #dma-requests = <256>;
 502                         };
 503                 };
 504
 505                 mac: ethernet@4a100000 {
 506                         compatible = "ti,am335x-cpsw","ti,cpsw";
 507                         ti,hwmods = "cpgmac0";
 508                         clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
 509                         clock-names = "fck", "cpts";
 510                         cpdma_channels = <8>;
 511                         ale_entries = <1024>;
 512                         bd_ram_size = <0x2000>;
 513                         mac_control = <0x20>;
 514                         slaves = <2>;
 515                         active_slave = <0>;
 516                         cpts_clock_mult = <0x80000000>;
 517                         cpts_clock_shift = <29>;
 518                         reg = <0x4a100000 0x800
 519                                0x4a101200 0x100>;
 520                         #address-cells = <1>;
 521                         #size-cells = <1>;
 522                         /*
 523                          * c0_rx_thresh_pend
 524                          * c0_rx_pend
 525                          * c0_tx_pend
 526                          * c0_misc_pend
 527                          */
 528                         interrupts = <40 41 42 43>;
 529                         ranges;
 530                         syscon = <&scm_conf>;
 531                         status = "disabled";
 532
 533                         davinci_mdio: mdio@4a101000 {
 534                                 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
 535                                 #address-cells = <1>;
 536                                 #size-cells = <0>;
 537                                 ti,hwmods = "davinci_mdio";
 538                                 bus_freq = <1000000>;
 539                                 reg = <0x4a101000 0x100>;
 540                                 status = "disabled";
 541                         };
 542
 543                         cpsw_emac0: slave@4a100200 {
 544                                 /* Filled in by U-Boot */
 545                                 mac-address = [ 00 00 00 00 00 00 ];
 546                         };
 547
 548                         cpsw_emac1: slave@4a100300 {
 549                                 /* Filled in by U-Boot */
 550                                 mac-address = [ 00 00 00 00 00 00 ];
 551                         };
 552
 553                         phy_sel: cpsw-phy-sel@44e10650 {
 554                                 compatible = "ti,am3352-cpsw-phy-sel";
 555                                 reg= <0x44e10650 0x4>;
 556                                 reg-names = "gmii-sel";
 557                         };
 558                 };
 559
 560                 ocmcram: sram@40300000 {
 561                         compatible = "mmio-sram";
 562                         reg = <0x40300000 0x10000>; /* 64k */
 563                         ranges = <0x0 0x40300000 0x10000>;
 564                         #address-cells = <1>;
 565                         #size-cells = <1>;
 566
 567                         pm_sram_code: pm-code-sram@0 {
 568                                 compatible = "ti,sram";
 569                                 reg = <0x0 0x1000>;
 570                                 protect-exec;
 571                         };
 572
 573                         pm_sram_data: pm-data-sram@1000 {
 574                                 compatible = "ti,sram";
 575                                 reg = <0x1000 0x1000>;
 576                                 pool;
 577                         };
 578                 };
 579
 580                 emif: emif@4c000000 {
 581                         compatible = "ti,emif-am3352";
 582                         reg = <0x4c000000 0x1000000>;
 583                         ti,hwmods = "emif";
 584                         interrupts = <101>;
 585                         sram = <&pm_sram_code
 586                                 &pm_sram_data>;
 587                         ti,no-idle;
 588                 };
 589
 590                 gpmc: gpmc@50000000 {
 591                         compatible = "ti,am3352-gpmc";
 592                         ti,hwmods = "gpmc";
 593                         ti,no-idle-on-init;
 594                         reg = <0x50000000 0x2000>;
 595                         interrupts = <100>;
 596                         dmas = <&edma 52 0>;
 597                         dma-names = "rxtx";
 598                         gpmc,num-cs = <7>;
 599                         gpmc,num-waitpins = <2>;
 600                         #address-cells = <2>;
 601                         #size-cells = <1>;
 602                         interrupt-controller;
 603                         #interrupt-cells = <2>;
 604                         gpio-controller;
 605                         #gpio-cells = <2>;
 606                         status = "disabled";
 607                 };
 608
 609                 sham_target: target-module@53100000 {
 610                         compatible = "ti,sysc-omap3-sham", "ti,sysc";
 611                         reg = <0x53100100 0x4>,
 612                               <0x53100110 0x4>,
 613                               <0x53100114 0x4>;
 614                         reg-names = "rev", "sysc", "syss";
 615                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 616                                          SYSC_OMAP2_AUTOIDLE)>;
 617                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 618                                         <SYSC_IDLE_NO>,
 619                                         <SYSC_IDLE_SMART>;
 620                         ti,syss-mask = <1>;
 621                         /* Domains (P, C): per_pwrdm, l3_clkdm */
 622                         clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
 623                         clock-names = "fck";
 624                         #address-cells = <1>;
 625                         #size-cells = <1>;
 626                         ranges = <0x0 0x53100000 0x1000>;
 627
 628                         sham: sham@0 {
 629                                 compatible = "ti,omap4-sham";
 630                                 reg = <0 0x200>;
 631                                 interrupts = <109>;
 632                                 dmas = <&edma 36 0>;
 633                                 dma-names = "rx";
 634                         };
 635                 };
 636
 637                 aes_target: target-module@53500000 {
 638                         compatible = "ti,sysc-omap2", "ti,sysc";
 639                         reg = <0x53500080 0x4>,
 640                               <0x53500084 0x4>,
 641                               <0x53500088 0x4>;
 642                         reg-names = "rev", "sysc", "syss";
 643                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 644                                          SYSC_OMAP2_AUTOIDLE)>;
 645                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 646                                         <SYSC_IDLE_NO>,
 647                                         <SYSC_IDLE_SMART>,
 648                                         <SYSC_IDLE_SMART_WKUP>;
 649                         ti,syss-mask = <1>;
 650                         /* Domains (P, C): per_pwrdm, l3_clkdm */
 651                         clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
 652                         clock-names = "fck";
 653                         #address-cells = <1>;
 654                         #size-cells = <1>;
 655                         ranges = <0x0 0x53500000 0x1000>;
 656
 657                         aes: aes@0 {
 658                                 compatible = "ti,omap4-aes";
 659                                 reg = <0 0xa0>;
 660                                 interrupts = <103>;
 661                                 dmas = <&edma 6 0>,
 662                                        <&edma 5 0>;
 663                                 dma-names = "tx", "rx";
 664                         };
 665                 };
 666
 667                 target-module@56000000 {
 668                         compatible = "ti,sysc-omap4", "ti,sysc";
 669                         reg = <0x5600fe00 0x4>,
 670                               <0x5600fe10 0x4>;
 671                         reg-names = "rev", "sysc";
 672                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 673                                         <SYSC_IDLE_NO>,
 674                                         <SYSC_IDLE_SMART>;
 675                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 676                                         <SYSC_IDLE_NO>,
 677                                         <SYSC_IDLE_SMART>;
 678                         clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
 679                         clock-names = "fck";
 680                         resets = <&prm_gfx 0>;
 681                         reset-names = "rstctrl";
 682                         #address-cells = <1>;
 683                         #size-cells = <1>;
 684                         ranges = <0 0x56000000 0x1000000>;
 685
 686                         /*
 687                          * Closed source PowerVR driver, no child device
 688                          * binding or driver in mainline
 689                          */
 690                 };
 691         };
 692 };
 693
 694 #include "am33xx-l4.dtsi"
 695 #include "am33xx-clocks.dtsi"
 696
 697 &prcm {
 698         prm_per: prm@c00 {
 699                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 700                 reg = <0xc00 0x100>;
 701                 #reset-cells = <1>;
 702         };
 703
 704         prm_wkup: prm@d00 {
 705                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 706                 reg = <0xd00 0x100>;
 707                 #reset-cells = <1>;
 708         };
 709
 710         prm_device: prm@f00 {
 711                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 712                 reg = <0xf00 0x100>;
 713                 #reset-cells = <1>;
 714         };
 715
 716         prm_gfx: prm@1100 {
 717                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 718                 reg = <0x1100 0x100>;
 719                 #reset-cells = <1>;
 720         };
 721 };