5871344edbfa3d1731fad2edf6e464b695a117e2
[platform/kernel/u-boot.git] / arch / arm / dts / am33xx.dtsi
1 /*
2  * Device Tree Source for AM33XX SoC
3  *
4  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2.  This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/am33xx.h>
14 #include <dt-bindings/clock/am3.h>
15
16 / {
17         compatible = "ti,am33xx";
18         interrupt-parent = <&intc>;
19         #address-cells = <1>;
20         #size-cells = <1>;
21         chosen { };
22
23         aliases {
24                 i2c0 = &i2c0;
25                 i2c1 = &i2c1;
26                 i2c2 = &i2c2;
27                 serial0 = &uart0;
28                 serial1 = &uart1;
29                 serial2 = &uart2;
30                 serial3 = &uart3;
31                 serial4 = &uart4;
32                 serial5 = &uart5;
33                 d-can0 = &dcan0;
34                 d-can1 = &dcan1;
35                 usb0 = &usb0;
36                 usb1 = &usb1;
37                 phy0 = &usb0_phy;
38                 phy1 = &usb1_phy;
39                 ethernet0 = &cpsw_emac0;
40                 ethernet1 = &cpsw_emac1;
41                 spi0 = &spi0;
42                 spi1 = &spi1;
43                 mmc0 = &mmc1;
44                 mmc1 = &mmc2;
45                 mmc2 = &mmc3;
46         };
47
48         cpus {
49                 #address-cells = <1>;
50                 #size-cells = <0>;
51                 cpu@0 {
52                         compatible = "arm,cortex-a8";
53                         enable-method = "ti,am3352";
54                         device_type = "cpu";
55                         reg = <0>;
56
57                         operating-points-v2 = <&cpu0_opp_table>;
58
59                         clocks = <&dpll_mpu_ck>;
60                         clock-names = "cpu";
61
62                         clock-latency = <300000>; /* From omap-cpufreq driver */
63                         cpu-idle-states = <&mpu_gate>;
64                 };
65
66                 idle-states {
67                         mpu_gate: mpu_gate {
68                                 compatible = "arm,idle-state";
69                                 entry-latency-us = <40>;
70                                 exit-latency-us = <90>;
71                                 min-residency-us = <300>;
72                                 ti,idle-wkup-m3;
73                         };
74                 };
75         };
76
77         cpu0_opp_table: opp-table {
78                 compatible = "operating-points-v2-ti-cpu";
79                 syscon = <&scm_conf>;
80
81                 /*
82                  * The three following nodes are marked with opp-suspend
83                  * because the can not be enabled simultaneously on a
84                  * single SoC.
85                  */
86                 opp50-300000000 {
87                         opp-hz = /bits/ 64 <300000000>;
88                         opp-microvolt = <950000 931000 969000>;
89                         opp-supported-hw = <0x06 0x0010>;
90                         opp-suspend;
91                 };
92
93                 opp100-275000000 {
94                         opp-hz = /bits/ 64 <275000000>;
95                         opp-microvolt = <1100000 1078000 1122000>;
96                         opp-supported-hw = <0x01 0x00FF>;
97                         opp-suspend;
98                 };
99
100                 opp100-300000000 {
101                         opp-hz = /bits/ 64 <300000000>;
102                         opp-microvolt = <1100000 1078000 1122000>;
103                         opp-supported-hw = <0x06 0x0020>;
104                         opp-suspend;
105                 };
106
107                 opp100-500000000 {
108                         opp-hz = /bits/ 64 <500000000>;
109                         opp-microvolt = <1100000 1078000 1122000>;
110                         opp-supported-hw = <0x01 0xFFFF>;
111                 };
112
113                 opp100-600000000 {
114                         opp-hz = /bits/ 64 <600000000>;
115                         opp-microvolt = <1100000 1078000 1122000>;
116                         opp-supported-hw = <0x06 0x0040>;
117                 };
118
119                 opp120-600000000 {
120                         opp-hz = /bits/ 64 <600000000>;
121                         opp-microvolt = <1200000 1176000 1224000>;
122                         opp-supported-hw = <0x01 0xFFFF>;
123                 };
124
125                 opp120-720000000 {
126                         opp-hz = /bits/ 64 <720000000>;
127                         opp-microvolt = <1200000 1176000 1224000>;
128                         opp-supported-hw = <0x06 0x0080>;
129                 };
130
131                 oppturbo-720000000 {
132                         opp-hz = /bits/ 64 <720000000>;
133                         opp-microvolt = <1260000 1234800 1285200>;
134                         opp-supported-hw = <0x01 0xFFFF>;
135                 };
136
137                 oppturbo-800000000 {
138                         opp-hz = /bits/ 64 <800000000>;
139                         opp-microvolt = <1260000 1234800 1285200>;
140                         opp-supported-hw = <0x06 0x0100>;
141                 };
142
143                 oppnitro-1000000000 {
144                         opp-hz = /bits/ 64 <1000000000>;
145                         opp-microvolt = <1325000 1298500 1351500>;
146                         opp-supported-hw = <0x04 0x0200>;
147                 };
148         };
149
150         pmu@4b000000 {
151                 compatible = "arm,cortex-a8-pmu";
152                 interrupts = <3>;
153                 reg = <0x4b000000 0x1000000>;
154                 ti,hwmods = "debugss";
155         };
156
157         /*
158          * The soc node represents the soc top level view. It is used for IPs
159          * that are not memory mapped in the MPU view or for the MPU itself.
160          */
161         soc {
162                 compatible = "ti,omap-infra";
163                 mpu {
164                         compatible = "ti,omap3-mpu";
165                         ti,hwmods = "mpu";
166                         pm-sram = <&pm_sram_code
167                                    &pm_sram_data>;
168                 };
169         };
170
171         /*
172          * XXX: Use a flat representation of the AM33XX interconnect.
173          * The real AM33XX interconnect network is quite complex. Since
174          * it will not bring real advantage to represent that in DT
175          * for the moment, just use a fake OCP bus entry to represent
176          * the whole bus hierarchy.
177          */
178         ocp {
179                 compatible = "simple-bus";
180                 #address-cells = <1>;
181                 #size-cells = <1>;
182                 ranges;
183                 ti,hwmods = "l3_main";
184
185                 l4_wkup: l4_wkup@44c00000 {
186                         wkup_m3: wkup_m3@100000 {
187                                 compatible = "ti,am3352-wkup-m3";
188                                 reg = <0x100000 0x4000>,
189                                       <0x180000 0x2000>;
190                                 reg-names = "umem", "dmem";
191                                 ti,hwmods = "wkup_m3";
192                                 ti,pm-firmware = "am335x-pm-firmware.elf";
193                         };
194                 };
195                 l4_per: interconnect@48000000 {
196                 };
197                 l4_fw: interconnect@47c00000 {
198                 };
199                 l4_fast: interconnect@4a000000 {
200                 };
201                 l4_mpuss: interconnect@4b140000 {
202                 };
203
204                 intc: interrupt-controller@48200000 {
205                         compatible = "ti,am33xx-intc";
206                         interrupt-controller;
207                         #interrupt-cells = <1>;
208                         reg = <0x48200000 0x1000>;
209                 };
210
211                 target-module@49000000 {
212                         compatible = "ti,sysc-omap4", "ti,sysc";
213                         reg = <0x49000000 0x4>;
214                         reg-names = "rev";
215                         clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
216                         clock-names = "fck";
217                         #address-cells = <1>;
218                         #size-cells = <1>;
219                         ranges = <0x0 0x49000000 0x10000>;
220
221                         edma: dma@0 {
222                                 compatible = "ti,edma3-tpcc";
223                                 reg = <0 0x10000>;
224                                 reg-names = "edma3_cc";
225                                 interrupts = <12 13 14>;
226                                 interrupt-names = "edma3_ccint", "edma3_mperr",
227                                                   "edma3_ccerrint";
228                                 dma-requests = <64>;
229                                 #dma-cells = <2>;
230
231                                 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
232                                            <&edma_tptc2 0>;
233
234                                 ti,edma-memcpy-channels = <20 21>;
235                         };
236                 };
237
238                 target-module@49800000 {
239                         compatible = "ti,sysc-omap4", "ti,sysc";
240                         reg = <0x49800000 0x4>,
241                               <0x49800010 0x4>;
242                         reg-names = "rev", "sysc";
243                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
244                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
245                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
246                                         <SYSC_IDLE_SMART>;
247                         clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
248                         clock-names = "fck";
249                         #address-cells = <1>;
250                         #size-cells = <1>;
251                         ranges = <0x0 0x49800000 0x100000>;
252
253                         edma_tptc0: dma@0 {
254                                 compatible = "ti,edma3-tptc";
255                                 reg = <0 0x100000>;
256                                 interrupts = <112>;
257                                 interrupt-names = "edma3_tcerrint";
258                         };
259                 };
260
261                 target-module@49900000 {
262                         compatible = "ti,sysc-omap4", "ti,sysc";
263                         reg = <0x49900000 0x4>,
264                               <0x49900010 0x4>;
265                         reg-names = "rev", "sysc";
266                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
267                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
268                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
269                                         <SYSC_IDLE_SMART>;
270                         clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
271                         clock-names = "fck";
272                         #address-cells = <1>;
273                         #size-cells = <1>;
274                         ranges = <0x0 0x49900000 0x100000>;
275
276                         edma_tptc1: dma@0 {
277                                 compatible = "ti,edma3-tptc";
278                                 reg = <0 0x100000>;
279                                 interrupts = <113>;
280                                 interrupt-names = "edma3_tcerrint";
281                         };
282                 };
283
284                 target-module@49a00000 {
285                         compatible = "ti,sysc-omap4", "ti,sysc";
286                         reg = <0x49a00000 0x4>,
287                               <0x49a00010 0x4>;
288                         reg-names = "rev", "sysc";
289                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
290                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
291                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
292                                         <SYSC_IDLE_SMART>;
293                         clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
294                         clock-names = "fck";
295                         #address-cells = <1>;
296                         #size-cells = <1>;
297                         ranges = <0x0 0x49a00000 0x100000>;
298
299                         edma_tptc2: dma@0 {
300                                 compatible = "ti,edma3-tptc";
301                                 reg = <0 0x100000>;
302                                 interrupts = <114>;
303                                 interrupt-names = "edma3_tcerrint";
304                         };
305                 };
306
307                 target-module@47810000 {
308                         compatible = "ti,sysc-omap2", "ti,sysc";
309                         reg = <0x478102fc 0x4>,
310                               <0x47810110 0x4>,
311                               <0x47810114 0x4>;
312                         reg-names = "rev", "sysc", "syss";
313                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
314                                          SYSC_OMAP2_ENAWAKEUP |
315                                          SYSC_OMAP2_SOFTRESET |
316                                          SYSC_OMAP2_AUTOIDLE)>;
317                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
318                                         <SYSC_IDLE_NO>,
319                                         <SYSC_IDLE_SMART>;
320                         ti,syss-mask = <1>;
321                         clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
322                         clock-names = "fck";
323                         #address-cells = <1>;
324                         #size-cells = <1>;
325                         ranges = <0x0 0x47810000 0x1000>;
326
327                         mmc3: mmc@0 {
328                               compatible = "ti,am335-sdhci";
329                               ti,needs-special-reset;
330                               interrupts = <29>;
331                               reg = <0x0 0x1000>;
332                               status = "disabled";
333                         };
334                 };
335
336                 i2c0: i2c@44e0b000 {
337                         compatible = "ti,omap4-i2c";
338                         #address-cells = <1>;
339                         #size-cells = <0>;
340                         ti,hwmods = "i2c1";
341                         reg = <0x44e0b000 0x1000>;
342                         interrupts = <70>;
343                         status = "disabled";
344                 };
345
346                 i2c1: i2c@4802a000 {
347                         compatible = "ti,omap4-i2c";
348                         #address-cells = <1>;
349                         #size-cells = <0>;
350                         ti,hwmods = "i2c2";
351                         reg = <0x4802a000 0x1000>;
352                         interrupts = <71>;
353                         status = "disabled";
354                 };
355
356                 i2c2: i2c@4819c000 {
357                         compatible = "ti,omap4-i2c";
358                         #address-cells = <1>;
359                         #size-cells = <0>;
360                         ti,hwmods = "i2c3";
361                         reg = <0x4819c000 0x1000>;
362                         interrupts = <30>;
363                         status = "disabled";
364                 };
365
366                 mmc1: mmc@48060000 {
367                         compatible = "ti,omap4-hsmmc";
368                         ti,hwmods = "mmc1";
369                         ti,dual-volt;
370                         ti,needs-special-reset;
371                         ti,needs-special-hs-handling;
372                         dmas = <&edma_xbar 24 0 0
373                                 &edma_xbar 25 0 0>;
374                         dma-names = "tx", "rx";
375                         interrupts = <64>;
376                         reg = <0x48060000 0x1000>;
377                         status = "disabled";
378                 };
379
380                 mmc2: mmc@481d8000 {
381                         compatible = "ti,omap4-hsmmc";
382                         ti,hwmods = "mmc2";
383                         ti,needs-special-reset;
384                         dmas = <&edma 2 0
385                                 &edma 3 0>;
386                         dma-names = "tx", "rx";
387                         interrupts = <28>;
388                         reg = <0x481d8000 0x1000>;
389                         status = "disabled";
390                 };
391
392                 wdt2: wdt@44e35000 {
393                         compatible = "ti,omap3-wdt";
394                         ti,hwmods = "wd_timer2";
395                         reg = <0x44e35000 0x1000>;
396                         interrupts = <91>;
397                 };
398
399                 usb: usb@47400000 {
400                         compatible = "ti,am33xx-usb";
401                         reg = <0x47400000 0x1000>;
402                         ranges;
403                         #address-cells = <1>;
404                         #size-cells = <1>;
405                         ti,hwmods = "usb_otg_hs";
406
407                         usb_ctrl_mod: control@44e10620 {
408                                 compatible = "ti,am335x-usb-ctrl-module";
409                                 reg = <0x44e10620 0x10
410                                         0x44e10648 0x4>;
411                                 reg-names = "phy_ctrl", "wakeup";
412                         };
413
414                         usb0_phy: usb-phy@47401300 {
415                                 compatible = "ti,am335x-usb-phy";
416                                 reg = <0x47401300 0x100>;
417                                 reg-names = "phy";
418                                 ti,ctrl_mod = <&usb_ctrl_mod>;
419                                 #phy-cells = <0>;
420                         };
421
422                         usb0: usb@47401000 {
423                                 compatible = "ti,musb-am33xx";
424                                 reg = <0x47401400 0x400
425                                         0x47401000 0x200>;
426                                 reg-names = "mc", "control";
427
428                                 interrupts = <18>;
429                                 interrupt-names = "mc";
430                                 dr_mode = "otg";
431                                 mentor,multipoint = <1>;
432                                 mentor,num-eps = <16>;
433                                 mentor,ram-bits = <12>;
434                                 mentor,power = <500>;
435                                 phys = <&usb0_phy>;
436
437                                 dmas = <&cppi41dma  0 0 &cppi41dma  1 0
438                                         &cppi41dma  2 0 &cppi41dma  3 0
439                                         &cppi41dma  4 0 &cppi41dma  5 0
440                                         &cppi41dma  6 0 &cppi41dma  7 0
441                                         &cppi41dma  8 0 &cppi41dma  9 0
442                                         &cppi41dma 10 0 &cppi41dma 11 0
443                                         &cppi41dma 12 0 &cppi41dma 13 0
444                                         &cppi41dma 14 0 &cppi41dma  0 1
445                                         &cppi41dma  1 1 &cppi41dma  2 1
446                                         &cppi41dma  3 1 &cppi41dma  4 1
447                                         &cppi41dma  5 1 &cppi41dma  6 1
448                                         &cppi41dma  7 1 &cppi41dma  8 1
449                                         &cppi41dma  9 1 &cppi41dma 10 1
450                                         &cppi41dma 11 1 &cppi41dma 12 1
451                                         &cppi41dma 13 1 &cppi41dma 14 1>;
452                                 dma-names =
453                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
454                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
455                                         "rx14", "rx15",
456                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
457                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
458                                         "tx14", "tx15";
459                         };
460
461                         usb1_phy: usb-phy@47401b00 {
462                                 compatible = "ti,am335x-usb-phy";
463                                 reg = <0x47401b00 0x100>;
464                                 reg-names = "phy";
465                                 ti,ctrl_mod = <&usb_ctrl_mod>;
466                                 #phy-cells = <0>;
467                         };
468
469                         usb1: usb@47401800 {
470                                 compatible = "ti,musb-am33xx";
471                                 reg = <0x47401c00 0x400
472                                         0x47401800 0x200>;
473                                 reg-names = "mc", "control";
474                                 interrupts = <19>;
475                                 interrupt-names = "mc";
476                                 dr_mode = "otg";
477                                 mentor,multipoint = <1>;
478                                 mentor,num-eps = <16>;
479                                 mentor,ram-bits = <12>;
480                                 mentor,power = <500>;
481                                 phys = <&usb1_phy>;
482
483                                 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
484                                         &cppi41dma 17 0 &cppi41dma 18 0
485                                         &cppi41dma 19 0 &cppi41dma 20 0
486                                         &cppi41dma 21 0 &cppi41dma 22 0
487                                         &cppi41dma 23 0 &cppi41dma 24 0
488                                         &cppi41dma 25 0 &cppi41dma 26 0
489                                         &cppi41dma 27 0 &cppi41dma 28 0
490                                         &cppi41dma 29 0 &cppi41dma 15 1
491                                         &cppi41dma 16 1 &cppi41dma 17 1
492                                         &cppi41dma 18 1 &cppi41dma 19 1
493                                         &cppi41dma 20 1 &cppi41dma 21 1
494                                         &cppi41dma 22 1 &cppi41dma 23 1
495                                         &cppi41dma 24 1 &cppi41dma 25 1
496                                         &cppi41dma 26 1 &cppi41dma 27 1
497                                         &cppi41dma 28 1 &cppi41dma 29 1>;
498                                 dma-names =
499                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
500                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
501                                         "rx14", "rx15",
502                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
503                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
504                                         "tx14", "tx15";
505                         };
506
507                         cppi41dma: dma-controller@2000 {
508                                 compatible = "ti,am3359-cppi41";
509                                 reg =  <0x0000 0x1000>,
510                                        <0x2000 0x1000>,
511                                        <0x3000 0x1000>,
512                                        <0x4000 0x4000>;
513                                 reg-names = "glue", "controller", "scheduler", "queuemgr";
514                                 interrupts = <17>;
515                                 interrupt-names = "glue";
516                                 #dma-cells = <2>;
517                                 #dma-channels = <30>;
518                                 #dma-requests = <256>;
519                         };
520                 };
521
522                 mac: ethernet@4a100000 {
523                         compatible = "ti,am335x-cpsw","ti,cpsw";
524                         ti,hwmods = "cpgmac0";
525                         clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
526                         clock-names = "fck", "cpts";
527                         cpdma_channels = <8>;
528                         ale_entries = <1024>;
529                         bd_ram_size = <0x2000>;
530                         mac_control = <0x20>;
531                         slaves = <2>;
532                         active_slave = <0>;
533                         cpts_clock_mult = <0x80000000>;
534                         cpts_clock_shift = <29>;
535                         reg = <0x4a100000 0x800
536                                0x4a101200 0x100>;
537                         #address-cells = <1>;
538                         #size-cells = <1>;
539                         /*
540                          * c0_rx_thresh_pend
541                          * c0_rx_pend
542                          * c0_tx_pend
543                          * c0_misc_pend
544                          */
545                         interrupts = <40 41 42 43>;
546                         ranges;
547                         syscon = <&scm_conf>;
548                         status = "disabled";
549
550                         davinci_mdio: mdio@4a101000 {
551                                 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
552                                 #address-cells = <1>;
553                                 #size-cells = <0>;
554                                 ti,hwmods = "davinci_mdio";
555                                 bus_freq = <1000000>;
556                                 reg = <0x4a101000 0x100>;
557                                 status = "disabled";
558                         };
559
560                         cpsw_emac0: slave@4a100200 {
561                                 /* Filled in by U-Boot */
562                                 mac-address = [ 00 00 00 00 00 00 ];
563                         };
564
565                         cpsw_emac1: slave@4a100300 {
566                                 /* Filled in by U-Boot */
567                                 mac-address = [ 00 00 00 00 00 00 ];
568                         };
569
570                         phy_sel: cpsw-phy-sel@44e10650 {
571                                 compatible = "ti,am3352-cpsw-phy-sel";
572                                 reg= <0x44e10650 0x4>;
573                                 reg-names = "gmii-sel";
574                         };
575                 };
576
577                 ocmcram: sram@40300000 {
578                         compatible = "mmio-sram";
579                         reg = <0x40300000 0x10000>; /* 64k */
580                         ranges = <0x0 0x40300000 0x10000>;
581                         #address-cells = <1>;
582                         #size-cells = <1>;
583
584                         pm_sram_code: pm-code-sram@0 {
585                                 compatible = "ti,sram";
586                                 reg = <0x0 0x1000>;
587                                 protect-exec;
588                         };
589
590                         pm_sram_data: pm-data-sram@1000 {
591                                 compatible = "ti,sram";
592                                 reg = <0x1000 0x1000>;
593                                 pool;
594                         };
595                 };
596
597                 emif: emif@4c000000 {
598                         compatible = "ti,emif-am3352";
599                         reg = <0x4c000000 0x1000000>;
600                         ti,hwmods = "emif";
601                         interrupts = <101>;
602                         sram = <&pm_sram_code
603                                 &pm_sram_data>;
604                         ti,no-idle;
605                 };
606
607                 gpmc: gpmc@50000000 {
608                         compatible = "ti,am3352-gpmc";
609                         ti,hwmods = "gpmc";
610                         ti,no-idle-on-init;
611                         reg = <0x50000000 0x2000>;
612                         interrupts = <100>;
613                         dmas = <&edma 52 0>;
614                         dma-names = "rxtx";
615                         gpmc,num-cs = <7>;
616                         gpmc,num-waitpins = <2>;
617                         #address-cells = <2>;
618                         #size-cells = <1>;
619                         interrupt-controller;
620                         #interrupt-cells = <2>;
621                         gpio-controller;
622                         #gpio-cells = <2>;
623                         status = "disabled";
624                 };
625
626                 sham_target: target-module@53100000 {
627                         compatible = "ti,sysc-omap3-sham", "ti,sysc";
628                         reg = <0x53100100 0x4>,
629                               <0x53100110 0x4>,
630                               <0x53100114 0x4>;
631                         reg-names = "rev", "sysc", "syss";
632                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
633                                          SYSC_OMAP2_AUTOIDLE)>;
634                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
635                                         <SYSC_IDLE_NO>,
636                                         <SYSC_IDLE_SMART>;
637                         ti,syss-mask = <1>;
638                         /* Domains (P, C): per_pwrdm, l3_clkdm */
639                         clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
640                         clock-names = "fck";
641                         #address-cells = <1>;
642                         #size-cells = <1>;
643                         ranges = <0x0 0x53100000 0x1000>;
644
645                         sham: sham@0 {
646                                 compatible = "ti,omap4-sham";
647                                 reg = <0 0x200>;
648                                 interrupts = <109>;
649                                 dmas = <&edma 36 0>;
650                                 dma-names = "rx";
651                         };
652                 };
653
654                 aes_target: target-module@53500000 {
655                         compatible = "ti,sysc-omap2", "ti,sysc";
656                         reg = <0x53500080 0x4>,
657                               <0x53500084 0x4>,
658                               <0x53500088 0x4>;
659                         reg-names = "rev", "sysc", "syss";
660                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
661                                          SYSC_OMAP2_AUTOIDLE)>;
662                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
663                                         <SYSC_IDLE_NO>,
664                                         <SYSC_IDLE_SMART>,
665                                         <SYSC_IDLE_SMART_WKUP>;
666                         ti,syss-mask = <1>;
667                         /* Domains (P, C): per_pwrdm, l3_clkdm */
668                         clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
669                         clock-names = "fck";
670                         #address-cells = <1>;
671                         #size-cells = <1>;
672                         ranges = <0x0 0x53500000 0x1000>;
673
674                         aes: aes@0 {
675                                 compatible = "ti,omap4-aes";
676                                 reg = <0 0xa0>;
677                                 interrupts = <103>;
678                                 dmas = <&edma 6 0>,
679                                        <&edma 5 0>;
680                                 dma-names = "tx", "rx";
681                         };
682                 };
683
684                 target-module@56000000 {
685                         compatible = "ti,sysc-omap4", "ti,sysc";
686                         reg = <0x5600fe00 0x4>,
687                               <0x5600fe10 0x4>;
688                         reg-names = "rev", "sysc";
689                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
690                                         <SYSC_IDLE_NO>,
691                                         <SYSC_IDLE_SMART>;
692                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
693                                         <SYSC_IDLE_NO>,
694                                         <SYSC_IDLE_SMART>;
695                         clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
696                         clock-names = "fck";
697                         resets = <&prm_gfx 0>;
698                         reset-names = "rstctrl";
699                         #address-cells = <1>;
700                         #size-cells = <1>;
701                         ranges = <0 0x56000000 0x1000000>;
702
703                         /*
704                          * Closed source PowerVR driver, no child device
705                          * binding or driver in mainline
706                          */
707                 };
708         };
709 };
710
711 #include "am33xx-l4.dtsi"
712 #include "am33xx-clocks.dtsi"
713
714 &prcm {
715         prm_per: prm@c00 {
716                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
717                 reg = <0xc00 0x100>;
718                 #reset-cells = <1>;
719         };
720
721         prm_wkup: prm@d00 {
722                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
723                 reg = <0xd00 0x100>;
724                 #reset-cells = <1>;
725         };
726
727         prm_device: prm@f00 {
728                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
729                 reg = <0xf00 0x100>;
730                 #reset-cells = <1>;
731         };
732
733         prm_gfx: prm@1100 {
734                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
735                 reg = <0x1100 0x100>;
736                 #reset-cells = <1>;
737         };
738 };