2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/am33xx.h>
14 #include <dt-bindings/clock/am3.h>
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
39 ethernet0 = &cpsw_emac0;
40 ethernet1 = &cpsw_emac1;
52 compatible = "arm,cortex-a8";
53 enable-method = "ti,am3352";
57 operating-points-v2 = <&cpu0_opp_table>;
59 clocks = <&dpll_mpu_ck>;
62 clock-latency = <300000>; /* From omap-cpufreq driver */
63 cpu-idle-states = <&mpu_gate>;
68 compatible = "arm,idle-state";
69 entry-latency-us = <40>;
70 exit-latency-us = <90>;
71 min-residency-us = <300>;
77 cpu0_opp_table: opp-table {
78 compatible = "operating-points-v2-ti-cpu";
82 * The three following nodes are marked with opp-suspend
83 * because the can not be enabled simultaneously on a
87 opp-hz = /bits/ 64 <300000000>;
88 opp-microvolt = <950000 931000 969000>;
89 opp-supported-hw = <0x06 0x0010>;
94 opp-hz = /bits/ 64 <275000000>;
95 opp-microvolt = <1100000 1078000 1122000>;
96 opp-supported-hw = <0x01 0x00FF>;
101 opp-hz = /bits/ 64 <300000000>;
102 opp-microvolt = <1100000 1078000 1122000>;
103 opp-supported-hw = <0x06 0x0020>;
108 opp-hz = /bits/ 64 <500000000>;
109 opp-microvolt = <1100000 1078000 1122000>;
110 opp-supported-hw = <0x01 0xFFFF>;
114 opp-hz = /bits/ 64 <600000000>;
115 opp-microvolt = <1100000 1078000 1122000>;
116 opp-supported-hw = <0x06 0x0040>;
120 opp-hz = /bits/ 64 <600000000>;
121 opp-microvolt = <1200000 1176000 1224000>;
122 opp-supported-hw = <0x01 0xFFFF>;
126 opp-hz = /bits/ 64 <720000000>;
127 opp-microvolt = <1200000 1176000 1224000>;
128 opp-supported-hw = <0x06 0x0080>;
132 opp-hz = /bits/ 64 <720000000>;
133 opp-microvolt = <1260000 1234800 1285200>;
134 opp-supported-hw = <0x01 0xFFFF>;
138 opp-hz = /bits/ 64 <800000000>;
139 opp-microvolt = <1260000 1234800 1285200>;
140 opp-supported-hw = <0x06 0x0100>;
143 oppnitro-1000000000 {
144 opp-hz = /bits/ 64 <1000000000>;
145 opp-microvolt = <1325000 1298500 1351500>;
146 opp-supported-hw = <0x04 0x0200>;
151 compatible = "arm,cortex-a8-pmu";
153 reg = <0x4b000000 0x1000000>;
154 ti,hwmods = "debugss";
158 * The soc node represents the soc top level view. It is used for IPs
159 * that are not memory mapped in the MPU view or for the MPU itself.
162 compatible = "ti,omap-infra";
164 compatible = "ti,omap3-mpu";
166 pm-sram = <&pm_sram_code
172 * XXX: Use a flat representation of the AM33XX interconnect.
173 * The real AM33XX interconnect network is quite complex. Since
174 * it will not bring real advantage to represent that in DT
175 * for the moment, just use a fake OCP bus entry to represent
176 * the whole bus hierarchy.
179 compatible = "simple-bus";
180 #address-cells = <1>;
183 ti,hwmods = "l3_main";
185 l4_wkup: l4_wkup@44c00000 {
186 wkup_m3: wkup_m3@100000 {
187 compatible = "ti,am3352-wkup-m3";
188 reg = <0x100000 0x4000>,
190 reg-names = "umem", "dmem";
191 ti,hwmods = "wkup_m3";
192 ti,pm-firmware = "am335x-pm-firmware.elf";
195 l4_per: interconnect@48000000 {
197 l4_fw: interconnect@47c00000 {
199 l4_fast: interconnect@4a000000 {
201 l4_mpuss: interconnect@4b140000 {
204 intc: interrupt-controller@48200000 {
205 compatible = "ti,am33xx-intc";
206 interrupt-controller;
207 #interrupt-cells = <1>;
208 reg = <0x48200000 0x1000>;
211 target-module@49000000 {
212 compatible = "ti,sysc-omap4", "ti,sysc";
213 reg = <0x49000000 0x4>;
215 clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
217 #address-cells = <1>;
219 ranges = <0x0 0x49000000 0x10000>;
222 compatible = "ti,edma3-tpcc";
224 reg-names = "edma3_cc";
225 interrupts = <12 13 14>;
226 interrupt-names = "edma3_ccint", "edma3_mperr",
231 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
234 ti,edma-memcpy-channels = <20 21>;
238 target-module@49800000 {
239 compatible = "ti,sysc-omap4", "ti,sysc";
240 reg = <0x49800000 0x4>,
242 reg-names = "rev", "sysc";
243 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
244 ti,sysc-midle = <SYSC_IDLE_FORCE>;
245 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
247 clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
249 #address-cells = <1>;
251 ranges = <0x0 0x49800000 0x100000>;
254 compatible = "ti,edma3-tptc";
257 interrupt-names = "edma3_tcerrint";
261 target-module@49900000 {
262 compatible = "ti,sysc-omap4", "ti,sysc";
263 reg = <0x49900000 0x4>,
265 reg-names = "rev", "sysc";
266 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
267 ti,sysc-midle = <SYSC_IDLE_FORCE>;
268 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
270 clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
272 #address-cells = <1>;
274 ranges = <0x0 0x49900000 0x100000>;
277 compatible = "ti,edma3-tptc";
280 interrupt-names = "edma3_tcerrint";
284 target-module@49a00000 {
285 compatible = "ti,sysc-omap4", "ti,sysc";
286 reg = <0x49a00000 0x4>,
288 reg-names = "rev", "sysc";
289 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
290 ti,sysc-midle = <SYSC_IDLE_FORCE>;
291 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
293 clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
295 #address-cells = <1>;
297 ranges = <0x0 0x49a00000 0x100000>;
300 compatible = "ti,edma3-tptc";
303 interrupt-names = "edma3_tcerrint";
307 target-module@47810000 {
308 compatible = "ti,sysc-omap2", "ti,sysc";
309 reg = <0x478102fc 0x4>,
312 reg-names = "rev", "sysc", "syss";
313 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
314 SYSC_OMAP2_ENAWAKEUP |
315 SYSC_OMAP2_SOFTRESET |
316 SYSC_OMAP2_AUTOIDLE)>;
317 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
321 clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
323 #address-cells = <1>;
325 ranges = <0x0 0x47810000 0x1000>;
328 compatible = "ti,am335-sdhci";
329 ti,needs-special-reset;
337 compatible = "ti,omap4-i2c";
338 #address-cells = <1>;
341 reg = <0x44e0b000 0x1000>;
347 compatible = "ti,omap4-i2c";
348 #address-cells = <1>;
351 reg = <0x4802a000 0x1000>;
357 compatible = "ti,omap4-i2c";
358 #address-cells = <1>;
361 reg = <0x4819c000 0x1000>;
367 compatible = "ti,omap4-hsmmc";
370 ti,needs-special-reset;
371 ti,needs-special-hs-handling;
372 dmas = <&edma_xbar 24 0 0
374 dma-names = "tx", "rx";
376 reg = <0x48060000 0x1000>;
381 compatible = "ti,omap4-hsmmc";
383 ti,needs-special-reset;
386 dma-names = "tx", "rx";
388 reg = <0x481d8000 0x1000>;
393 compatible = "ti,omap3-wdt";
394 ti,hwmods = "wd_timer2";
395 reg = <0x44e35000 0x1000>;
400 compatible = "ti,am33xx-usb";
401 reg = <0x47400000 0x1000>;
403 #address-cells = <1>;
405 ti,hwmods = "usb_otg_hs";
407 usb_ctrl_mod: control@44e10620 {
408 compatible = "ti,am335x-usb-ctrl-module";
409 reg = <0x44e10620 0x10
411 reg-names = "phy_ctrl", "wakeup";
414 usb0_phy: usb-phy@47401300 {
415 compatible = "ti,am335x-usb-phy";
416 reg = <0x47401300 0x100>;
418 ti,ctrl_mod = <&usb_ctrl_mod>;
423 compatible = "ti,musb-am33xx";
424 reg = <0x47401400 0x400
426 reg-names = "mc", "control";
429 interrupt-names = "mc";
431 mentor,multipoint = <1>;
432 mentor,num-eps = <16>;
433 mentor,ram-bits = <12>;
434 mentor,power = <500>;
437 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
438 &cppi41dma 2 0 &cppi41dma 3 0
439 &cppi41dma 4 0 &cppi41dma 5 0
440 &cppi41dma 6 0 &cppi41dma 7 0
441 &cppi41dma 8 0 &cppi41dma 9 0
442 &cppi41dma 10 0 &cppi41dma 11 0
443 &cppi41dma 12 0 &cppi41dma 13 0
444 &cppi41dma 14 0 &cppi41dma 0 1
445 &cppi41dma 1 1 &cppi41dma 2 1
446 &cppi41dma 3 1 &cppi41dma 4 1
447 &cppi41dma 5 1 &cppi41dma 6 1
448 &cppi41dma 7 1 &cppi41dma 8 1
449 &cppi41dma 9 1 &cppi41dma 10 1
450 &cppi41dma 11 1 &cppi41dma 12 1
451 &cppi41dma 13 1 &cppi41dma 14 1>;
453 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
454 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
456 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
457 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
461 usb1_phy: usb-phy@47401b00 {
462 compatible = "ti,am335x-usb-phy";
463 reg = <0x47401b00 0x100>;
465 ti,ctrl_mod = <&usb_ctrl_mod>;
470 compatible = "ti,musb-am33xx";
471 reg = <0x47401c00 0x400
473 reg-names = "mc", "control";
475 interrupt-names = "mc";
477 mentor,multipoint = <1>;
478 mentor,num-eps = <16>;
479 mentor,ram-bits = <12>;
480 mentor,power = <500>;
483 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
484 &cppi41dma 17 0 &cppi41dma 18 0
485 &cppi41dma 19 0 &cppi41dma 20 0
486 &cppi41dma 21 0 &cppi41dma 22 0
487 &cppi41dma 23 0 &cppi41dma 24 0
488 &cppi41dma 25 0 &cppi41dma 26 0
489 &cppi41dma 27 0 &cppi41dma 28 0
490 &cppi41dma 29 0 &cppi41dma 15 1
491 &cppi41dma 16 1 &cppi41dma 17 1
492 &cppi41dma 18 1 &cppi41dma 19 1
493 &cppi41dma 20 1 &cppi41dma 21 1
494 &cppi41dma 22 1 &cppi41dma 23 1
495 &cppi41dma 24 1 &cppi41dma 25 1
496 &cppi41dma 26 1 &cppi41dma 27 1
497 &cppi41dma 28 1 &cppi41dma 29 1>;
499 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
500 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
502 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
503 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
507 cppi41dma: dma-controller@2000 {
508 compatible = "ti,am3359-cppi41";
509 reg = <0x0000 0x1000>,
513 reg-names = "glue", "controller", "scheduler", "queuemgr";
515 interrupt-names = "glue";
517 #dma-channels = <30>;
518 #dma-requests = <256>;
522 mac: ethernet@4a100000 {
523 compatible = "ti,am335x-cpsw","ti,cpsw";
524 ti,hwmods = "cpgmac0";
525 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
526 clock-names = "fck", "cpts";
527 cpdma_channels = <8>;
528 ale_entries = <1024>;
529 bd_ram_size = <0x2000>;
530 mac_control = <0x20>;
533 cpts_clock_mult = <0x80000000>;
534 cpts_clock_shift = <29>;
535 reg = <0x4a100000 0x800
537 #address-cells = <1>;
545 interrupts = <40 41 42 43>;
547 syscon = <&scm_conf>;
550 davinci_mdio: mdio@4a101000 {
551 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
552 #address-cells = <1>;
554 ti,hwmods = "davinci_mdio";
555 bus_freq = <1000000>;
556 reg = <0x4a101000 0x100>;
560 cpsw_emac0: slave@4a100200 {
561 /* Filled in by U-Boot */
562 mac-address = [ 00 00 00 00 00 00 ];
565 cpsw_emac1: slave@4a100300 {
566 /* Filled in by U-Boot */
567 mac-address = [ 00 00 00 00 00 00 ];
570 phy_sel: cpsw-phy-sel@44e10650 {
571 compatible = "ti,am3352-cpsw-phy-sel";
572 reg= <0x44e10650 0x4>;
573 reg-names = "gmii-sel";
577 ocmcram: sram@40300000 {
578 compatible = "mmio-sram";
579 reg = <0x40300000 0x10000>; /* 64k */
580 ranges = <0x0 0x40300000 0x10000>;
581 #address-cells = <1>;
584 pm_sram_code: pm-code-sram@0 {
585 compatible = "ti,sram";
590 pm_sram_data: pm-data-sram@1000 {
591 compatible = "ti,sram";
592 reg = <0x1000 0x1000>;
597 emif: emif@4c000000 {
598 compatible = "ti,emif-am3352";
599 reg = <0x4c000000 0x1000000>;
602 sram = <&pm_sram_code
607 gpmc: gpmc@50000000 {
608 compatible = "ti,am3352-gpmc";
611 reg = <0x50000000 0x2000>;
616 gpmc,num-waitpins = <2>;
617 #address-cells = <2>;
619 interrupt-controller;
620 #interrupt-cells = <2>;
626 sham_target: target-module@53100000 {
627 compatible = "ti,sysc-omap3-sham", "ti,sysc";
628 reg = <0x53100100 0x4>,
631 reg-names = "rev", "sysc", "syss";
632 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
633 SYSC_OMAP2_AUTOIDLE)>;
634 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
638 /* Domains (P, C): per_pwrdm, l3_clkdm */
639 clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
641 #address-cells = <1>;
643 ranges = <0x0 0x53100000 0x1000>;
646 compatible = "ti,omap4-sham";
654 aes_target: target-module@53500000 {
655 compatible = "ti,sysc-omap2", "ti,sysc";
656 reg = <0x53500080 0x4>,
659 reg-names = "rev", "sysc", "syss";
660 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
661 SYSC_OMAP2_AUTOIDLE)>;
662 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
665 <SYSC_IDLE_SMART_WKUP>;
667 /* Domains (P, C): per_pwrdm, l3_clkdm */
668 clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
670 #address-cells = <1>;
672 ranges = <0x0 0x53500000 0x1000>;
675 compatible = "ti,omap4-aes";
680 dma-names = "tx", "rx";
684 target-module@56000000 {
685 compatible = "ti,sysc-omap4", "ti,sysc";
686 reg = <0x5600fe00 0x4>,
688 reg-names = "rev", "sysc";
689 ti,sysc-midle = <SYSC_IDLE_FORCE>,
692 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
695 clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
697 resets = <&prm_gfx 0>;
698 reset-names = "rstctrl";
699 #address-cells = <1>;
701 ranges = <0 0x56000000 0x1000000>;
704 * Closed source PowerVR driver, no child device
705 * binding or driver in mainline
711 #include "am33xx-l4.dtsi"
712 #include "am33xx-clocks.dtsi"
716 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
722 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
727 prm_device: prm@f00 {
728 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
734 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
735 reg = <0x1100 0x100>;