arch/arm/dts/am335x-sl50.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/
   4  */
   5 /dts-v1/;
   6
   7 #include "am33xx.dtsi"
   8
   9 / {
  10         model = "Toby Churchill SL50 Series";
  11         compatible = "tcl,am335x-sl50", "ti,am33xx";
  12
  13         cpus {
  14                 cpu@0 {
  15                         cpu0-supply = <&dcdc2_reg>;
  16                 };
  17         };
  18
  19         memory@80000000 {
  20                 device_type = "memory";
  21                 reg = <0x80000000 0x20000000>; /* 512 MB */
  22         };
  23
  24         chosen {
  25                 stdout-path = &uart0;
  26         };
  27
  28         leds {
  29                 compatible = "gpio-leds";
  30                 pinctrl-names = "default";
  31                 pinctrl-0 = <&led_pins>;
  32
  33                 led0 {
  34                         label = "sl50:green:usr0";
  35                         gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
  36                         default-state = "off";
  37                 };
  38
  39                 led1 {
  40                         label = "sl50:red:usr1";
  41                         gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
  42                         default-state = "off";
  43                 };
  44
  45                 led2 {
  46                         label = "sl50:green:usr2";
  47                         gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
  48                         default-state = "off";
  49                 };
  50
  51                 led3 {
  52                         label = "sl50:red:usr3";
  53                         gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
  54                         default-state = "off";
  55                 };
  56         };
  57
  58         backlight0: disp0 {
  59                 compatible = "pwm-backlight";
  60                 pwms = <&ehrpwm1 0 500000 0>;
  61                 brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
  62                 default-brightness-level = <6>;
  63         };
  64
  65         backlight1: disp1 {
  66                 compatible = "pwm-backlight";
  67                 pwms = <&ehrpwm1 1 500000 0>;
  68                 brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
  69                 default-brightness-level = <6>;
  70         };
  71
  72         clocks {
  73                 compatible = "simple-bus";
  74                 #address-cells = <1>;
  75                 #size-cells = <0>;
  76
  77                 /* audio external oscillator */
  78                 tlv320aic3x_mclk: oscillator@0 {
  79                         compatible = "fixed-clock";
  80                         #clock-cells = <0>;
  81                         clock-frequency  = <24576000>;  /* 24.576MHz */
  82                 };
  83         };
  84
  85         sound {
  86                 compatible = "ti,da830-evm-audio";
  87                 ti,model = "AM335x-SL50";
  88                 ti,audio-codec = <&audio_codec>;
  89                 ti,mcasp-controller = <&mcasp0>;
  90
  91                 clocks = <&tlv320aic3x_mclk>;
  92                 clock-names = "mclk";
  93
  94                 ti,audio-routing =
  95                         "Headphone Jack",       "HPLOUT",
  96                         "Headphone Jack",       "HPROUT",
  97                         "LINE1R",               "Line In",
  98                         "LINE1L",               "Line In";
  99         };
 100
 101         emmc_pwrseq: pwrseq@0 {
 102                 compatible = "mmc-pwrseq-emmc";
 103                 pinctrl-names = "default";
 104                 pinctrl-0 = <&emmc_pwrseq_pins>;
 105                 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
 106         };
 107
 108         vmmcsd_fixed: fixedregulator0 {
 109                 compatible = "regulator-fixed";
 110                 regulator-name = "vmmcsd_fixed";
 111                 regulator-min-microvolt = <3300000>;
 112                 regulator-max-microvolt = <3300000>;
 113         };
 114 };
 115
 116 &am33xx_pinmux {
 117         pinctrl-names = "default";
 118         pinctrl-0 = <&lwb_pins>;
 119
 120         led_pins: pinmux_led_pins {
 121                 pinctrl-single,pins = <
 122                         AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7)     /* gpmc_a5.gpio1_21 */
 123                         AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7)     /* gpmc_a6.gpio1_22 */
 124                         AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7)     /* gpmc_a7.gpio1_23 */
 125                         AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7)     /* gpmc_a8.gpio1_24 */
 126                 >;
 127         };
 128
 129         uart0_pins: pinmux_uart0_pins {
 130                 pinctrl-single,pins = <
 131                         AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
 132                         AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
 133                 >;
 134         };
 135
 136         uart1_pins: pinmux_uart1_pins {
 137                 pinctrl-single,pins = <
 138                         AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
 139                         AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
 140                 >;
 141         };
 142
 143         uart4_pins: pinmux_uart4_pins {
 144                 pinctrl-single,pins = <
 145                         AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)       /* gpmc_wait0.uart4_rxd */
 146                         AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6)    /* gpmc_wpn.uart4_txd */
 147                 >;
 148         };
 149
 150         i2c0_pins: pinmux_i2c0_pins {
 151                 pinctrl-single,pins = <
 152                         AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
 153                         AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
 154                 >;
 155         };
 156
 157         i2c2_pins: pinmux_i2c2_pins {
 158                 pinctrl-single,pins = <
 159                         AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_ctsn.i2c2_sda */
 160                         AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_rtsn.i2c2_scl */
 161                 >;
 162         };
 163
 164         cpsw_default: cpsw_default {
 165                 pinctrl-single,pins = <
 166                         /* Slave 1 */
 167                         AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxerr.mii1_rxerr */
 168                         AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txen.mii1_txen */
 169                         AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxdv.mii1_rxdv */
 170                         AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd3.mii1_txd3 */
 171                         AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd2.mii1_txd2 */
 172                         AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd1.mii1_txd1 */
 173                         AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* mii1_txd0.mii1_txd0 */
 174                         AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_txclk.mii1_txclk */
 175                         AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxclk.mii1_rxclk */
 176                         AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd3.mii1_rxd3 */
 177                         AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd2.mii1_rxd2 */
 178                         AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd1.mii1_rxd1 */
 179                         AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0)       /* mii1_rxd0.mii1_rxd0 */
 180                 >;
 181         };
 182
 183         cpsw_sleep: cpsw_sleep {
 184                 pinctrl-single,pins = <
 185                         /* Slave 1 reset value */
 186                         AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
 187                         AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 188                         AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 189                         AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 190                         AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
 191                         AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 192                         AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 193                         AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 194                         AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
 195                         AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
 196                         AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
 197                         AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 198                         AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 199                 >;
 200         };
 201
 202         davinci_mdio_default: davinci_mdio_default {
 203                 pinctrl-single,pins = <
 204                         /* MDIO */
 205                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 206                         AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 207                 >;
 208         };
 209
 210         davinci_mdio_sleep: davinci_mdio_sleep {
 211                 pinctrl-single,pins = <
 212                         /* MDIO reset value */
 213                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 214                         AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 215                 >;
 216         };
 217
 218         mmc1_pins: pinmux_mmc1_pins {
 219                 pinctrl-single,pins = <
 220                         AM33XX_IOPAD(0x96c, PIN_INPUT | MUX_MODE7)              /* uart0_rtsn.gpio1_9 */
 221                 >;
 222         };
 223
 224         emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins {
 225                 pinctrl-single,pins = <
 226                         AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_a4.gpio1_20 */
 227                 >;
 228         };
 229
 230         emmc_pins: pinmux_emmc_pins {
 231                 pinctrl-single,pins = <
 232                         AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2)       /* gpmc_csn1.mmc1_clk */
 233                         AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2)       /* gpmc_csn2.mmc1_cmd */
 234                         AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad0.mmc1_dat0 */
 235                         AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad1.mmc1_dat1 */
 236                         AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad2.mmc1_dat2 */
 237                         AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad3.mmc1_dat3 */
 238                         AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad4.mmc1_dat4 */
 239                         AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad5.mmc1_dat5 */
 240                         AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad6.mmc1_dat6 */
 241                         AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad7.mmc1_dat7 */
 242                 >;
 243         };
 244
 245         audio_pins: pinmux_audio_pins {
 246                 pinctrl-single,pins = <
 247                         AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* mcasp0_ahcklx.mcasp0_ahclkx */
 248                         AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* mcasp0_fsx.mcasp0_fsx */
 249                         AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* mcasp0_aclkx.mcasp0_aclkx */
 250                         AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* mcasp0_axr0.mcasp0_axr0 */
 251                         AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mcasp0_ahclkr.mcasp0_axr2 */
 252                 >;
 253         };
 254
 255         ehrpwm1_pins: pinmux_ehrpwm1a_pins {
 256                 pinctrl-single,pins = <
 257                         AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE6)     /* gpmc_a2.ehrpwm1a */
 258                         AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6)     /* gpmc_a3.ehrpwm1b */
 259                 >;
 260         };
 261
 262         spi0_pins: pinmux_spi0_pins {
 263                 pinctrl-single,pins = <
 264                         AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_MOSI - spi0_d0.spi0_d0 */
 265                         AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_MISO - spi0_d1.spi0_d1 */
 266                         AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_CLK  - spi0_clk.spi0_clk */
 267                         AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_CS0 (NBATTSS) - spi0_cs0.spi0_cs0 */
 268                         AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_CS1 (FPGA_FLASH_NCS) - spi0_cs1.spi0_cs1 */
 269                 >;
 270         };
 271
 272         lwb_pins: pinmux_lwb_pins {
 273                 pinctrl-single,pins = <
 274                         AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7)     /* SoundPA_en - mcasp0_fsr.gpio3_19 */
 275                         AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7)     /* nKbdOnC - gpmc_ad10.gpio0_26 */
 276                         AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7)       /* nKbdInt - gpmc_ad12.gpio1_12 */
 277                         AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7)       /* nKbdReset - gpmc_ad13.gpio1_13 */
 278                         AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7)       /* nDispReset - gpmc_ad14.gpio1_14 */
 279                         AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7)       /* USB1_enPower - gpmc_a1.gpio1_17 */
 280                         /* PDI Bus - Battery system */
 281                         AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7)       /* nBattReset  gpmc_a0.gpio1_16 */
 282                         AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7)       /* BattPDIData gpmc_ad15.gpio1_15 */
 283                 >;
 284         };
 285 };
 286
 287 &i2c0 {
 288         status = "okay";
 289         pinctrl-names = "default";
 290         pinctrl-0 = <&i2c0_pins>;
 291
 292         clock-frequency = <400000>;
 293
 294         tps: tps@24 {
 295                 reg = <0x24>;
 296         };
 297
 298         bq32000: rtc@68 {
 299                 compatible = "ti,bq32000";
 300                 trickle-resistor-ohms = <1120>;
 301                 reg = <0x68>;
 302         };
 303
 304         eeprom: eeprom@50 {
 305                 compatible = "atmel,24c256";
 306                 reg = <0x50>;
 307         };
 308
 309         gpio_exp: mcp23017@20 {
 310                 compatible = "microchip,mcp23017";
 311                 reg = <0x20>;
 312         };
 313
 314 };
 315
 316 &i2c2 {
 317         status = "okay";
 318         pinctrl-names = "default";
 319         pinctrl-0 = <&i2c2_pins>;
 320
 321         clock-frequency = <400000>;
 322
 323         audio_codec: tlv320aic3106@1b {
 324                 status = "okay";
 325                 compatible = "ti,tlv320aic3106";
 326                 reg = <0x1b>;
 327
 328                 AVDD-supply = <&ldo4_reg>;
 329                 IOVDD-supply = <&ldo4_reg>;
 330                 DRVDD-supply = <&ldo4_reg>;
 331                 DVDD-supply = <&ldo3_reg>;
 332         };
 333
 334         /* Ambient Light Sensor */
 335         als: isl29023@44 {
 336                 compatible = "isil,isl29023";
 337                 reg = <0x44>;
 338         };
 339 };
 340
 341 &rtc {
 342         status = "disabled";
 343 };
 344
 345 &usb {
 346         status = "okay";
 347 };
 348
 349 &usb_ctrl_mod {
 350         status = "okay";
 351 };
 352
 353 &usb0_phy {
 354         status = "okay";
 355 };
 356
 357 &usb1_phy {
 358         status = "okay";
 359 };
 360
 361 &usb0 {
 362         status = "okay";
 363         dr_mode = "peripheral";
 364 };
 365
 366 &usb1 {
 367         status = "okay";
 368         dr_mode = "host";
 369 };
 370
 371 &cppi41dma  {
 372         status = "okay";
 373 };
 374
 375 &mmc1 {
 376         status = "okay";
 377         pinctrl-names = "default";
 378         pinctrl-0 = <&mmc1_pins>;
 379         bus-width = <4>;
 380         cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
 381         vmmc-supply = <&vmmcsd_fixed>;
 382 };
 383
 384 &mmc2 {
 385         status = "okay";
 386         pinctrl-names = "default";
 387         pinctrl-0 = <&emmc_pins>;
 388         bus-width = <8>;
 389         vmmc-supply = <&vmmcsd_fixed>;
 390         mmc-pwrseq = <&emmc_pwrseq>;
 391 };
 392
 393 &mcasp0 {
 394         status = "okay";
 395         pinctrl-names = "default";
 396         pinctrl-0 = <&audio_pins>;
 397
 398         op-mode = <0>;  /* MCASP_ISS_MODE */
 399         tdm-slots = <2>;
 400         serial-dir = <
 401                 2 0 1 0
 402                 0 0 0 0
 403                 0 0 0 0
 404                 0 0 0 0
 405         >;
 406         tx-num-evt = <1>;
 407         rx-num-evt = <1>;
 408 };
 409
 410 &uart0 {
 411         status = "okay";
 412         pinctrl-names = "default";
 413         pinctrl-0 = <&uart0_pins>;
 414 };
 415
 416 &uart1 {
 417         status = "okay";
 418         pinctrl-names = "default";
 419         pinctrl-0 = <&uart1_pins>;
 420 };
 421
 422 &uart4 {
 423         status = "okay";
 424         pinctrl-names = "default";
 425         pinctrl-0 = <&uart4_pins>;
 426 };
 427
 428 &spi0 {
 429         status = "okay";
 430         pinctrl-names = "default";
 431         pinctrl-0 = <&spi0_pins>;
 432
 433         flash: n25q032@1 {
 434                 #address-cells = <1>;
 435                 #size-cells = <1>;
 436                 compatible = "micron,n25q032";
 437                 reg = <1>;
 438                 spi-max-frequency = <5000000>;
 439         };
 440 };
 441
 442 #include "tps65217.dtsi"
 443
 444 &tps {
 445         ti,pmic-shutdown-controller;
 446
 447         interrupt-parent = <&intc>;
 448         interrupts = <7>;       /* NNMI */
 449
 450         regulators {
 451                 dcdc1_reg: regulator@0 {
 452                         /* VDDS_DDR */
 453                         regulator-min-microvolt = <1500000>;
 454                         regulator-max-microvolt = <1500000>;
 455                         regulator-always-on;
 456                 };
 457
 458                 dcdc2_reg: regulator@1 {
 459                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 460                         regulator-name = "vdd_mpu";
 461                         regulator-min-microvolt = <925000>;
 462                         regulator-max-microvolt = <1325000>;
 463                         regulator-boot-on;
 464                         regulator-always-on;
 465                 };
 466
 467                 dcdc3_reg: regulator@2 {
 468                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
 469                         regulator-name = "vdd_core";
 470                         regulator-min-microvolt = <925000>;
 471                         regulator-max-microvolt = <1150000>;
 472                         regulator-boot-on;
 473                         regulator-always-on;
 474                 };
 475
 476                 ldo1_reg: regulator@3 {
 477                         /* VRTC / VIO / VDDS*/
 478                         regulator-always-on;
 479                         regulator-min-microvolt = <1800000>;
 480                         regulator-max-microvolt = <1800000>;
 481                 };
 482
 483                 ldo2_reg: regulator@4 {
 484                         /* VDD_3V3AUX */
 485                         regulator-always-on;
 486                         regulator-min-microvolt = <3300000>;
 487                         regulator-max-microvolt = <3300000>;
 488                 };
 489
 490                 ldo3_reg: regulator@5 {
 491                         /* VDD_1V8 */
 492                         regulator-min-microvolt = <1800000>;
 493                         regulator-max-microvolt = <1800000>;
 494                         regulator-always-on;
 495                 };
 496
 497                 ldo4_reg: regulator@6 {
 498                         /* VDD_3V3A */
 499                         regulator-min-microvolt = <3300000>;
 500                         regulator-max-microvolt = <3300000>;
 501                         regulator-always-on;
 502                 };
 503         };
 504 };
 505
 506 &cpsw_emac0 {
 507         phy-mode = "mii";
 508         phy-handle = <&ethphy0>;
 509 };
 510
 511 &mac {
 512         status = "okay";
 513         pinctrl-names = "default", "sleep";
 514         pinctrl-0 = <&cpsw_default>;
 515         pinctrl-1 = <&cpsw_sleep>;
 516 };
 517
 518 &davinci_mdio {
 519         status = "okay";
 520         pinctrl-names = "default", "sleep";
 521         pinctrl-0 = <&davinci_mdio_default>;
 522         pinctrl-1 = <&davinci_mdio_sleep>;
 523         reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 524         reset-delay-us = <100>;   /* PHY datasheet states 100us min */
 525
 526         ethphy0: ethernet-phy@0 {
 527                 reg = <0>;
 528         };
 529 };
 530
 531 &sham {
 532         status = "okay";
 533 };
 534
 535 &aes {
 536         status = "okay";
 537 };
 538
 539 &epwmss1 {
 540         status = "okay";
 541 };
 542
 543 &ehrpwm1 {
 544         status = "okay";
 545         pinctrl-names = "default";
 546         pinctrl-0 = <&ehrpwm1_pins>;
 547 };