arch/arm/dts/am335x-pdu001.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * pdu001.dts
   4  *
   5  * EETS GmbH PDU001 board device tree file
   6  *
   7  * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
   8  *
   9  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  10  */
  11
  12 /dts-v1/;
  13
  14 #include "am33xx.dtsi"
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/leds/leds-pca9532.h>
  17
  18 / {
  19         model = "EETS,PDU001";
  20         compatible = "eets,pdu001", "ti,am33xx";
  21
  22         chosen {
  23                 stdout-path = &uart3;
  24         };
  25
  26         cpus {
  27                 cpu@0 {
  28                         cpu0-supply = <&vdd1_reg>;
  29                 };
  30         };
  31
  32         memory {
  33                 device_type = "memory";
  34                 reg = <0x80000000 0x10000000>; /* 256 MB */
  35         };
  36
  37         vbat: fixedregulator@0 {
  38                 compatible = "regulator-fixed";
  39                 regulator-name = "vbat";
  40                 regulator-min-microvolt = <3600000>;
  41                 regulator-max-microvolt = <3600000>;
  42                 regulator-boot-on;
  43         };
  44
  45         lis3_reg: fixedregulator@1 {
  46                 compatible = "regulator-fixed";
  47                 regulator-name = "lis3_reg";
  48                 regulator-boot-on;
  49         };
  50
  51         panel {
  52                 compatible = "ti,tilcdc,panel";
  53                 status = "okay";
  54                 pinctrl-names = "default";
  55                 pinctrl-0 = <&lcd_pins_s0>;
  56                 panel-info {
  57                         ac-bias           = <255>;
  58                         ac-bias-intrpt    = <0>;
  59                         dma-burst-sz      = <16>;
  60                         bpp               = <16>;
  61                         fdd               = <0x80>;
  62                         sync-edge         = <0>;
  63                         sync-ctrl         = <1>;
  64                         raster-order      = <0>;
  65                         fifo-th           = <0>;
  66                 };
  67
  68                 display-timings {
  69                         240x320p16 {
  70                                 clock-frequency = <6500000>;
  71                                 hactive = <240>;
  72                                 vactive = <320>;
  73                                 hfront-porch = <6>;
  74                                 hback-porch = <6>;
  75                                 hsync-len = <1>;
  76                                 vback-porch = <6>;
  77                                 vfront-porch = <6>;
  78                                 vsync-len = <1>;
  79                                 hsync-active = <0>;
  80                                 vsync-active = <0>;
  81                                 pixelclk-active = <1>;
  82                                 de-active = <0>;
  83                         };
  84                 };
  85         };
  86 };
  87
  88 &am33xx_pinmux {
  89         pinctrl-names = "default";
  90         pinctrl-0 = <&clkout2_pin>;
  91
  92         i2c0_pins: pinmux_i2c0_pins {
  93                 pinctrl-single,pins = <
  94                         AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
  95                         AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
  96                 >;
  97         };
  98
  99         i2c1_pins: pinmux_i2c1_pins {
 100                 pinctrl-single,pins = <
 101                         AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_d1.i2c1_sda */
 102                         AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_cs0.i2c1_scl */
 103                 >;
 104         };
 105
 106         i2c2_pins: pinmux_i2c2_pins {
 107                 pinctrl-single,pins = <
 108                         AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_clk.i2c2_sda */
 109                         AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_d0.i2c2_scl */
 110                 >;
 111         };
 112
 113         spi1_pins: pinmux_spi1_pins {
 114                 pinctrl-single,pins = <
 115                         AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE3)             /* mcasp0_aclkx.spi1_sclk */
 116                         AM33XX_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3)             /* mcasp0_fsx.spi1_d0 */
 117                         AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE3)     /* mcasp0_axr0.spi1_d1 */
 118                         AM33XX_IOPAD(0x99C, PIN_OUTPUT | MUX_MODE3)             /* mcasp0_ahclkr.spi1_cs0 */
 119                 >;
 120         };
 121
 122         uart0_pins: pinmux_uart0_pins {
 123                 pinctrl-single,pins = <
 124                         AM33XX_IOPAD(0x96C, PIN_OUTPUT | MUX_MODE7)             /* uart0_rtsn.gpio1_9 */
 125                         AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
 126                         AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
 127                 >;
 128         };
 129
 130         uart1_pins: pinmux_uart1_pins {
 131                 pinctrl-single,pins = <
 132                         AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
 133                         AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
 134                 >;
 135         };
 136
 137         uart3_pins: pinmux_uart3_pins {
 138                 pinctrl-single,pins = <
 139                         AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE1)       /* spi0_cs1.uart3_rxd */
 140                         AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* ecap0_in_pwm0_out.uart3_txd */
 141                 >;
 142         };
 143
 144         clkout2_pin: pinmux_clkout2_pin {
 145                 pinctrl-single,pins = <
 146                         AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr1.clkout2 */
 147                 >;
 148         };
 149
 150         cpsw_default: cpsw_default {
 151                 pinctrl-single,pins = <
 152                         /* Port 1 (emac0) */
 153                         AM33XX_IOPAD(0x908, PIN_INPUT | MUX_MODE0)              /* mii1_col.mii1_col */
 154                         AM33XX_IOPAD(0x90C, PIN_INPUT | MUX_MODE0)              /* mii1_crs.mii1_crs */
 155                         AM33XX_IOPAD(0x910, PIN_INPUT | MUX_MODE0)              /* mii1_rxer.mii1_rxer */
 156                         AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE0)             /* mii1_txen.mii1_txen */
 157                         AM33XX_IOPAD(0x918, PIN_INPUT | MUX_MODE0)              /* mii1_rxdv.mii1_rxdv */
 158                         AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE0)             /* mii1_txd3.mii1_txd3 */
 159                         AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE0)             /* mii1_txd2.mii1_txd2 */
 160                         AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE0)             /* mii1_txd1.mii1_txd1 */
 161                         AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE0)             /* mii1_txd0.mii1_txd0 */
 162                         AM33XX_IOPAD(0x92c, PIN_INPUT | MUX_MODE0)              /* mii1_txclk.mii1_txclk */
 163                         AM33XX_IOPAD(0x930, PIN_INPUT | MUX_MODE0)              /* mii1_rxclk.mii1_rxclk */
 164                         AM33XX_IOPAD(0x934, PIN_INPUT | MUX_MODE0)              /* mii1_rxd3.mii1_rxd3 */
 165                         AM33XX_IOPAD(0x938, PIN_INPUT | MUX_MODE0)              /* mii1_rxd2.mii1_rxd2 */
 166                         AM33XX_IOPAD(0x93c, PIN_INPUT | MUX_MODE0)              /* mii1_rxd1.mii1_rxd1 */
 167                         AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE0)              /* mii1_rxd0.mii1_rxd0 */
 168
 169                         /* Port 2 (emac1) */
 170                         AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1)             /* mii2_txen.gpmc_a0 */
 171                         AM33XX_IOPAD(0x844, PIN_INPUT | MUX_MODE1)              /* mii2_rxdv.gpmc_a1 */
 172                         AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1)             /* mii2_txd3.gpmc_a2 */
 173                         AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1)             /* mii2_txd2.gpmc_a3 */
 174                         AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1)             /* mii2_txd1.gpmc_a4 */
 175                         AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1)             /* mii2_txd0.gpmc_a5 */
 176                         AM33XX_IOPAD(0x858, PIN_INPUT | MUX_MODE1)              /* mii2_txclk.gpmc_a6 */
 177                         AM33XX_IOPAD(0x85c, PIN_INPUT | MUX_MODE1)              /* mii2_rxclk.gpmc_a7 */
 178                         AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE1)              /* mii2_rxd3.gpmc_a8 */
 179                         AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE1)              /* mii2_rxd2.gpmc_a9 */
 180                         AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE1)              /* mii2_rxd1.gpmc_a10 */
 181                         AM33XX_IOPAD(0x86C, PIN_INPUT | MUX_MODE1)              /* mii2_rxd0.gpmc_a11 */
 182                         AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE1)              /* mii2_crs.gpmc_wait0 */
 183                         AM33XX_IOPAD(0x874, PIN_INPUT | MUX_MODE1)              /* mii2_rxer.gpmc_wpn */
 184                         AM33XX_IOPAD(0x878, PIN_INPUT | MUX_MODE1)              /* mii2_col.gpmc_ben1 */
 185                 >;
 186         };
 187
 188         davinci_mdio_default: davinci_mdio_default {
 189                 pinctrl-single,pins = <
 190                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 191                         AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 192                 >;
 193         };
 194
 195         mmc1_pins: pinmux_mmc1_pins {
 196                 /* eMMC */
 197                 pinctrl-single,pins = <
 198                         AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat3 */
 199                         AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat2 */
 200                         AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat1 */
 201                         AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat0 */
 202                         AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_clk */
 203                         AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_cmd */
 204                 >;
 205         };
 206
 207         mmc2_pins: pinmux_mmc2_pins {
 208                 /* SD cardcage */
 209                 pinctrl-single,pins = <
 210                         AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad3.mmc1_dat3 */
 211                         AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad2.mmc1_dat2 */
 212                         AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad1.mmc1_dat1 */
 213                         AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad0.mmc1_dat0 */
 214                         AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2)       /* gpmc_csn1.mmc1_clk */
 215                         AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2)       /* gpmc_csn2.mmc1_cmd */
 216                         /* card change signal for frontpanel SD cardcage */
 217                         AM33XX_IOPAD(0x890, PIN_INPUT | MUX_MODE7)              /* gpmc_advn_ale.gpio2_2 */
 218                 >;
 219         };
 220
 221         lcd_pins_s0: lcd_pins_s0 {
 222                 pinctrl-single,pins = <
 223                         AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data0.lcd_data0 */
 224                         AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data1.lcd_data1 */
 225                         AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data2.lcd_data2 */
 226                         AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)             /* lcd_data3.lcd_data3 */
 227                         AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data4.lcd_data4 */
 228                         AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data5.lcd_data5 */
 229                         AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data6.lcd_data6 */
 230                         AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data7.lcd_data7 */
 231                         AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data8.lcd_data8 */
 232                         AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data9.lcd_data9 */
 233                         AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data10.lcd_data10 */
 234                         AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data11.lcd_data11 */
 235                         AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data12.lcd_data12 */
 236                         AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data13.lcd_data13 */
 237                         AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data14.lcd_data14 */
 238                         AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data15.lcd_data15 */
 239                         AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)             /* lcd_vsync.lcd_vsync */
 240                         AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)             /* lcd_hsync.lcd_hsync */
 241                         AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)             /* lcd_pclk.lcd_pclk */
 242                         AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)             /* lcd_ac_bias_en.lcd_ac_bias_en */
 243                 >;
 244         };
 245
 246         dcan0_pins: pinmux_dcan0_pins {
 247                 pinctrl-single,pins = <
 248                         AM33XX_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2)             /* uart1_ctsn.d_can0_tx */
 249                         AM33XX_IOPAD(0x97c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* uart1_rtsn.d_can0_rx */
 250                 >;
 251         };
 252 };
 253
 254 &uart0 {
 255         pinctrl-names = "default";
 256         pinctrl-0 = <&uart0_pins>;
 257
 258         rts-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
 259         rs485-rts-active-high;
 260         rs485-rts-delay = <0 0>;
 261         linux,rs485-enabled-at-boot-time;
 262
 263         status = "okay";
 264 };
 265
 266 &uart1 {
 267         pinctrl-names = "default";
 268         pinctrl-0 = <&uart1_pins>;
 269
 270         status = "okay";
 271 };
 272
 273 &uart3 {
 274         pinctrl-names = "default";
 275         pinctrl-0 = <&uart3_pins>;
 276
 277         status = "okay";
 278 };
 279
 280 &i2c0 {
 281         pinctrl-names = "default";
 282         pinctrl-0 = <&i2c0_pins>;
 283
 284         status = "okay";
 285         clock-frequency = <400000>;
 286
 287         tps: tps@2d {
 288                 reg = <0x2d>;
 289         };
 290
 291         m2_eeprom: m2_eeprom@50 {
 292                 compatible = "atmel,24c256";
 293                 reg = <0x50>;
 294                 status = "okay";
 295         };
 296 };
 297
 298 &i2c1 {
 299         pinctrl-names = "default";
 300         pinctrl-0 = <&i2c1_pins>;
 301
 302         status = "okay";
 303         clock-frequency = <100000>;
 304
 305         board_24aa025e48: board_24aa025e48@50 {
 306                 compatible = "microchip,24aa025e48";
 307                 reg = <0x50>;
 308         };
 309
 310         backplane_24aa025e48: backplane_24aa025e48@53 {
 311                 compatible = "microchip,24aa025e48";
 312                 reg = <0x53>;
 313         };
 314
 315         pca9532: pca9532@60 {
 316                 compatible = "nxp,pca9532";
 317                 reg = <0x60>;
 318                 psc0 = <0x97>;
 319                 pwm0 = <0x80>;
 320                 psc1 = <0x97>;
 321                 pwm1 = <0x10>;
 322
 323                 run.red@0 {
 324                         type = <PCA9532_TYPE_LED>;
 325                 };
 326                 run.green@1 {
 327                         type = <PCA9532_TYPE_LED>;
 328                         default-state = "on";
 329                 };
 330                 s2.red@2 {
 331                         type = <PCA9532_TYPE_LED>;
 332                 };
 333                 s2.green@3 {
 334                         type = <PCA9532_TYPE_LED>;
 335                 };
 336                 s1.yellow@4 {
 337                         type = <PCA9532_TYPE_LED>;
 338                 };
 339                 s1.green@5 {
 340                         type = <PCA9532_TYPE_LED>;
 341                 };
 342         };
 343
 344         pca9530: pca9530@61 {
 345                 compatible = "nxp,pca9530";
 346                 reg = <0x61>;
 347
 348                 tft-panel@0 {
 349                         type = <PCA9532_TYPE_LED>;
 350                         linux,default-trigger = "backlight";
 351                         default-state = "on";
 352                 };
 353         };
 354
 355         mcp79400: mcp79400@6f {
 356                 compatible = "microchip,mcp7940x";
 357                 reg = <0x6f>;
 358         };
 359 };
 360
 361 &i2c2 {
 362         pinctrl-names = "default";
 363         pinctrl-0 = <&i2c2_pins>;
 364
 365         status = "okay";
 366         clock-frequency = <100000>;
 367 };
 368
 369 &spi1 {
 370         pinctrl-names = "default";
 371         pinctrl-0 = <&spi1_pins>;
 372         ti,pindir-d0-out-d1-in;
 373         status = "okay";
 374
 375         cfaf240320a032t {
 376                 compatible = "orise,otm3225a";
 377                 reg = <0>;
 378                 spi-max-frequency = <1000000>;
 379                 // SPI mode 3
 380                 spi-cpol;
 381                 spi-cpha;
 382                 status = "okay";
 383         };
 384 };
 385
 386 &usb {
 387         status = "okay";
 388 };
 389
 390 &usb_ctrl_mod {
 391         status = "okay";
 392 };
 393
 394 &usb0_phy {
 395         status = "okay";
 396 };
 397
 398 &usb1_phy {
 399         status = "okay";
 400 };
 401
 402 &usb0 {
 403         status = "okay";
 404 };
 405
 406 &usb1 {
 407         status = "okay";
 408 };
 409
 410 &cppi41dma  {
 411         status = "okay";
 412 };
 413
 414 /*
 415  * Disable soc's rtc as we have no VBAT for it. This makes the board
 416  * rtc (Microchip MCP79400) the default rtc device 'rtc0'.
 417  */
 418 &rtc {
 419         status = "disabled";
 420 };
 421
 422 &lcdc {
 423         status = "okay";
 424 };
 425
 426 &elm {
 427         status = "okay";
 428 };
 429
 430 #include "tps65910.dtsi"
 431
 432 &tps {
 433         vcc1-supply = <&vbat>;
 434         vcc2-supply = <&vbat>;
 435         vcc3-supply = <&vbat>;
 436         vcc4-supply = <&vbat>;
 437         vcc5-supply = <&vbat>;
 438         vcc6-supply = <&vbat>;
 439         vcc7-supply = <&vbat>;
 440         vccio-supply = <&vbat>;
 441
 442         regulators {
 443                 vrtc_reg: regulator@0 {
 444                         regulator-name = "ldo_vrtc";
 445                         regulator-always-on;
 446                 };
 447
 448                 vio_reg: regulator@1 {
 449                         regulator-name = "buck_vdd_ddr";
 450                         regulator-always-on;
 451                 };
 452
 453                 vdd1_reg: regulator@2 {
 454                         /* VDD_MPU voltage limits */
 455                         regulator-name = "buck_vdd_mpu";
 456                         regulator-min-microvolt = <912500>;
 457                         regulator-max-microvolt = <1312500>;
 458                         regulator-boot-on;
 459                         regulator-always-on;
 460                 };
 461
 462                 vdd2_reg: regulator@3 {
 463                         /* VDD_CORE voltage limits */
 464                         regulator-name = "buck_vdd_core";
 465                         regulator-min-microvolt = <912500>;
 466                         regulator-max-microvolt = <1150000>;
 467                         regulator-boot-on;
 468                         regulator-always-on;
 469                 };
 470
 471                 vdd3_reg: regulator@4 {
 472                         regulator-name = "boost_res";
 473                         regulator-always-on;
 474                 };
 475
 476                 vdig1_reg: regulator@5 {
 477                         regulator-name = "ldo_vdig1";
 478                         regulator-always-on;
 479                 };
 480
 481                 vdig2_reg: regulator@6 {
 482                         regulator-name = "ldo_vdig2";
 483                         regulator-always-on;
 484                 };
 485
 486                 vpll_reg: regulator@7 {
 487                         regulator-name = "ldo_vpll";
 488                         regulator-always-on;
 489                 };
 490
 491                 vdac_reg: regulator@8 {
 492                         regulator-name = "ldo_vdac";
 493                         regulator-always-on;
 494                 };
 495
 496                 vaux1_reg: regulator@9 {
 497                         regulator-name = "ldo_vaux1";
 498                         regulator-always-on;
 499                 };
 500
 501                 vaux2_reg: regulator@10 {
 502                         regulator-name = "ldo_vaux2";
 503                         regulator-always-on;
 504                 };
 505
 506                 vaux33_reg: regulator@11 {
 507                         regulator-name = "ldo_vaux33";
 508                         regulator-always-on;
 509                 };
 510
 511                 vmmc_reg: regulator@12 {
 512                         regulator-name = "ldo_vmmc";
 513                         regulator-min-microvolt = <1800000>;
 514                         regulator-max-microvolt = <3300000>;
 515                         regulator-always-on;
 516                 };
 517
 518                 vbb_reg: regulator@13 {
 519                         regulator-name = "bat_vbb";
 520                 };
 521         };
 522 };
 523
 524 &mac {
 525         pinctrl-names = "default";
 526         pinctrl-0 = <&cpsw_default>;
 527         dual_emac;                      /* no switch, two distinct MACs */
 528         status = "okay";
 529 };
 530
 531 &davinci_mdio {
 532         pinctrl-names = "default";
 533         pinctrl-0 = <&davinci_mdio_default>;
 534         status = "okay";
 535 };
 536
 537 &cpsw_emac0 {
 538         phy_id = <&davinci_mdio>, <0>;
 539         phy-mode = "mii";
 540         dual_emac_res_vlan = <1>;
 541 };
 542
 543 &cpsw_emac1 {
 544         phy_id = <&davinci_mdio>, <1>;
 545         phy-mode = "mii";
 546         dual_emac_res_vlan = <2>;
 547 };
 548
 549 &tscadc {
 550         status = "okay";
 551         tsc {
 552                 ti,wires = <4>;
 553                 ti,x-plate-resistance = <200>;
 554                 ti,coordinate-readouts = <5>;
 555                 ti,wire-config = <0x01 0x10 0x22 0x33>;
 556                 ti,charge-delay = <0x400>;
 557         };
 558
 559         adc {
 560                 ti,adc-channels = <4 5 6 7>;
 561         };
 562 };
 563
 564 &mmc1 {
 565         status = "okay";
 566         vmmc-supply = <&vmmc_reg>;
 567         bus-width = <4>;
 568         pinctrl-names = "default";
 569         pinctrl-0 = <&mmc1_pins>;
 570         non-removable;
 571 };
 572
 573 &mmc2 {
 574         status = "okay";
 575         vmmc-supply = <&vmmc_reg>;
 576         bus-width = <4>;
 577         pinctrl-names = "default";
 578         pinctrl-0 = <&mmc2_pins>;
 579         cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
 580 };
 581
 582 &sham {
 583         status = "okay";
 584 };
 585
 586 &aes {
 587         status = "okay";
 588 };
 589
 590 &dcan0 {
 591         status = "okay";
 592         pinctrl-names = "default";
 593         pinctrl-0 = <&dcan0_pins>;
 594 };