2 # Copyright 2014 Freescale Semiconductor
4 # SPDX-License-Identifier: GPL-2.0+
7 Freescale LayerScape with Chassis Generation 3
9 This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
14 A typical layout of various images (including Linux and other firmware images)
15 is shown below considering a 32MB NOR flash device:
17 -------------------------
19 ------------------------- ----> 0x0120_0000
21 ------------------------- ----> 0x00C0_0000
23 ------------------------- ----> 0x0070_0000
25 ------------------------- ----> 0x006C_0000
26 | MC Data Path Layout |
27 ------------------------- ----> 0x0020_0000
29 ------------------------- ----> 0x0000_1000
31 ------------------------- ----> 0x0000_0080
33 ------------------------- ----> 0x0000_0000
35 32-MB NOR flash layout
39 mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined
40 the value CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS will be assumed.
42 mcmemsize: MC DRAM block size. If this variable is not defined, the value
43 CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE will be assumed.