1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014-2015 Freescale Semiconductor, Inc.
7 #include <clock_legacy.h>
9 #include <debug_uart.h>
16 #include <asm/cache.h>
17 #include <asm/global_data.h>
22 #include <asm/arch/fdt.h>
23 #include <asm/arch/ppa.h>
24 #include <asm/arch/soc.h>
26 DECLARE_GLOBAL_DATA_PTR;
28 u32 spl_boot_device(void)
30 #ifdef CONFIG_SPL_MMC_SUPPORT
31 return BOOT_DEVICE_MMC1;
33 #ifdef CONFIG_SPL_NAND_SUPPORT
34 return BOOT_DEVICE_NAND;
36 #ifdef CONFIG_QSPI_BOOT
37 return BOOT_DEVICE_NOR;
42 #ifdef CONFIG_SPL_BUILD
44 void spl_board_init(void)
46 #if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_LSCH2)
48 * In case of Secure Boot, the IBR configures the SMMU
49 * to allow only Secure transactions.
50 * SMMU must be reset in bypass mode.
51 * Set the ClientPD bit and Clear the USFCFG Bit
54 val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
55 out_le32(SMMU_SCR0, val);
56 val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
57 out_le32(SMMU_NSCR0, val);
59 #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
60 enable_layerscape_ns_access();
62 #ifdef CONFIG_SPL_FSL_LS_PPA
67 void board_init_f(ulong dummy)
72 /* Clear global data */
73 memset((void *)gd, 0, sizeof(gd_t));
74 if (IS_ENABLED(CONFIG_DEBUG_UART))
77 ret = spl_early_init();
79 debug("spl_early_init() failed: %d\n", ret);
83 #ifdef CONFIG_ARCH_LS2080A
88 preloader_console_init();
92 #ifdef CONFIG_SPL_I2C_SUPPORT
100 #ifdef CONFIG_SPL_FSL_LS_PPA
101 #ifndef CONFIG_SYS_MEM_RESERVE_SECURE
102 #error Need secure RAM for PPA
105 * Secure memory location is determined in dram_init_banksize().
106 * gd->ram_size is deducted by the size of secure ram.
108 dram_init_banksize();
111 * After dram_init_bank_size(), we know U-Boot only uses the first
112 * memory bank regardless how big the memory is.
114 gd->ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
117 * If PPA is loaded, U-Boot will resume running at EL2.
118 * Cache and MMU will be enabled. Need a place for TLB.
119 * U-Boot will be relocated to the end of available memory
120 * in first bank. At this point, we cannot know how much
121 * memory U-Boot uses. Put TLB table lower by SPL_TLB_SETBACK
122 * to avoid overlapping. As soon as the RAM version U-Boot sets
123 * up new MMU, this space is no longer needed.
125 gd->ram_top -= SPL_TLB_SETBACK;
126 gd->arch.tlb_size = PGTABLE_SIZE;
127 gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1);
128 gd->arch.tlb_allocated = gd->arch.tlb_addr;
129 #endif /* CONFIG_SPL_FSL_LS_PPA */
130 #if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT)
135 #ifdef CONFIG_SPL_OS_BOOT
138 * 0 if booting into OS is selected
139 * 1 if booting into U-Boot is selected
141 int spl_start_uboot(void)
144 if (env_get_yesno("boot_os") != 0)
149 #endif /* CONFIG_SPL_OS_BOOT */
150 #endif /* CONFIG_SPL_BUILD */